用的xboot，xboot里设置CPU频率的代码和awboot是基本一致的。
奇怪的是，改代码里这一行的数字没有作用。不管改成多少，执行同一段计算代码的时间是一样的。
val |= (41 << 8)完整代码from xboot
static void set_pll_cpux_axi(void)
{
uint32_t val;
/* AXI: Select cpu clock src to PLL_PERI(1x) */
write32(T113_CCU_BASE + CCU_CPU_AXI_CFG_REG, (4 << 24) | (1 << 0));
sdelay(10);
/* Disable pll gating */
val = read32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG);
val &= ~(1 << 27);
write32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG, val);
/* Enable pll ldo */
val = read32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG);
val |= (1 << 30);
write32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG, val);
sdelay(5);
/* Set default clk to 1008mhz */
val = read32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG);
val &= ~((0x3 << 16) | (0xff << 8) | (0x3 << 0));
val |= (41 << 8);
write32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG, val);
/* Lock enable */
val = read32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG);
val |= (1 << 29);
write32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG, val);
/* Enable pll */
val = read32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG);
val |= (1 << 31);
write32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG, val);
/* Wait pll stable */
while(!(read32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG) & (0x1 << 28)));
sdelay(20);
/* Enable pll gating */
val = read32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG);
val |= (1 << 27);
write32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG, val);
/* Lock disable */
val = read32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG);
val &= ~(1 << 29);
write32(T113_CCU_BASE + CCU_PLL_CPU_CTRL_REG, val);
sdelay(1);
/* AXI: set and change cpu clk src to PLL_CPUX, PLL_CPUX:AXI0 = 1200MHz:600MHz */
val = read32(T113_CCU_BASE + CCU_CPU_AXI_CFG_REG);
val &= ~(0x07 << 24 | 0x3 << 16 | 0x3 << 8 | 0xf << 0);
val |= (0x03 << 24 | 0x0 << 16 | 0x1 << 8 | 0x1 << 0);
write32(T113_CCU_BASE + CCU_CPU_AXI_CFG_REG, val);
sdelay(1);
}离线