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/*---------------------------------------------------------------------------------------------------------*/
/*                                                                                                         */
/* Copyright(c) 2016 Nuvoton Technology Corp. All rights reserved.                                         */
/*                                                                                                         */
/*---------------------------------------------------------------------------------------------------------*/

//***********************************************************************************************************
//  Nuvoton Technoledge Corp. 
//  Website: http://www.nuvoton.com
//  E-Mail : MicroC-8bit@nuvoton.com
//  Date   : Apr/21/2016
//***********************************************************************************************************

//***********************************************************************************************************
//  File Function: N76E003 System clock select demo code
//***********************************************************************************************************

#include <stdio.h>
#include "N76E003.h"
#include "Common.h"
#include "Delay.h"
#include "SFR_Macro.h"
#include "Function_define.h"


//========================================================================
//  The test process:
//	1. Power on is run as default HIRC, show LED Fsys tickle faster
// 	2. toggle P3.0 to GND.
//	2. call modify Fsys code to LIRC.
//	3. LED tickle speed slowly than before.
//========================================================================
void main(void)
{

/* Note
  MCU power on system clock is HIRC (16 MHz)
	Please keep P3.0 HIGH before you want to modify Fsys to LIRC
*/
	
	  Set_All_GPIO_Quasi_Mode;                   	// In Common.h define
    set_CLOEN;    															// Also can check P1.1 CLO pin for clock to find the Fsys change.
		set_P30;
		while (P30)																	// when P3.0 keep high, clock out HIRC
		{   
				clr_GPIO1;															// Check LED output tickle time
        Timer0_Delay1ms(200);
        set_GPIO1;
        Timer0_Delay1ms(200);
		}
	
////------------------------------------------------------------------------------------------------------
///*********************************** Change system closk source ***************************************/
////------------------------------------------------------------------------------------------------------
              
////***** HIRC enable part *****               
//		set_HIRCEN;												//step1: enable HIRC clock source run
//		while((CKSWT&SET_BIT5)==0);				//step2: check ready
//		clr_OSC1;													//step3: switching system clock source if needed
//		clr_OSC0;
//		while((CKEN&SET_BIT0)==1);				//step4: check system clock switching OK or NG
//
////***** LIRC enable part*****
////** Since LIRC is always enable, switch to LIRC directly
		set_OSC1;													//step3: switching system clock source if needed
		clr_OSC0;  
		while((CKEN&SET_BIT0)==1);				//step4: check system clock switching OK or NG 	
		clr_HIRCEN;
   
////--------------------------------------------------------------------------------------------------------
    
/*
  Now Fsys = LIRC , LED tickle slowly.
*/
    while(1)
    {
				clr_GPIO1;															// Check LED output tickle time
        Timer0_Delay1ms(20);
        set_GPIO1;
        Timer0_Delay1ms(20);
    }
/* =================== */
}

/*---------------------------------------------------------------------------------------------------------*/
/*                                                                                                         */
/* Copyright(c) 2016 Nuvoton Technology Corp. All rights reserved.                                         */
/*                                                                                                         */
/*---------------------------------------------------------------------------------------------------------*/

//***********************************************************************************************************
//  Nuvoton Technoledge Corp. 
//  Website: http://www.nuvoton.com
//  E-Mail : MicroC-8bit@nuvoton.com
//  Date   : Apr/21/2016
//***********************************************************************************************************

//***********************************************************************************************************
//  File Function: N76E885 ADC demo code
//***********************************************************************************************************

#include "N76E003.h"
#include "SFR_Macro.h"
#include "Function_define.h"
#include "Common.h"
#include "Delay.h"

//*****************  The Following is in define in Fucntion_define.h  ***************************
//****** Always include Function_define.h call the define you want, detail see main(void) *******
//***********************************************************************************************
#if 0
//#define Enable_ADC_BandGap	ADCCON0|=SET_BIT3;ADCCON0&=0xF8;																															//Band-gap 1.22V
#endif

double  Bandgap_Voltage,VDD_Voltage;			//please always use "double" mode for this
unsigned  char xdata ADCdataH[5], ADCdataL[5];
int ADCsumH=0, ADCsumL=0;
unsigned char ADCavgH,ADCavgL;

void READ_BANDGAP()
{
		UINT8 BandgapHigh,BandgapLow,BandgapMark;
		double Bandgap_Value,Bandgap_Voltage_Temp;
	
		set_IAPEN;
		IAPCN = READ_UID;
		IAPAL = 0x0d;
    IAPAH = 0x00;
    set_IAPGO;
		BandgapLow = IAPFD;
		BandgapMark = BandgapLow&0xF0;
			
		if (BandgapMark==0x80)
		{
				BandgapLow = BandgapLow&0x0F;
				IAPAL = 0x0C;
				IAPAH = 0x00;
				set_IAPGO;
				BandgapHigh = IAPFD;
				Bandgap_Value = (BandgapHigh<<4)+BandgapLow;
				Bandgap_Voltage_Temp = Bandgap_Value*3/4;
				Bandgap_Voltage = Bandgap_Voltage_Temp - 33;			//the actually banggap voltage value is similar this value.
		}
		if (BandgapMark==0x00)
		{
				BandgapLow = BandgapLow&0x0F;
				IAPAL = 0x0C;
				IAPAH = 0x00;
				set_IAPGO;
				BandgapHigh = IAPFD;
				Bandgap_Value = (BandgapHigh<<4)+BandgapLow;
				Bandgap_Voltage= Bandgap_Value*3/4;
		}
		if (BandgapMark==0x90)
		{
				IAPAL = 0x0E;
				IAPAH = 0x00;
				set_IAPGO;
				BandgapHigh = IAPFD;
				IAPAL = 0x0F;
				IAPAH = 0x00;
				set_IAPGO;
				BandgapLow = IAPFD;
				BandgapLow = BandgapLow&0x0F;
				Bandgap_Value = (BandgapHigh<<4)+BandgapLow;
				Bandgap_Voltage= Bandgap_Value*3/4;
		}
		clr_IAPEN;
//			printf ("\n BG High = %bX",BandgapHigh); 
//			printf ("\n BG Low = %bX",BandgapLow); 
//			printf ("\n BG ROMMAP = %e",Bandgap_Voltage); 
}
		
		
/******************************************************************************
The main C function.  Program execution starts
here after stack initialization.
******************************************************************************/
void main (void) 
{
		double bgvalue;
		unsigned int i;
	
		InitialUART0_Timer1(115200);

		READ_BANDGAP();
		Enable_ADC_BandGap;												

		CKDIV = 0x02;															// IMPORTANT!! Modify system clock to 4MHz ,then add the ADC sampling clock base to add the sampling timing.
		for(i=0;i<5;i++)													// All following ADC detect timing is 200uS run under 4MHz.
    {
			clr_ADCF;
			set_ADCS;																
      while(ADCF == 0);
			ADCdataH[i] = ADCRH;
			ADCdataL[i] = ADCRL;
 		}		
		CKDIV = 0x00;															// After ADC sampling, modify system clock back to 16MHz to run next code.
		
		for(i=2;i<5;i++)													// use the last 3 times data to make average 
    {
			ADCsumH = ADCsumH + ADCdataH[i];
			ADCsumL = ADCsumL + ADCdataL[i];
		}				
		ADCavgH = ADCsumH/3;
		ADCavgL = ADCsumL/3;
		bgvalue = (ADCavgH<<4) + ADCavgL;
		VDD_Voltage = (0x1000/bgvalue)*Bandgap_Voltage;
			printf (" BG ROMMAP = %f,",Bandgap_Voltage); 
			printf (" VDD voltage = %f\n", VDD_Voltage); 

    while(1);
}

/*---------------------------------------------------------------------------------------------------------*/
/*                                                                                                         */
/* Copyright(c) 2017 Nuvoton Technology Corp. All rights reserved.                                         */
/*                                                                                                         */
/*---------------------------------------------------------------------------------------------------------*/

//***********************************************************************************************************
//  Nuvoton Technoledge Corp. 
//  Website: http://www.nuvoton.com
//  E-Mail : MicroC-8bit@nuvoton.com
//  Date   : Apr/21/2017
//***********************************************************************************************************

//***********************************************************************************************************
//  File Function: N76E003 Read actual bandgap value by IAP command
//***********************************************************************************************************
#include "N76E003.h"
#include "Common.h"
#include "Delay.h"
#include "SFR_Macro.h"
#include "Function_define.h"

UINT8 UID_BYTE(UINT8 Addr)
{
		UINT8 DATATEMP;
		set_IAPEN;
		IAPAL = Addr;
    IAPAH = 0x00;
    IAPCN = READ_UID;
    set_IAPGO;
		DATATEMP = IAPFD;
		clr_IAPEN;
		return DATATEMP;
}

void main(void)
{
	UINT8 i = 0;
	UINT8 READ[12];
	Set_All_GPIO_Quasi_Mode;
	InitialUART0_Timer3(115200);
	
//---------toggle GPIO1---------	
	clr_GPIO1;
	Timer0_Delay1ms(100);
	set_GPIO1;
	Timer0_Delay1ms(100);
	clr_GPIO1;
	Timer0_Delay1ms(100);
	set_GPIO1;
	Timer0_Delay1ms(100);
//---------end toggle GPIO1---------
	
	for(i=0;i<12;i++)
	READ[i] = UID_BYTE(i);

	
	while(1)
	{
			printf("UID: ");

			for(i=0;i<12;i++)
			{
					printf("%bx", READ[i]);
			}
			printf ("\n");
	}

}

/*---------------------------------------------------------------------------------------------------------*/
/*                                                                                                         */
/* Copyright(c) 2017 Nuvoton Technology Corp. All rights reserved.                                         */
/*                                                                                                         */
/*---------------------------------------------------------------------------------------------------------*/

//***********************************************************************************************************
//  Nuvoton Technoledge Corp. 
//  Website: http://www.nuvoton.com
//  E-Mail : MicroC-8bit@nuvoton.com
//  Date   : Apr/21/2017
//***********************************************************************************************************

//***********************************************************************************************************
//  File Function: N76E003 APROM program DATAFLASH (APROM) demo code
//***********************************************************************************************************

#include "N76E003.h"
#include "Common.h"
#include "Delay.h"
#include "SFR_Macro.h"
#include "Function_define.h"

#define     CID_READ            0x0B
#define     DID_READ            0x0C

/*
	Since the DATAFLASH is in the APROM. Program command is same as program APROM
*/
#define     PAGE_ERASE_LD       0x62
#define     BYTE_READ_LD        0x40
#define     BYTE_PROGRAM_LD	    0x61
#define     PAGE_SIZE           128


#define     ERASE_FAIL          0x70
#define     PROGRAM_FAIL        0x71
#define     IAPFF_FAIL          0x72
#define     IAP_PASS            0x00

//---------------------------------------------------------------
// Following define by customer
// Please confirm the start addresss not over your code size
//---------------------------------------------------------------
#define     DATA_SIZE           1024*4   
#define     DATA_START_ADDR     0x0000 					

/********************************************************************************************
 Following IAP command register is also define in SFR_Macro.h
 
	#define set_IAPEN   BIT_TMP=EA;EA=0;TA=0xAA;TA=0x55;CHPCON |= SET_BIT0 ;EA=BIT_TMP
	#define clr_IAPEN   BIT_TMP=EA;EA=0;TA=0xAA;TA=0x55;CHPCON &= ~SET_BIT0;EA=BIT_TMP
	#define set_APUEN   BIT_TMP=EA;EA=0;TA=0xAA;TA=0x55;IAPUEN |= SET_BIT0 ;EA=BIT_TMP
	#define clr_APUEN   BIT_TMP=EA;EA=0;TA=0xAA;TA=0x55;IAPUEN &= ~SET_BIT0;EA=BIT_TMP
	
**********************************************************************************************/
void IAP_ERROR_LED(void)
{
	while (1)
	{
		clr_P03;
		Timer0_Delay1ms(100);
		set_P03;
		Timer0_Delay1ms(100);
	}

}

//-----------------------------------------------------------------------------------------------------------/
void Trigger_IAP(void)
{   
    set_IAPGO;																	//trigger IAP
    if((CHPCON&SET_BIT6)==SET_BIT6)             // if fail flag is set, toggle error LED and IAP stop
		{
			clr_IAPFF;
			IAP_ERROR_LED();
		}
}
/*
		WARNING:
	No matter read or writer, when IAPFF is set 1, 
	this step process is fail. DATA should be ignore.
*/
//-----------------------------------------------------------------------------------------------------------/

/*****************************************************************************************************************
Erase APROM subroutine:
	

******************************************************************************************************************/		
void Erase_LDROM(void)
{   
    UINT16 u16Count;

    set_IAPEN;													// Enable IAP function
		IAPFD = 0xFF;												// IMPORTANT !! To erase function must setting IAPFD = 0xFF 
    IAPCN = PAGE_ERASE_LD;
    set_LDUEN;													//  APROM modify Enable
	
    for(u16Count=0x0000;u16Count<DATA_SIZE/PAGE_SIZE;u16Count++)		//
    {        
        IAPAL = LOBYTE(u16Count*PAGE_SIZE + DATA_START_ADDR);
        IAPAH = HIBYTE(u16Count*PAGE_SIZE + DATA_START_ADDR);
        Trigger_IAP(); 
    } 
//    clr_LDUEN;
//    clr_IAPEN;
}
//-----------------------------------------------------------------------------------------------------------
void Erase_LDROM_Verify(void)
{   
    UINT16 u16Count;
    set_IAPEN;
    IAPAL = LOBYTE(DATA_START_ADDR);
    IAPAH = HIBYTE(DATA_START_ADDR);
    IAPCN = BYTE_READ_LD;

    for(u16Count=0;u16Count<DATA_SIZE;u16Count++)
    {   
        IAPFD = 0x00;    
        Trigger_IAP();
        if(IAPFD != 0xFF)
					IAP_ERROR_LED();
        IAPAL++;
        if(IAPAL == 0x00)
          IAPAH++;
    } 
		
    clr_IAPEN;
    
}
//-----------------------------------------------------------------------------------------------------------
void Program_LDROM(void)
{   
    UINT16 u16Count;

    set_IAPEN;
    set_LDUEN;    
    IAPAL = LOBYTE(DATA_START_ADDR);
    IAPAH = HIBYTE(DATA_START_ADDR);
    IAPCN = BYTE_PROGRAM_LD;
    
    for(u16Count=0;u16Count<DATA_SIZE;u16Count++)
    {   
        IAPFD++;     
        Trigger_IAP();
       
        IAPAL++;
        if(IAPAL == 0)
        {
            IAPAH++;
        }
    } 
		
    clr_LDUEN;
    clr_IAPEN;
}
//-----------------------------------------------------------------------------------------------------------
void Program_LDROM_Verify(void)
{   
    UINT16 u16Count;
    UINT8  u8Read_Data;

    set_IAPEN;
    IAPAL = LOBYTE(DATA_START_ADDR);
    IAPAH = HIBYTE(DATA_START_ADDR);
    IAPCN = BYTE_READ_LD;
    u8Read_Data = 0x00;

    for(u16Count=0;u16Count<DATA_SIZE;u16Count++)
    {   
        Trigger_IAP();
        if(IAPFD != u8Read_Data)
					IAP_ERROR_LED();
        IAPAL++;
        if(IAPAL == 0)
        {
            IAPAH++;
        }
        u8Read_Data ++;
    } 

    clr_IAPEN;
}
//-----------------------------------------------------------------------------------------------------------

//-----------------------------------------------------------------------------------------------------------
void main (void) 
{

  Set_All_GPIO_Quasi_Mode;
//---------toggle GPIO1---------	
	clr_GPIO1;
	Timer0_Delay1ms(100);
	set_GPIO1;
	Timer0_Delay1ms(100);
	clr_GPIO1;
	Timer0_Delay1ms(100);
	set_GPIO1;
	Timer0_Delay1ms(100);
//---------end toggle GPIO1---------
	
    Erase_LDROM();
		Erase_LDROM_Verify();
    Program_LDROM();
    Program_LDROM_Verify();

//---------toggle GPIO1---------	
	clr_GPIO1;
//---------end toggle GPIO1---------

    while(1);
}
//-----------------------------------------------------------------------------------------------------------

$INCLUDE (N76E003.INC)
	
;******************************************************************************
; This code illustrates how to use IAP to make APROM 201h as a byte of
; Data Flash when user code is executed in APROM.
;******************************************************************************
ALL_ERASE_CONFIG EQU 11100010b
BYTE_PROGRAM_CONFIG EQU 11100001b
BYTE_READ_CONFIG EQU 11000000b

ORG 0000h
	
CALL Enable_IAP

CALL Read_CONFIG ;read back CONFIG2


CALL Enable_CONFIG_Update
CALL Erase_CONFIG ;erase CONFIG bytes
CALL Program_CONFIG ;programming CONFIG2 with new data
CALL Disable_CONFIG_Update
CALL Program_CONFIG_Verify ;verify Programmed CONFIG2

CALL Read_CONFIG ;read back CONFIG2

CALL Disable_IAP

SJMP $   















Enable_IAP:
MOV TA,#0Aah ;CHPCON is TA protected
MOV TA,#55h
ORL CHPCON,#00000001b ;IAPEN = 1, enable IAP mode
RET	



Disable_IAP:
MOV TA,#0Aah
MOV TA,#55h
ANL CHPCON,#11111110b ;IAPEN = 0, disable IAP mode
RET


Read_CONFIG:
MOV IAPCN,#BYTE_READ_CONFIG
MOV IAPAH,#00h
MOV IAPAL,#00h
CALL Trigger_IAP
MOV R3,IAPFD

MOV IAPAL,#01h
CALL Trigger_IAP
MOV R4,IAPFD

MOV IAPAL,#02h
CALL Trigger_IAP
MOV R5,IAPFD

MOV IAPAL,#03h
CALL Trigger_IAP
MOV R6,IAPFD

MOV IAPAL,#04h
CALL Trigger_IAP
MOV R7,IAPFD

RET

Trigger_IAP:
MOV TA,#0Aah ;IAPTRG is TA protected
MOV TA,#55h
ORL IAPTRG,#00000001b ;write ‘1’ to IAPGO to trigger IAP process
RET







Enable_CONFIG_Update:
MOV TA,#0Aah
MOV TA,#55h
ORL IAPUEN,#00000100b ;CFUEN = 1, enable CONFIG update
RET
Disable_CONFIG_Update:
MOV TA,#0Aah
MOV TA,#55h
ANL IAPUEN,#11111011b ;CFUEN = 0, disable CONFIG update
RET





;********************************************************************
; IAP CONFIG Function
;********************************************************************
Erase_CONFIG:
MOV IAPCN,#ALL_ERASE_CONFIG
MOV IAPAH,#00h
MOV IAPAL,#00h
MOV IAPFD,#0FFh
CALL Trigger_IAP
RET

Program_CONFIG:
MOV IAPCN,#BYTE_PROGRAM_CONFIG
MOV IAPAH,#00h
MOV IAPAL,#02h
MOV A,R7
ANL A,#11111011b
MOV IAPFD,A ;disable BOD reset
MOV R6,A ;temp data
CALL Trigger_IAP
RET
Program_CONFIG_Verify:
MOV IAPCN,#BYTE_READ_CONFIG
MOV IAPAH,#00h
MOV IAPAL,#02h
CALL Trigger_IAP
MOV B,R6
MOV A,IAPFD
CJNE A,B,Program_CONFIG_Verify_Error
RET
Program_CONFIG_Verify_Error:
CALL Disable_IAP
MOV P0,#00h
SJMP $




END

$INCLUDE (N76E003.INC)
	
;******************************************************************************
; This code illustrates how to use IAP to make APROM 201h as a byte of
; Data Flash when user code is executed in APROM.
;******************************************************************************
ALL_ERASE_CONFIG EQU 11100010b
BYTE_PROGRAM_CONFIG EQU 11100001b
BYTE_READ_CONFIG EQU 11000000b

ORG 0000h
	
CALL Enable_IAP

CALL Read_CONFIG ;read back CONFIG2


CALL Enable_CONFIG_Update
CALL Erase_CONFIG ;erase CONFIG bytes
CALL Program_CONFIG ;programming CONFIG2 with new data
CALL Disable_CONFIG_Update
CALL Program_CONFIG_Verify ;verify Programmed CONFIG2

CALL Read_CONFIG ;read back CONFIG2

CALL Disable_IAP

SJMP $   















Enable_IAP:
MOV TA,#0Aah ;CHPCON is TA protected
MOV TA,#55h
ORL CHPCON,#00000001b ;IAPEN = 1, enable IAP mode
RET	



Disable_IAP:
MOV TA,#0Aah
MOV TA,#55h
ANL CHPCON,#11111110b ;IAPEN = 0, disable IAP mode
RET


Read_CONFIG:
MOV IAPCN,#BYTE_READ_CONFIG
MOV IAPAH,#00h
MOV IAPAL,#00h
CALL Trigger_IAP
MOV R3,IAPFD

MOV IAPAL,#01h
CALL Trigger_IAP
MOV R4,IAPFD

MOV IAPAL,#02h
CALL Trigger_IAP
MOV R5,IAPFD

MOV IAPAL,#03h
CALL Trigger_IAP
MOV R6,IAPFD

MOV IAPAL,#04h
CALL Trigger_IAP
MOV R7,IAPFD

RET

Trigger_IAP:
MOV TA,#0Aah ;IAPTRG is TA protected
MOV TA,#55h
ORL IAPTRG,#00000001b ;write ‘1’ to IAPGO to trigger IAP process
RET







Enable_CONFIG_Update:
MOV TA,#0Aah
MOV TA,#55h
ORL IAPUEN,#00000100b ;CFUEN = 1, enable CONFIG update
RET
Disable_CONFIG_Update:
MOV TA,#0Aah
MOV TA,#55h
ANL IAPUEN,#11111011b ;CFUEN = 0, disable CONFIG update
RET





;********************************************************************
; IAP CONFIG Function
;********************************************************************
Erase_CONFIG:
MOV IAPCN,#ALL_ERASE_CONFIG
MOV IAPAH,#00h
MOV IAPAL,#00h
MOV IAPFD,#0FFh
CALL Trigger_IAP
RET





Program_CONFIG:
MOV IAPCN,#BYTE_PROGRAM_CONFIG
MOV IAPAH,#00h
MOV IAPAL,#00h
MOV A,R7
ANL A,#6Fh
MOV IAPFD,A ;disable BOD reset
MOV R6,A ;temp data
CALL Trigger_IAP

MOV IAPAL,#01h
MOV A,R7
ANL A,#0FBh
MOV IAPFD,A ;disable BOD reset
MOV R6,A ;temp data
CALL Trigger_IAP

MOV IAPAL,#02h
MOV A,R7
ANL A,#0FBh
MOV IAPFD,A ;disable BOD reset
MOV R6,A ;temp data
CALL Trigger_IAP
RET






Program_CONFIG_Verify:
MOV IAPCN,#BYTE_READ_CONFIG
MOV IAPAH,#00h
MOV IAPAL,#02h
CALL Trigger_IAP
MOV B,R6
MOV A,IAPFD
CJNE A,B,Program_CONFIG_Verify_Error
RET
Program_CONFIG_Verify_Error:
CALL Disable_IAP
MOV P0,#00h
SJMP $




END

mov	TA, #0xAA				; TA = 0xAA
mov	TA, #0x55				; TA = 0x55 {'U'}
orl	SFRS, #0x01			; SFRS |= 0x01

        mov	TA, #0xAA				; TA = 0xAA
	mov	TA, #0x55				; TA = 0x55 {'U'}
	mov	R6, SFRS				; R6 = SFRS
	orl	0x06, #0x01			; 0x06 |= 0x01
	mov	SFRS, R6				; SFRS = R6

unsigned char
_sdcc_external_startup (void)
{
    __asm
    mov	0xC7, #0xAA				; [0xC7] = 0xAA
	mov	0xC7, #0x55				; [0xC7] = 0x55 {'U'}
	mov	0xFD, #0x5A				; [0xFD] = 0x5A {'Z'}
	mov	0xC7, #0xAA				; [0xC7] = 0xAA
	mov	0xC7, #0x55				; [0xC7] = 0x55 {'U'}
	mov	0xFD, #0xA5				; [0xFD] = 0xA5
    __endasm;
    return 0;
}

bit PIFlag;//管脚中断标志位
sbit LED=P1^5;


void main (void)
{
    Set_All_GPIO_Quasi_Mode;

    //设置为输入模式
    P10_Input_Mode;
    P11_Input_Mode;
    P12_Input_Mode;

    clr_PIPS1;
    set_PIPS0;//选择P1为中断输入源

    //Enable_BIT1_HighLevel_Trig;	//高电平触发管脚中断
    //Enable_BIT1_FallEdge_Trig;	//下降沿		
    //Enable_BIT1_RasingEdge_Trig;//上升沿
    Enable_BIT2_LowLevel_Trig;
    Enable_BIT1_LowLevel_Trig;	//低电平
    Enable_BIT0_LowLevel_Trig;

    LED=1;//初始化LED端口
    Timer0_Delay1ms(20);
    set_EPI;//开启管脚中断使能
    EA = 1;//开启总中断
    
    while(1)
    {
        if(PIFlag)//判定是否溢出
        {	
            LED=0;
            Timer0_Delay1ms(10);
            LED=1;//灯闪烁
            PIFlag=0;
            ADCCON1 = 0X00;//关闭ADC
            clr_BODEN;//关闭欠压检测
            set_PD;// 进入掉电模式
        }
    }
}

//-------管脚中断中断服务程序---------
void PinInterrupt (void) interrupt 7
{
    if((PIF & 0x01) == 0x01)//P10位于 0通道
    {
        PIF=0;//清除外部中断标志
        PIFlag=1;
    }
    else if((PIF & 0x02) == 0x02)//P11位于 1通道
    {
        PIF=0;//清除外部中断标志
        PIFlag=1;
    }
    else if((PIF & 0x04) == 0x04)//P12位于 2通道
    {
        PIF=0;//清除外部中断标志
        PIFlag=1;
    }
}

#include <N76E003.H>
#include <SFR_Macro.h>
#include <Function_Define.h>

bit BIT_TMP;    // 调用 SFR_Macro.h 使用的

void main(void){
    // 开通外部
    set_EXTEN1;
    set_EXTEN0;
    // 等待外部稳定
    while(!(CKSWT|0x08));
    // 选择外部时钟
    clr_OSC1;
    set_OSC0;
    // 等待外部时钟切换成功
    while(CKEN&0x01);
    while(1){
        ;        // 函数主题
    }
}