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;----------------------------------------------------------------------------------
;SPI controller configuration
;----------------------------------------------------------------------------------
[spi0]
spi_used       = 0
spi_cs_bitmap  = 1
spi_cs0        = port:PC19<3><1><default><default>
spi_sclk       = port:PC02<3><default><default><default>
spi_mosi       = port:PC00<3><default><default><default>
spi_miso       = port:PC01<3><default><default><default>

[spi1]
spi_used       = 0
spi_cs_bitmap  = 1
spi_cs0        =
spi_sclk       =
spi_mosi       =
spi_miso       =

[spi2]
spi_used       = 0
spi_cs_bitmap  = 1
spi_cs0        = port:PE04<3><1><default><default>
spi_sclk       = port:PE05<3><default><default><default>
spi_mosi       = port:PE06<3><default><default><default>
spi_miso       = port:PE07<3><default><default><default>

[spi3]
spi_used       = 0
spi_cs_bitmap  = 1
spi_cs0        = port:PH17<2><1><default><default>
spi_cs1        = port:PH18<2><1><default><default>
spi_cs2        = port:PH12<3><1><default><default>
spi_cs3        = port:PH13<3><default><default><default>
spi_sclk       = port:PH14<2><default><default><default>
spi_mosi       = port:PH15<2><default><default><default>
spi_miso       = port:PH16<2><default><default><default>

;----------------------------------------------------------------------------------
;SPI device configuration
;----------------------------------------------------------------------------------
[spi_devices]
spi_dev_num = 1

[spi_board0]
modalias      = "m25p32"
max_speed_hz  = 33000000
bus_num       = 0
chip_select   = 0
mode          = 0

/* sunxi_spi_set_cs : spi control set cs to connect device
 * enable : 1, working mode : set ss to connect device
 * enable : 0, default mode : set ss to do not connect device
 *
 * spi controller cs mode use this funtion to set cs
 * software cs mode use kernel code to set cs
 * */
static void sunxi_spi_set_cs(struct spi_device *spi, bool enable)
{
        u32 reg_val;
        struct sunxi_spi *sspi = spi_master_get_devdata(spi->master);

        sunxi_spi_ss_select(spi->chip_select, sspi->base_addr);

        reg_val = readl(sspi->base_addr + SPI_TC_REG);
        enable &= 0x01;
        if (enable)     //set cs to connect device
                reg_val |= SPI_TC_SS_LEVEL;
        else            //set cs to default mode
                reg_val &= ~SPI_TC_SS_LEVEL;
        writel(reg_val, sspi->base_addr + SPI_TC_REG);
}