参考这个链接https://whycan.com/viewtopic.php?id=2041在主线linux5.2 上配置了驱动
但是开始报错 Error: Driver 'sun4i-codec' is already registered, aborting
不知道为什么被注册了有没有大佬帮忙看看什么问题
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▒▒ 0
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
Found U-Boot script /boot.scr
reading /boot.scr
730 bytes read in 20 ms (35.2 KiB/s)
## Executing script at 80c50000
reading suniv-f1c100s-licheepi-nano.dtb
6426 bytes read in 26 ms (241.2 KiB/s)
reading zImage
4178696 bytes read in 221 ms (18 MiB/s)
## Flattened Device Tree blob at 80c00000
Booting using the fdt blob at 0x80c00000
Loading Device Tree to 816fb000, end 816ff919 ... OK
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 5.2.0-licheepi-nano (root@yuwei-VirtualBox) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #2 Thu May 19 00:02:44 CST 2022
[ 0.000000] CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=0005317f
[ 0.000000] CPU: VIVT data cache, VIVT instruction cache
[ 0.000000] OF: fdt: Machine model: Lichee Pi Nano
[ 0.000000] Memory policy: Data cache writeback
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 16256
[ 0.000000] Kernel command line: console=ttyS0,115200 panic=5 rootwait root=/dev/mmcblk0p2 rw
[ 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Memory: 55172K/65536K available (6144K kernel code, 244K rwdata, 1584K rodata, 1024K init, 241K bss, 10364K reserved, 0K cma-reserved, 0K highmem)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[ 0.000000] random: get_random_bytes called from start_kernel+0x254/0x42c with crng_init=0
[ 0.000053] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
[ 0.000138] clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[ 0.000763] Console: colour dummy device 80x30
[ 0.000867] Calibrating delay loop... 203.16 BogoMIPS (lpj=1015808)
[ 0.070258] pid_max: default: 32768 minimum: 301
[ 0.070727] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.070775] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.072510] CPU: Testing write buffer coherency: ok
[ 0.074695] Setting up static identity map for 0x80100000 - 0x80100058
[ 0.077158] devtmpfs: initialized
[ 0.083303] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.083372] futex hash table entries: 256 (order: -1, 3072 bytes)
[ 0.083692] pinctrl core: initialized pinctrl subsystem
[ 0.086402] NET: Registered protocol family 16
[ 0.087835] DMA: preallocated 256 KiB pool for atomic coherent allocations
[ 0.090082] cpuidle: using governor menu
[ 0.148072] SCSI subsystem initialized
[ 0.148461] usbcore: registered new interface driver usbfs
[ 0.148629] usbcore: registered new interface driver hub
[ 0.148837] usbcore: registered new device driver usb
[ 0.149394] pps_core: LinuxPPS API ver. 1 registered
[ 0.149422] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 0.149498] PTP clock support registered
[ 0.150065] Advanced Linux Sound Architecture Driver Initialized.
[ 0.152023] clocksource: Switched to clocksource timer
[ 0.184749] NET: Registered protocol family 2
[ 0.186463] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes)
[ 0.186546] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.186605] TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.186655] TCP: Hash tables configured (established 1024 bind 1024)
[ 0.187030] UDP hash table entries: 256 (order: 0, 4096 bytes)
[ 0.187099] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[ 0.187672] NET: Registered protocol family 1
[ 0.189399] RPC: Registered named UNIX socket transport module.
[ 0.189441] RPC: Registered udp transport module.
[ 0.189456] RPC: Registered tcp transport module.
[ 0.189470] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.191824] NetWinder Floating Point Emulator V0.97 (double precision)
[ 0.194257] Initialise system trusted keyrings
[ 0.194940] workingset: timestamp_bits=30 max_order=14 bucket_order=0
[ 0.219706] NFS: Registering the id_resolver key type
[ 0.219792] Key type id_resolver registered
[ 0.219813] Key type id_legacy registered
[ 0.226202] Key type asymmetric registered
[ 0.226250] Asymmetric key parser 'x509' registered
[ 0.226452] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
[ 0.226485] io scheduler mq-deadline registered
[ 0.226505] io scheduler kyber registered
[ 0.238860] suniv-f1c100s-pinctrl 1c20800.pinctrl: initialized sunXi PIO driver
[ 0.457896] Serial: 8250/16550 driver, 8 ports, IRQ sharing disabled
[ 0.464282] suniv-f1c100s-pinctrl 1c20800.pinctrl: 1c20800.pinctrl supply vcc-pe not found, using dummy regulator
[ 0.466147] printk: console [ttyS0] disabled
[ 0.486414] 1c25000.serial: ttyS0 at MMIO 0x1c25000 (irq = 22, base_baud = 6250000) is a 16550A
[ 0.897234] printk: console [ttyS0] enabled
[ 0.905701] suniv-f1c100s-pinctrl 1c20800.pinctrl: 1c20800.pinctrl supply vcc-pd not found, using dummy regulator
[ 0.924403] SCSI Media Changer driver v0.25
[ 0.930077] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 0.936753] ehci-platform: EHCI generic platform driver
[ 0.942392] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[ 0.948630] ohci-platform: OHCI generic platform driver
[ 0.954398] usbcore: registered new interface driver usb-storage
[ 0.961108] udc-core: couldn't find an available UDC - added [g_cdc] to list of pending drivers
[ 0.970245] i2c /dev entries driver
[ 0.975724] suniv-f1c100s-pinctrl 1c20800.pinctrl: 1c20800.pinctrl supply vcc-pf not found, using dummy regulator
[ 1.013915] sunxi-mmc 1c0f000.mmc: initialized, max. request size: 16384 KB
[ 1.023671] usbcore: registered new interface driver usbhid
[ 1.029249] usbhid: USB HID core driver
[ 1.050328] Error: Driver 'sun4i-codec' is already registered, aborting...
[ 1.058083] NET: Registered protocol family 17
[ 1.062923] Key type dns_resolver registered
[ 1.069834] Loading compiled-in X.509 certificates
[ 1.085716] suniv-f1c100s-pinctrl 1c20800.pinctrl: 1c20800.pinctrl supply vcc-pd not found, using dummy regulator
[ 1.097242] sun4i-backend 1e60000.display-backend: Couldn't find matching frontend, frontend features disabled
[ 1.108155] sun4i-drm display-engine: bound 1e60000.display-backend (ops 0xc073b534)
[ 1.117196] sun4i-drm display-engine: bound 1c0c000.lcd-controller (ops 0xc073a18c)
[ 1.124980] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 1.131581] [drm] No driver support for vblank timestamp query.
[ 1.138940] [drm] Initialized sun4i-drm 1.0.0 20150629 for display-engine on minor 0
[ 1.362856] mmc0: host does not support reading read-only switch, assuming write-enable
[ 1.365263] mmc0: new high speed SDHC card at address 0001
[ 1.369725] mmcblk0: mmc0:0001 SD 29.1 GiB
[ 1.391978] Console: switching to colour frame buffer device 100x30
[ 1.394786] mmcblk0: p1 p2
[ 1.452310] sun4i-drm display-engine: fb0: sun4i-drmdrmfb frame buffer device
[ 1.460210] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[ 1.478546] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[ 1.485429] ALSA device list:
[ 1.488481] #0: Loopback 1
[ 1.492477] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[ 1.501096] cfg80211: failed to load regulatory.db
[ 1.545918] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[ 1.554300] VFS: Mounted root (ext4 filesystem) on device 179:2.
[ 1.563846] devtmpfs: mounted
[ 1.572069] random: fast init done
[ 1.576949] Freeing unused kernel memory: 1024K
[ 1.581686] Run /sbin/init as init process
[ 1.759720] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)
Starting logging: OK
Initializing random number generator... [ 2.135403] random: dd: uninitialized urandom read (512 bytes read)
done.
Starting system message bus: [ 2.256050] random: dbus-uuidgen: uninitialized urandom read (12 bytes read)
[ 2.263774] random: dbus-uuidgen: uninitialized urandom read (8 bytes read)
done
Starting network: OK
Welcome to Buildroot
buildroot login: root
# ls
# [ 206.242168] random: crng init done
[ 206.245593] random: 2 urandom warning(s) missed due to ratelimiting
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// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
* Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
*/
/dts-v1/;
#include "suniv-f1c100s.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Lichee Pi Nano";
compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
panel: panel {
compatible = "lg,lb070wv8", "simple-panel";
#address-cells = <1>;
#size-cells = <0>;
enable-gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>;
power-supply = <®_vcc3v3>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
panel_input: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_out_lcd>;
};
};
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&be0 {
status = "okay";
};
&de {
status = "okay";
};
&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd_rgb666_pins>;
status = "okay";
};
&tcon0_out {
tcon0_out_lcd: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_input>;
};
};
&mmc0 {
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
broken-cd;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pe_pins>;
status = "okay";
};
&codec {
allwinner,audio-routing =
"Headphone", "HP",
"Headphone", "HPCOM",
"MIC", "Mic";
status = "okay";
};
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// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
* Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
* Copyright 2018 Mesih Kilinc <mesihkilinc@gmail.com>
*/
#include <dt-bindings/clock/suniv-ccu-f1c100s.h>
#include <dt-bindings/reset/suniv-ccu-f1c100s.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
clocks {
osc24M: clk-24M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "osc24M";
};
osc32k: clk-32k {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
};
};
cpus {
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};
de: display-engine {
compatible = "allwinner,suniv-f1c100s-display-engine";
allwinner,pipelines = <&fe0>;
status = "disabled";
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram-controller@1c00000 {
compatible = "allwinner,suniv-f1c100s-system-control",
"allwinner,sun4i-a10-system-control";
reg = <0x01c00000 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram_d: sram@10000 {
compatible = "mmio-sram";
reg = <0x00010000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00010000 0x1000>;
otg_sram: sram-section@0 {
compatible = "allwinner,suniv-f1c100s-sram-d",
"allwinner,sun4i-a10-sram-d";
reg = <0x0000 0x1000>;
status = "disabled";
};
};
};
tcon0: lcd-controller@1c0c000 {
compatible = "allwinner,suniv-f1c100s-tcon";
reg = <0x01c0c000 0x1000>;
interrupts = <29>;
clocks = <&ccu CLK_BUS_LCD>,
<&ccu CLK_TCON>;
clock-names = "ahb",
"tcon-ch0";
clock-output-names = "tcon-pixel-clock";
resets = <&ccu RST_BUS_LCD>;
reset-names = "lcd";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon0_in_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_out_tcon0>;
};
};
tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
};
ccu: clock@1c20000 {
compatible = "allwinner,suniv-f1c100s-ccu";
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
};
intc: interrupt-controller@1c20400 {
compatible = "allwinner,suniv-f1c100s-ic";
reg = <0x01c20400 0x400>;
interrupt-controller;
#interrupt-cells = <1>;
};
pio: pinctrl@1c20800 {
compatible = "allwinner,suniv-f1c100s-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <38>, <39>, <40>;
clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
#gpio-cells = <3>;
uart0_pe_pins: uart0-pe-pins {
pins = "PE0", "PE1";
function = "uart0";
};
lcd_rgb666_pins: lcd-rgb666-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD6", "PD7", "PD8", "PD9",
"PD10", "PD11", "PD12", "PD13", "PD14",
"PD15", "PD16", "PD17", "PD18", "PD19",
"PD20", "PD21";
function = "lcd";
};
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
function = "mmc0";
};
};
timer@1c20c00 {
compatible = "allwinner,suniv-f1c100s-timer";
reg = <0x01c20c00 0x90>;
interrupts = <13>;
clocks = <&osc24M>;
};
mmc0: mmc@1c0f000 {
compatible = "allwinner,suniv-f1c100s-mmc",
"allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ccu CLK_BUS_MMC0>,
<&ccu CLK_MMC0>,
<&ccu CLK_MMC0_OUTPUT>,
<&ccu CLK_MMC0_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
resets = <&ccu RST_BUS_MMC0>;
reset-names = "ahb";
interrupts = <23>;
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
wdt: watchdog@1c20ca0 {
compatible = "allwinner,suniv-f1c100s-wdt",
"allwinner,sun4i-a10-wdt";
reg = <0x01c20ca0 0x20>;
};
uart0: serial@1c25000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c25000 0x400>;
interrupts = <1>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART0>;
resets = <&ccu RST_BUS_UART0>;
status = "disabled";
};
uart1: serial@1c25400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c25400 0x400>;
interrupts = <2>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART1>;
resets = <&ccu RST_BUS_UART1>;
status = "disabled";
};
uart2: serial@1c25800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c25800 0x400>;
interrupts = <3>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
status = "disabled";
};
fe0: display-frontend@1e00000 {
compatible = "allwinner,suniv-f1c100s-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <30>;
clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>,
<&ccu CLK_DRAM_DE_FE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_BUS_DE_FE>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
fe0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_in_fe0>;
};
};
};
};
be0: display-backend@1e60000 {
compatible = "allwinner,suniv-f1c100s-display-backend";
reg = <0x01e60000 0x10000>;
reg-names = "be";
interrupts = <31>;
clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_DRAM_DE_BE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_BUS_DE_BE>;
reset-names = "be";
assigned-clocks = <&ccu CLK_DE_BE>;
assigned-clock-rates = <300000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
be0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be0_in_fe0: endpoint@0 {
reg = <0>;
remote-endpoint = <&fe0_out_be0>;
};
};
be0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be0_out_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_in_be0>;
};
};
};
};
dma: dma-controller@1c02000 {
compatible = "allwinner,suniv-dma";
reg = <0x01c02000 0x1000>;
interrupts = <18>;
clocks = <&ccu CLK_BUS_DMA>;
resets = <&ccu RST_BUS_DMA>;
#dma-cells = <2>;
};
codec: codec@1c23c00 {
compatible = "allwinner,suniv-codec";
reg = <0x01c23c00 0x400>;
interrupts = <21>;
clocks = <&ccu CLK_BUS_CODEC>,
<&ccu CLK_CODEC>;
clock-names = "apb", "codec";
resets = <&ccu RST_BUS_CODEC>;
dmas = <&dma 0 12>, <&dma 0 12>;
dma-names = "rx", "tx";
status = "disabled";
};
};
};
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