WhyCan Forum(哇酷开发者社区)

inline static void f1c100s_debe_set_address(struct lcd_f1c100s_device *dev)
{
	struct f1c100s_debe_reg_t * debe = (struct f1c100s_debe_reg_t *)(dev->virtdebe);

	write32((rt_uint32_t)&debe->layer0_addr_low32b, (uint32_t)(dev->lcd_info.framebuffer[fb_bank? 1:0]) << 3); // address in bits 3->8bit(byte address)
	write32((rt_uint32_t)&debe->layer0_addr_high4b, (uint32_t)(dev->lcd_info.framebuffer[fb_bank? 1:0]) >> 29);

	//write32((rt_uint32_t)&debe->layer0_addr_low32b, (uint32_t)vram << 3);
	//write32((rt_uint32_t)&debe->layer0_addr_high4b, (uint32_t)vram >> 29);
}

static inline void f1c100s_debe_set_mode(struct lcd_f1c100s_device *dev)
{
	struct f1c100s_debe_reg_t * debe = (struct f1c100s_debe_reg_t *)(dev->virtdebe);
	rt_uint32_t val;
	rt_uint32_t mode_val;
    
    // enable debe, layer0 but set the reset
    mode_val = (1<<8) | (1<<0);
	write32((rt_uint32_t)&debe->mode, mode_val);

	write32((rt_uint32_t)&debe->disp_size, (((dev->lcd_info.height) - 1) << 16) | (((dev->lcd_info.width) - 1) << 0));
	write32((rt_uint32_t)&debe->layer0_size, (((dev->lcd_info.height) - 1) << 16) | (((dev->lcd_info.width) - 1) << 0));
    
    f1c100s_debe_set_address(dev);
	//write32((rt_uint32_t)&debe->layer0_addr_low32b, (uint32_t)(dev->lcd_info.framebuffer) << 3); // address in bits 3->8bit(byte address)
	//write32((rt_uint32_t)&debe->layer0_addr_high4b, (uint32_t)(dev->lcd_info.framebuffer) >> 29);
    
    //val = (1<<2); // swap B R, i.e. BGR
    val = 0;
    if (dev->lcd_info.bits_per_pixel == 16)
    {
        val |= (0x05 << 8);
        write32((rt_uint32_t)&debe->layer0_stride, ((dev->lcd_info.width) << 4)); // line width in bits 5->32bit, 4->16bit
    }
    else // FIXME: default 32bit RGB
    {
        val |= (0x09 << 8);
        write32((rt_uint32_t)&debe->layer0_stride, ((dev->lcd_info.width) << 5)); // line width in bits 5->32bit, 4->16bit
    }
    write32((rt_uint32_t)&debe->layer0_attr1_ctrl, val);

    // start debe
    mode_val |= (1 << 1);
	write32((rt_uint32_t)&debe->mode, mode_val);
}

static inline void f1c100s_tcon_set_mode(struct lcd_f1c100s_device *dev)
{
	struct f1c100s_tcon_reg_t * tcon = (struct f1c100s_tcon_reg_t *)dev->virttcon;
	int bp, total;
	rt_uint32_t val;

	val = read32((rt_uint32_t)&tcon->ctrl);
	val &= ~(0x1 << 0);
	write32((rt_uint32_t)&tcon->ctrl, val);

	val = (dev->timing.v_front_porch + dev->timing.v_back_porch + dev->timing.v_sync_len);
	write32((rt_uint32_t)&tcon->tcon0_ctrl, (1 << 31) | ((val & 0x1f) << 4));
	// val = clk_get_rate(dev->clktcon) / dev->timing.pixel_clock_hz;
    // rt_kprintf("get_video_pll_clk:%d\n", get_video_pll_clk());
    val = get_video_pll_clk() / dev->timing.pixel_clock_hz;
	write32((rt_uint32_t)&tcon->tcon0_dclk, (0xf << 28) | (val << 0));
	write32((rt_uint32_t)&tcon->tcon0_timing_active, ((dev->lcd_info.width - 1) << 16) | ((dev->lcd_info.height - 1) << 0));

	bp = dev->timing.h_sync_len + dev->timing.h_back_porch;
	total = dev->lcd_info.width + dev->timing.h_front_porch + bp;
	write32((rt_uint32_t)&tcon->tcon0_timing_h, ((total - 1) << 16) | ((bp - 1) << 0));
	bp = dev->timing.v_sync_len + dev->timing.v_back_porch;
	total = dev->lcd_info.height + dev->timing.v_front_porch + bp;
	write32((rt_uint32_t)&tcon->tcon0_timing_v, ((total * 2) << 16) | ((bp - 1) << 0));
	write32((rt_uint32_t)&tcon->tcon0_timing_sync, ((dev->timing.h_sync_len - 1) << 16) | ((dev->timing.v_sync_len - 1) << 0));

	write32((rt_uint32_t)&tcon->tcon0_hv_intf, 0);
	write32((rt_uint32_t)&tcon->tcon0_cpu_intf, 0);

	if(dev->lcd_info.bits_per_pixel == 24 || dev->lcd_info.bits_per_pixel == 16 || dev->lcd_info.bits_per_pixel == 32)
	{
		write32((rt_uint32_t)&tcon->tcon0_frm_seed[0],  0x11111111);
		write32((rt_uint32_t)&tcon->tcon0_frm_seed[1],  0x11111111);
		write32((rt_uint32_t)&tcon->tcon0_frm_seed[2],  0x11111111);
		write32((rt_uint32_t)&tcon->tcon0_frm_seed[3],  0x11111111);
		write32((rt_uint32_t)&tcon->tcon0_frm_seed[4],  0x11111111);
		write32((rt_uint32_t)&tcon->tcon0_frm_seed[5],  0x11111111);

		write32((rt_uint32_t)&tcon->tcon0_frm_table[0], 0x01010000);
		write32((rt_uint32_t)&tcon->tcon0_frm_table[1], 0x15151111);
		write32((rt_uint32_t)&tcon->tcon0_frm_table[2], 0x57575555);
		write32((rt_uint32_t)&tcon->tcon0_frm_table[3], 0x7f7f7777);
        // 最高支持18位
		write32((rt_uint32_t)&tcon->tcon0_frm_ctrl, (dev->lcd_info.bits_per_pixel == 24 || dev->lcd_info.bits_per_pixel == 32) ? ((1 << 31) | (0 << 4)) : ((1 << 31) | (5 << 4)));
	}

	val = (1 << 28);
	if(!dev->timing.h_sync_active)
		val |= (1 << 25);
	if(!dev->timing.v_sync_active)
		val |= (1 << 24);
	if(!dev->timing.den_active)
		val |= (1 << 27);
	if(!dev->timing.clk_active)
		val |= (1 << 26);
	write32((rt_uint32_t)&tcon->tcon0_io_polarity, val);
	write32((rt_uint32_t)&tcon->tcon0_io_tristate, 0);
}