v3s，uart2作为调试口，使用w25q128作为存储。
参考论坛教程，修改后可以从spi flash启动uboot，也可以从uart2输出调试信息。
编译内核后，将设备树和内核烧录到spi flash，结果一直卡在start kernel这里，也不确定是不是内核这里设置串口2输出是否正常。
U-Boot SPL 2022.04 (Jun 15 2022 - 17:42:55 +0800)
DRAM: 64 MiB
Trying to boot from sunxi SPI
U-Boot 2022.04 (Jun 15 2022 - 17:42:55 +0800) Allwinner Tecy
CPU: Allwinner V3s (SUN8I 1681)
Model: Lichee Pi Zero
DRAM: 64 MiB
Core: 23 devices, 10 uclasses, devicetree: separate
WDT: Not starting watchdog@1c20ca0
MMC: mmc@1c0f000: 0
Loading Environment from SPIFlash... SF: Detected w25q128 wB
*** Warning - bad CRC, using default environment
Loading Environment from FAT... Card did not respond to vol0
In: serial@1c28800
Out: serial@1c28800
Err: serial@1c28800
Net: No ethernet found.
Hit any key to stop autoboot: 0
SF: Detected w25q128 with page size 256 Bytes, erase size 4B
device 0 offset 0x100000, size 0x10000
SF: 65536 bytes @ 0x100000 Read: OK
device 0 offset 0x110000, size 0x400000
SF: 4194304 bytes @ 0x110000 Read: OK
Kernel image @ 0x41000000 [ 0x000000 - 0x4c0868 ]
## Flattened Device Tree blob at 41800000
Booting using the fdt blob at 0x41800000
Loading Device Tree to 42dfa000, end 42dffcf9 ... OK
Starting kernel ...
uboot的环境变量：
=> printenv
arch=arm
baudrate=115200
board=sunxi
board_name=sunxi
boot_a_script=load ${devtype} ${devnum}:${distro_bootpart} ${scriptaddr} ${prefix}${script}; source ${scriptaddr}
boot_efi_binary=load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} efi/boot/bootarm.efi; if fdt addr ${fdt_addr_r}; then booi
boot_efi_bootmgr=if fdt addr ${fdt_addr_r}; then bootefi bootmgr ${fdt_addr_r};else bootefi bootmgr;fi
boot_extlinux=sysboot ${devtype} ${devnum}:${distro_bootpart} any ${scriptaddr} ${prefix}${boot_syslinux_conf}
boot_prefixes=/ /boot/
boot_script_dhcp=boot.scr.uimg
boot_scripts=boot.scr.uimg boot.scr
boot_syslinux_conf=extlinux/extlinux.conf
boot_targets=fel mmc0 pxe dhcp
bootargs=console=ttyS2,115200 earlyprintk panic=5 rootwait mtdparts=spi0.0:1M(uboot)ro,64k(dtb)ro,4M(kernel)ro,-(rootfs) root=31:03 rw 2
bootcmd=sf probe 0; sf read 0x41800000 0x100000 0x10000; sf read 0x41000000 0x110000 0x400000; bootz 0x41000000 - 0x41800000
bootcmd_dhcp=devtype=dhcp; if dhcp ${scriptaddr} ${boot_script_dhcp}; then source ${scriptaddr}; fi;setenv efi_fdtfile ${fdtfile}; if t;
bootcmd_fel=if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then echo '(FEL boot)'; source ${fel_scriptaddr}; fi
bootcmd_mmc0=devnum=0; run mmc_boot
bootcmd_pxe=dhcp; if pxe get; then pxe boot; fi
bootdelay=2
bootm_size=0x2e00000
console=ttyS0,115200
cpu=armv7
dfu_alt_info_ram=kernel ram 0x41000000 0x1000000;fdt ram 0x41800000 0x100000;ramdisk ram 0x41C00000 0x4000000
distro_bootcmd=for target in ${boot_targets}; do run bootcmd_${target}; done
efi_dtb_prefixes=/ /dtb/ /dtb/current/
fdt_addr_r=0x41800000
fdtcontroladdr=43d6d7b0
fdtfile=sun8i-v3s-licheepi-zero.dtb
fdtoverlay_addr_r=0x41B00000
kernel_addr_r=0x41000000
load_efi_dtb=load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} ${prefix}${efi_fdtfile}
loadaddr=0x42000000
mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi
partitions=name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};name=loader2,size=984k,uuid=${uuid_gpt_loader2};name=esp,size=128M,b;
pxefile_addr_r=0x41A00000
ramdisk_addr_r=0x41C00000
scan_dev_for_boot=echo Scanning ${devtype} ${devnum}:${distro_bootpart}...; for prefix in ${boot_prefixes}; do run scan_dev_for_extlinu;
scan_dev_for_boot_part=part list ${devtype} ${devnum} -bootable devplist; env exists devplist || setenv devplist 1; for distro_bootpartt
scan_dev_for_efi=setenv efi_fdtfile ${fdtfile}; if test -z "${fdtfile}" -a -n "${soc}"; then setenv efi_fdtfile ${soc}-${board}${boardve
scan_dev_for_extlinux=if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${boot_syslinux_conf}; then echo Found ${prefix}${booi
scan_dev_for_scripts=for script in ${boot_scripts}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${script}; then echoe
scriptaddr=0x41900000
serial#=12c000028cc76015
soc=sunxi
stderr=serial@1c28800
stdin=serial@1c28800
stdout=serial@1c28800
uuid_gpt_esp=c12a7328-f81f-11d2-ba4b-00a0c93ec93b
uuid_gpt_system=69dad710-2ce4-4e3c-b16c-21a1d49abed3
Environment size: 4494/65532 bytes设备树如下：
=> fdt print
/ {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
interrupt-parent = <0x00000001>;
model = "Lichee Pi Zero";
compatible = "licheepi,licheepi-zero", "allwinner,sun8i-v3s";
chosen {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
ranges;
stdout-path = "serial2:115200n8";
framebuffer-lcd {
compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
allwinner,pipeline = "mixer0-lcd0";
clocks = <0x00000002 0x00000006 0x00000003 0x00000040>;
status = "disabled";
};
};
cpus {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0x00000000>;
clocks = <0x00000003 0x0000000e>;
};
};
display-engine {
compatible = "allwinner,sun8i-v3s-display-engine";
allwinner,pipelines = <0x00000004>;
status = "disabled";
};
timer {
compatible = "arm,armv7-timer";
interrupts = <0x00000001 0x0000000d 0x00000f08 0x00000001 0x0000000e 0x00000f08 0x00000001 0x0000000b 0x00000f08 0x0000;
};
clocks {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
ranges;
osc24M_clk {
#clock-cells = <0x00000000>;
compatible = "fixed-clock";
clock-frequency = <0x016e3600>;
clock-accuracy = <0x0000c350>;
clock-output-names = "osc24M";
phandle = <0x0000000d>;
};
osc32k_clk {
#clock-cells = <0x00000000>;
compatible = "fixed-clock";
clock-frequency = <0x00008000>;
clock-accuracy = <0x0000c350>;
clock-output-names = "ext-osc32k";
phandle = <0x0000000f>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
ranges;
clock@1000000 {
compatible = "allwinner,sun8i-v3s-de2-clk";
reg = <0x01000000 0x00010000>;
clocks = <0x00000003 0x00000023 0x00000003 0x0000003f>;
clock-names = "bus", "mod";
resets = <0x00000003 0x00000022>;
#clock-cells = <0x00000001>;
#reset-cells = <0x00000001>;
phandle = <0x00000002>;
};
mixer@1100000 {
compatible = "allwinner,sun8i-v3s-de2-mixer";
reg = <0x01100000 0x00100000>;
clocks = <0x00000002 0x00000000 0x00000002 0x00000006>;
clock-names = "bus", "mod";
resets = <0x00000002 0x00000000>;
phandle = <0x00000004>;
ports {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
port@1 {
reg = <0x00000001>;
endpoint {
remote-endpoint = <0x00000005>;
phandle = <0x00000006>;
};
};
};
};
system-control@1c00000 {
compatible = "allwinner,sun8i-v3s-system-control", "allwinner,sun8i-h3-system-control";
reg = <0x01c00000 0x000000d0>;
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
ranges;
phandle = <0x00000014>;
};
interrupt-controller@1c000d0 {
compatible = "allwinner,sun8i-v3s-nmi", "allwinner,sun9i-a80-nmi";
interrupt-controller;
#interrupt-cells = <0x00000002>;
reg = <0x01c000d0 0x0000000c>;
interrupts = <0x00000000 0x00000020 0x00000004>;
};
dma-controller@1c02000 {
compatible = "allwinner,sun8i-v3s-dma";
reg = <0x01c02000 0x00001000>;
interrupts = <0x00000000 0x00000032 0x00000004>;
clocks = <0x00000003 0x00000015>;
resets = <0x00000003 0x00000006>;
#dma-cells = <0x00000001>;
phandle = <0x0000000a>;
};
lcd-controller@1c0c000 {
compatible = "allwinner,sun8i-v3s-tcon";
reg = <0x01c0c000 0x00001000>;
interrupts = <0x00000000 0x00000056 0x00000004>;
clocks = <0x00000003 0x00000021 0x00000003 0x00000040>;
clock-names = "ahb", "tcon-ch0";
clock-output-names = "tcon-pixel-clock";
#clock-cells = <0x00000000>;
resets = <0x00000003 0x0000001b>;
reset-names = "lcd";
status = "disabled";
ports {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
port@0 {
reg = <0x00000000>;
endpoint {
remote-endpoint = <0x00000006>;
phandle = <0x00000005>;
};
};
port@1 {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
reg = <0x00000001>;
};
};
};
mmc@1c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x00001000>;
clocks = <0x00000003 0x00000016 0x00000003 0x0000002d 0x00000003 0x0000002f 0x00000003 0x0000002e>;
clock-names = "ahb", "mmc", "output", "sample";
resets = <0x00000003 0x00000007>;
reset-names = "ahb";
interrupts = <0x00000000 0x0000003c 0x00000004>;
pinctrl-names = "default";
pinctrl-0 = <0x00000007>;
status = "okay";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
broken-cd;
bus-width = <0x00000004>;
vmmc-supply = <0x00000008>;
};
mmc@1c10000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c10000 0x00001000>;
clocks = <0x00000003 0x00000017 0x00000003 0x00000030 0x00000003 0x00000032 0x00000003 0x00000031>;
clock-names = "ahb", "mmc", "output", "sample";
resets = <0x00000003 0x00000008>;
reset-names = "ahb";
interrupts = <0x00000000 0x0000003d 0x00000004>;
pinctrl-names = "default";
pinctrl-0 = <0x00000009>;
status = "disabled";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
};
mmc@1c11000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c11000 0x00001000>;
clocks = <0x00000003 0x00000018 0x00000003 0x00000033 0x00000003 0x00000035 0x00000003 0x00000034>;
clock-names = "ahb", "mmc", "output", "sample";
resets = <0x00000003 0x00000009>;
reset-names = "ahb";
interrupts = <0x00000000 0x0000003e 0x00000004>;
status = "disabled";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
};
crypto@1c15000 {
compatible = "allwinner,sun8i-v3s-crypto", "allwinner,sun8i-a33-crypto";
reg = <0x01c15000 0x00001000>;
interrupts = <0x00000000 0x00000050 0x00000004>;
clocks = <0x00000003 0x00000014 0x00000003 0x00000036>;
clock-names = "ahb", "mod";
dmas = <0x0000000a 0x00000010 0x0000000a 0x00000010>;
dma-names = "rx", "tx";
resets = <0x00000003 0x00000005>;
reset-names = "ahb";
};
usb@1c19000 {
compatible = "allwinner,sun8i-h3-musb";
reg = <0x01c19000 0x00000400>;
clocks = <0x00000003 0x0000001d>;
resets = <0x00000003 0x00000011>;
interrupts = <0x00000000 0x00000047 0x00000004>;
interrupt-names = "mc";
phys = <0x0000000b 0x00000000>;
phy-names = "usb";
extcon = <0x0000000b 0x00000000>;
status = "okay";
dr_mode = "otg";
};
phy@1c19400 {
compatible = "allwinner,sun8i-v3s-usb-phy";
reg = <0x01c19400 0x0000002c 0x01c1a800 0x00000004>;
reg-names = "phy_ctrl", "pmu0";
clocks = <0x00000003 0x00000038>;
clock-names = "usb0_phy";
resets = <0x00000003 0x00000000>;
reset-names = "usb0_reset";
status = "okay";
#phy-cells = <0x00000001>;
usb0_id_det-gpios = <0x0000000c 0x00000005 0x00000006 0x00000000>;
phandle = <0x0000000b>;
};
clock@1c20000 {
compatible = "allwinner,sun8i-v3s-ccu";
reg = <0x01c20000 0x00000400>;
clocks = <0x0000000d 0x0000000e 0x00000000>;
clock-names = "hosc", "losc";
#clock-cells = <0x00000001>;
#reset-cells = <0x00000001>;
phandle = <0x00000003>;
};
rtc@1c20400 {
#clock-cells = <0x00000001>;
compatible = "allwinner,sun8i-v3-rtc";
reg = <0x01c20400 0x00000054>;
interrupts = <0x00000000 0x00000028 0x00000004 0x00000000 0x00000029 0x00000004>;
clocks = <0x0000000f>;
clock-output-names = "osc32k", "osc32k-out";
phandle = <0x0000000e>;
};
pinctrl@1c20800 {
compatible = "allwinner,sun8i-v3s-pinctrl";
reg = <0x01c20800 0x00000400>;
interrupts = <0x00000000 0x0000000f 0x00000004 0x00000000 0x00000011 0x00000004>;
clocks = <0x00000003 0x00000025 0x0000000d 0x0000000e 0x00000000>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <0x00000003>;
interrupt-controller;
#interrupt-cells = <0x00000003>;
phandle = <0x0000000c>;
i2c0-pins {
pins = "PB6", "PB7";
function = "i2c0";
phandle = <0x00000013>;
};
uart0-pb-pins {
pins = "PB8", "PB9";
function = "uart0";
phandle = <0x00000011>;
};
uart2-pins {
pins = "PB0", "PB1";
function = "uart2";
phandle = <0x00000012>;
};
mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
function = "mmc0";
drive-strength = <0x0000001e>;
bias-pull-up;
phandle = <0x00000007>;
};
mmc1-pins {
pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
function = "mmc1";
drive-strength = <0x0000001e>;
bias-pull-up;
phandle = <0x00000009>;
};
spi0-pins {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
phandle = <0x00000017>;
};
};
timer@1c20c00 {
compatible = "allwinner,sun8i-v3s-timer";
reg = <0x01c20c00 0x000000a0>;
interrupts = <0x00000000 0x00000012 0x00000004 0x00000000 0x00000013 0x00000004 0x00000000 0x00000014 0x0000000;
clocks = <0x0000000d>;
};
watchdog@1c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x00000020>;
interrupts = <0x00000000 0x00000019 0x00000004>;
clocks = <0x0000000d>;
};
pwm@1c21400 {
compatible = "allwinner,sun8i-v3s-pwm", "allwinner,sun7i-a20-pwm";
reg = <0x01c21400 0x0000000c>;
clocks = <0x0000000d>;
#pwm-cells = <0x00000003>;
status = "disabled";
};
lradc@1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x00000400>;
interrupts = <0x00000000 0x0000001e 0x00000004>;
status = "disabled";
};
codec@1c22c00 {
#sound-dai-cells = <0x00000000>;
compatible = "allwinner,sun8i-v3s-codec";
reg = <0x01c22c00 0x00000400>;
interrupts = <0x00000000 0x0000001d 0x00000004>;
clocks = <0x00000003 0x00000024 0x00000003 0x00000046>;
clock-names = "apb", "codec";
resets = <0x00000003 0x00000028>;
dmas = <0x0000000a 0x0000000f 0x0000000a 0x0000000f>;
dma-names = "rx", "tx";
allwinner,codec-analog-controls = <0x00000010>;
status = "disabled";
};
codec-analog@1c23000 {
compatible = "allwinner,sun8i-v3s-codec-analog";
reg = <0x01c23000 0x00000004>;
phandle = <0x00000010>;
};
serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x00000400>;
interrupts = <0x00000000 0x00000000 0x00000004>;
reg-shift = <0x00000002>;
reg-io-width = <0x00000004>;
clocks = <0x00000003 0x00000028>;
dmas = <0x0000000a 0x00000006 0x0000000a 0x00000006>;
dma-names = "rx", "tx";
resets = <0x00000003 0x00000031>;
status = "okay";
pinctrl-0 = <0x00000011>;
pinctrl-names = "default";
};
serial@1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x00000400>;
interrupts = <0x00000000 0x00000001 0x00000004>;
reg-shift = <0x00000002>;
reg-io-width = <0x00000004>;
clocks = <0x00000003 0x00000029>;
dmas = <0x0000000a 0x00000007 0x0000000a 0x00000007>;
dma-names = "rx", "tx";
resets = <0x00000003 0x00000032>;
status = "disabled";
};
serial@1c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x00000400>;
interrupts = <0x00000000 0x00000002 0x00000004>;
reg-shift = <0x00000002>;
reg-io-width = <0x00000004>;
clocks = <0x00000003 0x0000002a>;
dmas = <0x0000000a 0x00000008 0x0000000a 0x00000008>;
dma-names = "rx", "tx";
resets = <0x00000003 0x00000033>;
pinctrl-0 = <0x00000012>;
pinctrl-names = "default";
status = "okay";
};
i2c@1c2ac00 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2ac00 0x00000400>;
interrupts = <0x00000000 0x00000006 0x00000004>;
clocks = <0x00000003 0x00000026>;
resets = <0x00000003 0x0000002e>;
pinctrl-names = "default";
pinctrl-0 = <0x00000013>;
status = "disabled";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
};
i2c@1c2b000 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b000 0x00000400>;
interrupts = <0x00000000 0x00000007 0x00000004>;
clocks = <0x00000003 0x00000027>;
resets = <0x00000003 0x0000002f>;
status = "disabled";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
};
ethernet@1c30000 {
compatible = "allwinner,sun8i-v3s-emac";
syscon = <0x00000014>;
reg = <0x01c30000 0x00010000>;
interrupts = <0x00000000 0x00000052 0x00000004>;
interrupt-names = "macirq";
resets = <0x00000003 0x0000000c>;
reset-names = "stmmaceth";
clocks = <0x00000003 0x0000001a>;
clock-names = "stmmaceth";
phy-handle = <0x00000015>;
phy-mode = "mii";
status = "disabled";
mdio {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
compatible = "snps,dwmac-mdio";
phandle = <0x00000016>;
};
mdio-mux {
compatible = "allwinner,sun8i-h3-mdio-mux";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
mdio-parent-bus = <0x00000016>;
mdio@1 {
compatible = "allwinner,sun8i-h3-mdio-internal";
reg = <0x00000001>;
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x00000001>;
clocks = <0x00000003 0x0000002b>;
resets = <0x00000003 0x00000027>;
phandle = <0x00000015>;
};
};
};
};
spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x00001000>;
interrupts = <0x00000000 0x00000041 0x00000004>;
clocks = <0x00000003 0x0000001c 0x00000003 0x00000037>;
clock-names = "ahb", "mod";
dmas = <0x0000000a 0x00000017 0x0000000a 0x00000017>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <0x00000017>;
resets = <0x00000003 0x0000000f>;
status = "okay";
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
};
interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x00001000 0x01c82000 0x00002000 0x01c84000 0x00002000 0x01c86000 0x00002000>;
interrupt-controller;
#interrupt-cells = <0x00000003>;
interrupts = <0x00000001 0x00000009 0x00000f04>;
phandle = <0x00000001>;
};
camera@1cb4000 {
compatible = "allwinner,sun8i-v3s-csi";
reg = <0x01cb4000 0x00003000>;
interrupts = <0x00000000 0x00000054 0x00000004>;
clocks = <0x00000003 0x00000022 0x00000003 0x00000043 0x00000003 0x0000003c>;
clock-names = "bus", "mod", "ram";
resets = <0x00000003 0x0000001e>;
status = "disabled";
};
};
ahci-5v {
compatible = "regulator-fixed";
regulator-name = "ahci-5v";
regulator-min-microvolt = <0x004c4b40>;
regulator-max-microvolt = <0x004c4b40>;
regulator-boot-on;
enable-active-high;
gpio = <0x0000000c 0x00000001 0x00000008 0x00000000>;
status = "disabled";
};
usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <0x004c4b40>;
regulator-max-microvolt = <0x004c4b40>;
enable-active-high;
gpio = <0x0000000c 0x00000001 0x00000009 0x00000000>;
status = "disabled";
};
usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1-vbus";
regulator-min-microvolt = <0x004c4b40>;
regulator-max-microvolt = <0x004c4b40>;
regulator-boot-on;
enable-active-high;
gpio = <0x0000000c 0x00000007 0x00000006 0x00000000>;
status = "disabled";
};
usb2-vbus {
compatible = "regulator-fixed";
regulator-name = "usb2-vbus";
regulator-min-microvolt = <0x004c4b40>;
regulator-max-microvolt = <0x004c4b40>;
regulator-boot-on;
enable-active-high;
gpio = <0x0000000c 0x00000007 0x00000003 0x00000000>;
status = "disabled";
};
vcc3v0 {
compatible = "regulator-fixed";
regulator-name = "vcc3v0";
regulator-min-microvolt = <0x002dc6c0>;
regulator-max-microvolt = <0x002dc6c0>;
};
vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <0x00325aa0>;
regulator-max-microvolt = <0x00325aa0>;
phandle = <0x00000008>;
};
vcc5v0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v0";
regulator-min-microvolt = <0x004c4b40>;
regulator-max-microvolt = <0x004c4b40>;
};
aliases {
serial0 = "/soc/serial@1c28000";
serial2 = "/soc/serial@1c28800";
spi0 = "/soc/spi@1c68000";
};
leds {
compatible = "gpio-leds";
blue_led {
label = "licheepi:blue:usr";
gpios = <0x0000000c 0x00000006 0x00000001 0x00000001>;
};
green_led {
label = "licheepi:green:usr";
gpios = <0x0000000c 0x00000006 0x00000000 0x00000001>;
default-state = "on";
};
red_led {
label = "licheepi:red:usr";
gpios = <0x0000000c 0x00000006 0x00000002 0x00000001>;
};
};
};最近编辑记录 Gentlepig (2022-06-16 12:00:39)
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问题已解决，spiflash规划时，给kernel规划了4M空间，实际上编译的kernel达到了5M。
去掉net组件及ext4支持，编译得到3.3M左右。
后来群友提示，可以使用xz压缩，发现默认使用的是gzip压缩，使用xz压缩的话，不作裁减，编译得到3.4M。但是uboot里没找到xz解压所的支持。于是选了lzap，编译后内核大小是3.7M左右。
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