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楼主 # 2023-05-13 10:01:58

xboot
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全志R128来袭,有想入坑的吗?我先来点初步研究成果

全志R128里面有三个核心,一个M33,一个C906,还有一个DSP。

M33核主要负责引导,启动,安全,休眠,唤醒,低功耗,WIFI/BT等相关功能。
C906主要负责运行各种APP,控制各种外设驱动
DSP主要负责音频算法处理

现在手上拿到了一个有异常的板子,无法正常烧录,刷机,但fel模式是可以运行的。所以先尝试开发xfel对R128芯片的支持。

适配xfel,前面比较顺利,可以顺利读写SRAM,但exec命令被卡壳了,无法运行ARM payload,经过不断尝试,终于可以执行exec指令了,原来M33核的payload每一条指令不一定都是32位,有可能存在16位的,M33核无法编译出全32位指令。

QQ图片20230513100114.png

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楼主 #1 2023-05-13 10:19:11

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

虽然算是搞了exec指令,但如何可靠稳定的执行自己写的测试程序,现在测试下来,感觉还是有点怪意,初步分析,可能M33核心里面指令或者数据cache了,还没玩过M33,对这个核里面的细节不清楚,先不枉下结论了,但这个问题,是有必要去深究的。

R128里面有PSRAM,有nor flash。初步计划,针对R128芯片,后续xfel需要开发以下功能:


1,读写SRAM,(已完成)
2,执行运行在M33核的payload指令(已完成)
3,读取R128的SID(已完成)
4,初始化M33核心的jtag接口,此接口跟调试串口复用(已开发,未测试)
5,实现reset操作
6,初始化LSPRAM以及HSPSRAM
7,  支持启动C906核心,加载并执行通过write命令写入到RAM中的C906程序
8,  支持启动DSP核心,加载并执行通过write命令写入到RAM中的DSP程序 (优先级低,估计没手段验证)
9,支持烧写NOR FLASH

如果完美实现了这些功能,通过xfel来开发R128,估计要爽到飞起,开发验证都是足够便捷的。

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楼主 #3 2023-05-13 20:25:43

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

已实现RS128,PSRAM的初始化



xfel ddr r128-s1 - Initial PSRAM controller for R128-S1
xfel ddr r128-s2 - Initial PSRAM controller for R128-S2
xfel ddr r128-s3 - Initial PSRAM controller for R128-S3
xfel ddr r128-s2

执行初始化指令后,就是访问LSPRAM以及HSPSRAM了

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#4 2023-05-14 01:54:43

jlau
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

有人知道r128使用psram的逻辑吗?
psram里面应该也是sdram,为什么不直接用sdram?

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#5 2023-05-14 09:19:19

ubuntu
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

jlau 说:

有人知道r128使用psram的逻辑吗?
psram里面应该也是sdram,为什么不直接用sdram?

节省晶圆面积?

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#7 2023-05-14 15:30:24

Timaker
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

这芯片带wifi、蓝牙、DSP、M33,价格合适的话比ESP32S3更有潜力

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#8 2023-05-14 17:07:35

david
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

jlau 说:

有人知道r128使用psram的逻辑吗?
psram里面应该也是sdram,为什么不直接用sdram?

估计psram比sdram的封装成本低 更进一步猜hs psram是ospi的ls psram是qspi

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楼主 #9 2023-05-14 21:16:11

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

关于exec指令如何可靠稳定的执行自己写的测试程序的问题,经过深入研究,定位是M33核指令缓存相关问题。

我们编写的payload,如果上传到某个地址,然后在这个地址执行后,这部分代码就被缓存了,如果这个时候,我们在更新另外一个payload,通过write指令写入内存,SRAM或者LSPSRAM或者HSPSRAM中,然后新payload的执行地址如果跟原先的地址相同的话,这个时候就会出现不可预见的现象,执行的指令有可能是原先被缓存过payload。

既然分析到问题点了,解决手段,有两种方案:

一种是粗暴的关闭指令缓存,这种方案影响后续的执行效率,就不考虑了

另一种方案就是现在采用的方案,每一个payload保证开始的指令都是一致的,而且这些一致的指令里,首先做的动作就是清理指令,这样就能保证每个payload都能有效执行了,避免不可以预见的现象。

payload头指令

.syntax unified

	.global _start
_start:
	dsb.w sy
	isb.w sy
	ldr.w r0, _iciallu
	mov.w r1, #0x0
	str.w r1, [r0]
	dsb.w sy
	isb.w sy
	b.w reset
	.align 2
_iciallu:
	.word 0xe000ef50

reset:
	push.w { lr }
	/* ... */
	pop.w { lr }
	bx lr

经过以上处理后,就可以解决之前感觉怪意的问题,同时也验证了,payload放在LSPSRAM或在HSPRSRAM空间,都是可以正常执行的,不是必须是内部的SRAM。这就为后续的全RAM中执行程序,打下基础。什么M33程序,C906程序,DSP程序,理论上都是可以执行的。

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楼主 #10 2023-05-14 21:40:20

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

有了上面的研究,我们就可以编写一个纯粹的针对cortex-m33核的read32以及write32的payload了,为何要自己编写这两个payload,而不采用fel协议自带的读写R32,W32实现,是因为fel协议本身在读写内存时,是基于字节访问的,而某些控制器的寄存器是不支持字节访问,只支持word字访问,因为有这种限制,那fel自带的读写函数,是不适合操作芯片寄存器的。

read32.S

.syntax unified

	.global _start
_start:
	dsb.w sy
	isb.w sy
	ldr.w r0, _iciallu
	mov.w r1, #0x0
	str.w r1, [r0]
	dsb.w sy
	isb.w sy
	b.w reset
	.align 2
_iciallu:
	.word 0xe000ef50

reset:
	ldr.w r0, _adr
	adr.w r1, _val
	ldr.w r2, [r0]
	str.w r2, [r1]
	bx lr
	.align 2
_adr:
	.word 0x11223344
_val:
	.word 0x55667788

write32.S

.syntax unified

	.global _start
_start:
	dsb.w sy
	isb.w sy
	ldr.w r0, _iciallu
	mov.w r1, #0x0
	str.w r1, [r0]
	dsb.w sy
	isb.w sy
	b.w reset
	.align 2
_iciallu:
	.word 0xe000ef50

reset:
	ldr.w r0, _adr
	ldr.w r1, _val
	str.w r1, [r0]
	bx lr
	.align 2
_adr:
	.word 0x11223344
_val:
	.word 0x55667788

封装读写payload

static uint32_t payload_read32(struct xfel_ctx_t * ctx, uint32_t addr)
{
	static const uint8_t payload[] = {
		0xbf, 0xf3, 0x4f, 0x8f, 0xbf, 0xf3, 0x6f, 0x8f, 0xdf, 0xf8, 0x14, 0x00,
		0x4f, 0xf0, 0x00, 0x01, 0xc0, 0xf8, 0x00, 0x10, 0xbf, 0xf3, 0x4f, 0x8f,
		0xbf, 0xf3, 0x6f, 0x8f, 0x00, 0xf0, 0x02, 0xb8, 0x50, 0xef, 0x00, 0xe0,
		0xdf, 0xf8, 0x10, 0x00, 0x0f, 0xf2, 0x10, 0x01, 0xd0, 0xf8, 0x00, 0x20,
		0xc1, 0xf8, 0x00, 0x20, 0x70, 0x47, 0x00, 0xbf
	};
	uint32_t adr = cpu_to_le32(addr);
	uint32_t val;

	fel_write(ctx, ctx->version.scratchpad, (void *)payload, sizeof(payload));
	fel_write(ctx, ctx->version.scratchpad + sizeof(payload), (void *)&adr, sizeof(adr));
	fel_exec(ctx, ctx->version.scratchpad);
	fel_read(ctx, ctx->version.scratchpad + sizeof(payload) + sizeof(adr), (void *)&val, sizeof(val));
	return le32_to_cpu(val);
}

static void payload_write32(struct xfel_ctx_t * ctx, uint32_t addr, uint32_t val)
{
	static const uint8_t payload[] = {
		0xbf, 0xf3, 0x4f, 0x8f, 0xbf, 0xf3, 0x6f, 0x8f, 0xdf, 0xf8, 0x14, 0x00,
		0x4f, 0xf0, 0x00, 0x01, 0xc0, 0xf8, 0x00, 0x10, 0xbf, 0xf3, 0x4f, 0x8f,
		0xbf, 0xf3, 0x6f, 0x8f, 0x00, 0xf0, 0x02, 0xb8, 0x50, 0xef, 0x00, 0xe0,
		0xdf, 0xf8, 0x0c, 0x00, 0xdf, 0xf8, 0x0c, 0x10, 0xc0, 0xf8, 0x00, 0x10,
		0x70, 0x47, 0x00, 0xbf
	};
	uint32_t params[2] = {
		cpu_to_le32(addr),
		cpu_to_le32(val),
	};

	fel_write(ctx, ctx->version.scratchpad, (void *)payload, sizeof(payload));
	fel_write(ctx, ctx->version.scratchpad + sizeof(payload), (void *)params, sizeof(params));
	fel_exec(ctx, ctx->version.scratchpad);
}

利用读写payload实现使能jtag的pinmux功能

static int chip_jtag(struct xfel_ctx_t * ctx)
{
	uint32_t addr;
	uint32_t val;

	/* Config PA16 and PA17 to SWD-TMS and SWD-TCK */
	addr = 0x4004a400 + 0x08;
	val = payload_read32(ctx, addr);
	val &= ~(0xf << ((0 & 0xf) << 2));
	val |= ((0x8 & 0xf) << ((0 & 0xf) << 2));
	payload_write32(ctx, addr, val);

	val = payload_read32(ctx, addr);
	val &= ~(0xf << ((1 & 0xf) << 2));
	val |= ((0x8 & 0xf) << ((1 & 0xf) << 2));
	payload_write32(ctx, addr, val);

	return 1;
}

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楼主 #11 2023-05-14 22:35:51

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

再接再厉,利用读写payload操作M33核的看门狗,实现reset功能。

static int chip_reset(struct xfel_ctx_t * ctx)
{
	payload_write32(ctx, 0x40020400 + 0x14, (0x16aa << 16) | (0x1 << 0));
	payload_write32(ctx, 0x40020400 + 0x18, (0x16aa << 16) | (1 << 0));
	payload_write32(ctx, 0x40020400 + 0x10, (0xa57 << 1) | (1 << 0));
	return 1;
}

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#12 2023-05-16 16:27:48

1847123212
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

赞赞赞,大佬加油,菜鸡就可以开始跟着大佬脚步开发了😀😀😀😀

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楼主 #13 2023-05-16 19:13:52

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

关于R128 M33核的thumb指令,有个特别要注意的地方,如果你编写的M33程序入口地址就是thumb指令,那么执行地址的最低位要置1,这样M33核才开始执行2字节的指令,否则当成4字节的指令,此问题需要特别注意,否则调试会让你调得怀疑人生。

比如rt_system.bin的入口地址是0x08004000,那么执行地址就是0x08004001

xfel write 0x08004000 lichee/rtos/build/r128s2_pro_m33/img/rt_system.bin;
xfel exec 0x08004001

最近编辑记录 xboot (2023-05-16 19:17:22)

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楼主 #14 2023-05-16 19:25:35

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

用xfel指令加载sdk默认镜像试验。

#初始化DDR
xfel ddr r128-s2;

#加载M33核程序到0x08004000
xfel write 0x08004000 lichee/rtos/build/r128s2_pro_m33/img/rt_system.bin;

#加载C906程序到0x08200000,注意此程序是SPI NOR XIP的,光加载到RAM中是无法完整运行的,这里仅做引导C906试验。
xfel write 0x08200000 lichee/rtos/build/r128s2_pro_c906/img/rt_system.bin;

#运行M33核心程序,M33核心运行时,会自动的运行C906以及DSP程序。所以,将C906和DSP程序准备好,可以随着M33核一起启动。
xfel exec 0x08004001

现象如下:

[0]fes begin commit:7de04b7c
[2]set pll end
[3]board init ok
[5]fake dram ok
[7]heap: 0x40a0000 size:0xe000
[9]lpsram init
[11]lspsram init aps64
[13]lspsram dqs:0x011a01a0
[18]psram chip APS64 init ok!, freq 1920000000
[22]Init psram controller ok
[24]hpsram init
[26]DRAM DQS gate is PD mode.
[29]DRAM BOOT DRIVE INFO: V2.00
[32]DRAM CLK = 800 MHZ
[34]dram_tpr11 = 0x0 , dram_tpr12 =0x0
[37]dram_tpr9 = 0x2020
[86]DRAM simple test OK.
[88]DRAM SIZE =8 MB
[100]fes1 done
[0]fes begin commit:7de04b7c
[2]set pll end
[3]board init ok
[5]fake dram ok
[7]heap: 0x40a0000 size:0xe000
[9]lpsram init
[11]lspsram init aps64
[13]lspsram dqs:0x01060060
[18]psram chip APS64 init ok!, freq 1920000000
[22]Init psram controller ok
[24]hpsram init
[26]DRAM DQS gate is PD mode.
[29]DRAM BOOT DRIVE INFO: V2.00
[32]DRAM CLK = 800 MHZ
[34]dram_tpr11 = 0x0 , dram_tpr12 =0x0
[37]dram_tpr9 = 0x2020
[86]DRAM simple test OK.
[88]DRAM SIZE =8 MB
[100]fes1 done
Warning: clk ck1-m33 enable_count is 2, parent is dpll1, parent rate is 1920000000, should not be changed from 480000000 to 384000000, please recheck whether the operation is correct
Warning: clk ck1-dev enable_count is 2, parent is dpll1, parent rate is 1920000000, should not be changed from 1920000000 to 384000000, please recheck whether the operation is correct
] not support in sys_config
M33 CPU Clock Freq: 192 MHz

 *******************************************
 **    Welcome to R128 FreeRTOS V1.5.0    **
 ** Copyright (C) 2019-2022 AllwinnerTech **
 **                                       **
 **      starting armv8m FreeRTOS V0.7    **
 *******************************************

Date:May 10 2023, Time:14:01:58
[E(m33)] get dram_para dram_no_lpsram failed, skip LSPSRAM standby
[E(m33)] get dram_para dram_clk failed, skip HSPSRAM standby
flash not ready, skip mount
---boot dsp(start_addr: 0x0c000660)---
---boot c906---
C906 CPU Freq: 480 MHz

 *******************************************
 **    Welcome to R128 FreeRTOS V1.5.0    **
 ** Copyright (C) 2019-2022 AllwinnerTech **
 **                                       **
 **      starting riscv FreeRTOS V0.7     **
 *******************************************

Date:May 10 2023, Time:14:09:34
devfs: mount devfs to /dev ok
use default flash chip mJedec 0x0
[FD I]: Enter 32 Bit Address Mode

[FD I]: mode: 0x20, freq: 96000000Hz, drv: 0
[FD I]: jedec: 0x0, suspend_support: 1
no flash, skip init nor
=====================================================================================================
                                         EXC_LOAD_ACCESS              
=====================================================================================================

gprs:
 x0:0x0000000000000000   ra:0x0000000008255c2e   sp:0x000000000830dfe0   gp:0x00000000082c5420
 tp:0x0000000000000000   t0:0x0000000000000030   t1:0x0000000000000000   t2:0x0000000000000009
 s0:0x00000000082fca78   s1:0x00000000082b3df8   a0:0xffffffffffffffff   a1:0x0000000000000000
 a2:0x0000000000000000   a3:0x000000000830e070   a4:0x0000000000000000   a5:0x0000000000000000
 a6:0x0000000000000002   a7:0x000000004004707c   s2:0x00000000082b3df8   s3:0x0000000008336b70
 s5:0xa5a5a5a5a5a5a5a5   s5:0xa5a5a5a5a5a5a5a5   s6:0xa5a5a5a5a5a5a5a5   s7:0xa5a5a5a5a5a5a5a5
 s8:0xa5a5a5a5a5a5a5a5   s9:0xa5a5a5a5a5a5a5a5  s10:0xa5a5a5a5a5a5a5a5  s11:0xa5a5a5a5a5a5a5a5
 t3:0x0000000000000000   t4:0x0000000000000000   t5:0x0000000000000020   t6:0x0000000000000000

other:
mepc    :0x0000000008255c40
mcause  :0x0000000000000005
mtval   :0x0000000000000000
mstatus :0x0000000a00003980
mscratch:0x0000000000000000

-------backtrace-----------
backtrace : 0X08255C40 
backtrace : 0X0825EFB6 
backtrace : 0X0825EE76 
---------------------------

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楼主 #15 2023-05-16 19:34:26

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

至此XFEL流程都已跑通,剩下的就是编写自己得程序了,以及SPI NOR FLASH烧写功能,因考虑到WIFI/BT固件等问题,建议大家M33核还是跑官方的freerots,C906核就可以自由发挥了,比如跑个xboot,甚至linux,可以随心所欲了。

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#16 2023-05-17 08:44:42

kekemuyu
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

能跑动linux?

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#17 2023-05-17 18:04:14

david
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

楼主牛x 期待R128的生态能早日建立起来

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#18 2023-05-17 19:26:04

yelong98
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

官方明确说了没有linux的支持计划

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楼主 #19 2023-05-17 23:39:22

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

通过xfel工具,R128现在已可以运行xboot,LOG记录如下,下面就可以愉快的编写R128驱动了。

█████████████████████████████████
██ ▄▄▄▄▄ █ ▀███▀ ▄█▀█ ▄█ ▄▄▄▄▄ ██
██ █   █ █ ▀▄█▄▄▀▄▀█▄▀ █ █   █ ██
██ █▄▄▄█ █▄   ▄▄▀█▄▀█ ▄█ █▄▄▄█ ██
██▄▄▄▄▄▄▄█ █ █▄▀▄█▄▀▄▀▄█▄▄▄▄▄▄▄██
███▄▄█▄█▄▄▀█ ▀  ▀ ▀  ███ ▀▄ ▄▄ ██
██▀  ▄▄ ▄▄█▄▄ ▀  ▄▄▀▄▀▄█ ▀▄▀▄▀▄██
██▄▀▄█▄█▄ ▄▄█▀▄▀  ▀  ███ ██ ██ ██
███ ▄▄▄▄▄▄ ▄▄▀▀▄▄█▀▀▄▀▄▀▄▀▄▀▄▀▄██
██▄▄█▀▄▄▄ ▄ ▀▀▄▄▄▀▄  ███  █ ██ ██
██▄▀▄▄█ ▄▀▀▄▀▄ ▄▀▀▄▀▄▀▄▀▄▀▄▀▄▀▄██
██▄██▄█▄▄█▀▀▀▄█ ███  █ ▄▄▄  ██ ██
██ ▄▄▄▄▄ █▄ ██▀ ▀▀▄▀▄  █▄█ ▀▄▀▄██
██ █   █ █▄▀██▀█▄██  ▀▄ ▄▄  █▀ ██
██ █▄▄▄█ █ ▀▀▄▄██▀▄▀▄█  █▀▄▀▄▀▄██
██▄▄▄▄▄▄▄███▄▄▄▄▄██▄▄█▄█▄█▄▄█▄▄██
█████████████████████████████████
       _                   _                     
 _  _ | |___ _____ _____ _| |_                   
\ \/ /|  _  |  _  |  _  |_   _|  (C) 2007-2023   
 )  ( | |_| | |_| | |_| | | |____JIANJUN.JIANG__ 
/_/\_\|_____|_____|_____| |_____________________|
V3.0.0 (May 17 2023 - 23:25:28) - [yuzuki][Yuzuki Based On Allwinner R128 SOC]
[    0.000020]Probe device 'blk-romdisk.0' with blk-romdisk
[    0.000800]Probe device 'osc48m' with clk-fixed
[    0.000810]Probe device 'osc32k' with clk-fixed
[    0.000820]Probe device 'bus-uart0' with clk-fixed
[    0.000830]Probe device 'wdg' with clk-fixed
[    0.000840]Probe device 'uart-16550.0' with uart-16550
[    0.000850]Probe device 'wdg-r128.0' with wdg-r128
[    0.000860]Probe device 'console-uart.0' with console-uart
[    0.000970]mount /private with 'ram' filesystem
Press any key to stop auto boot:  0.330
xboot: /#  

离线

楼主 #20 2023-05-22 16:57:07

xboot
会员
注册时间: 2019-10-15
已发帖子: 692
积分: 434

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

补充一个手册上没有的信息,R128内置SPI NOR FLASH,此Flash接在GPIOB8,GPIOB9,GPIOB10,GPIOB11,GPIOB12,GPIOB13 Pin脚上,功能3为SPI0 pinmux

	"spi-r128:0@0x40009000": {
		"clock-name": "spi0",
		"reset": 0,
		"sclk-gpio": 45,
		"sclk-gpio-config": 3,
		"mosi-gpio": 42,
		"mosi-gpio-config": 3,
		"miso-gpio": 43,
		"miso-gpio-config": 3,
		"cs-gpio": 44,
		"cs-gpio-config": 3
	},

离线

楼主 #21 2023-05-22 17:23:30

xboot
会员
注册时间: 2019-10-15
已发帖子: 692
积分: 434

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

针对R128,现已实现了中断驱动,GPIO驱动,TIMER驱动,SPI驱动,I2C驱动,时钟等驱动,打印log如下:

[0]fes begin commit:7de04b7c
[2]set pll end
[3]board init ok
[5]fake dram ok
[7]heap: 0x40a0000 size:0xe000
[9]lpsram init
[11]lspsram init aps64
[13]lspsram dqs:0x011c01c0
[18]psram chip APS64 init ok!, freq 1920000000
[22]Init psram controller ok
[24]hpsram init
[26]DRAM DQS gate is PD mode.
[29]DRAM BOOT DRIVE INFO: V2.00
[32]DRAM CLK = 800 MHZ
[34]dram_tpr11 = 0x0 , dram_tpr12 =0x0
[37]dram_tpr9 = 0x2424
[86]DRAM simple test OK.
[88]DRAM SIZE =8 MB
[100]fes1 done
Warning: clk ck1-m33 enable_count is 2, parent is dpll1, parent rate is 1920000000, should not be changed from 480000000 to 384000000, please recheck whether the operation is correct
Warning: clk ck1-dev enable_count is 2, parent is dpll1, parent rate is 1920000000, should not be changed from 1920000000 to 384000000, please recheck whether the operation is correct
M33 CPU Clock Freq: 192 MHz

 *******************************************
 **    Welcome to R128 FreeRTOS V1.5.0    **
 ** Copyright (C) 2019-2022 AllwinnerTech **
 **                                       **
 **      starting armv8m FreeRTOS V0.7    **
 *******************************************

Date:May 10 2023, Time:14:01:58
flash not ready, skip mount
---boot dsp(start_addr: 0x0c000660)---
---boot
█████████████████████████████████
██ ▄▄▄▄▄ █ ▀███▀ ▄█▀█ ▄█ ▄▄▄▄▄ ██
██ █   █ █ ▀▄█▄▄▀▄▀█▄▀ █ █   █ ██
██ █▄▄▄█ █▄   ▄▄▀█▄▀█ ▄█ █▄▄▄█ ██
██▄▄▄▄▄▄▄█ █ █▄▀▄█▄▀▄▀▄█▄▄▄▄▄▄▄██
███▄▄█▄█▄▄▀█ ▀  ▀ ▀  ███ ▀▄ ▄▄ ██
██▀  ▄▄ ▄▄█▄▄ ▀  ▄▄▀▄▀▄█ ▀▄▀▄▀▄██
██▄▀▄█▄█▄ ▄▄█▀▄▀  ▀  ███ ██ ██ ██
███ ▄▄▄▄▄▄ ▄▄▀▀▄▄█▀▀▄▀▄▀▄▀▄▀▄▀▄██
██▄▄█▀▄▄▄ ▄ ▀▀▄▄▄▀▄  ███  █ ██ ██
██▄▀▄▄█ ▄▀▀▄▀▄ ▄▀▀▄▀▄▀▄▀▄▀▄▀▄▀▄██
██▄██▄█▄▄█▀▀▀▄█ ███  █ ▄▄▄  ██ ██
██ ▄▄▄▄▄ █▄ ██▀ ▀▀▄▀▄  █▄█ ▀▄▀▄██
██ █   █ █▄▀██▀█▄██  ▀▄ ▄▄  █▀ ██
██ █▄▄▄█ █ ▀▀▄▄██▀▄▀▄█  █▀▄▀▄▀▄██
██▄▄▄▄▄▄▄███▄▄▄▄▄██▄▄█▄█▄█▄▄█▄▄██
█████████████████████████████████
       _                   _                     
 _  _ | |___ _____ _____ _| |_                   
\ \/ /|  _  |  _  |  _  |_   _|  (C) 2007-2023   
 )  ( | |_| | |_| | |_| | | |____JIANJUN.JIANG__ 
/_/\_\|_____|_____|_____| |_____________________|
V3.0.0 (May 22 2023 - 17:17:57) - [yuzuki][Yuzuki Based On Allwinner R128 SOC]
[    0.000020]Probe device 'blk-romdisk.0' with blk-romdisk
[    0.000800]Probe device 'fix-losc' with clk-fixed
[    0.000810]Probe device 'rc-16m' with clk-fixed
[    0.000820]Probe device 'rcosc-clk' with clk-fixed
[    0.000830]Probe device 'ext-32k' with clk-fixed
[    0.000840]Probe device 'rc-hf' with clk-fixed
[    0.000850]Probe device 'rccal-fake-parent' with clk-fixed
[    0.000860]Probe device 'osc26m' with clk-fixed
[    0.000870]Probe device 'osc40m' with clk-fixed
[    0.000880]Probe device 'osc24m' with clk-fixed
[    0.000890]Probe device 'osc32m' with clk-fixed
[    0.000900]Probe device 'osc24.576m' with clk-fixed
[    0.000910]Probe device 'hosc' with clk-mux
[    0.000920]Probe device 'hosc-div32k' with clk-fixed-factor
[    0.000930]Probe device 'rcosc-div32k' with clk-fixed-factor
[    0.000940]Probe device 'hosc-div2' with clk-fixed-factor
[    0.000950]Probe device 'dpll1' with clk-r128-pll
[    0.000960]Probe device 'dpll2' with clk-r128-pll
[    0.000970]Probe device 'dpll3' with clk-r128-pll
[    0.000980]Probe device 'pll-audio' with clk-r128-pll
[    0.000990]Probe device 'rfip0-dpll' with clk-fixed-factor
[    0.001000]Probe device 'rfip1-dpll' with clk-fixed-factor
[    0.001010]Probe device 'pll-audio2x' with clk-fixed-factor
[    0.001020]Probe device 'pll-audio1x' with clk-fixed-factor
[    0.001030]Probe device 'dpll1-div4' with clk-fixed-factor
[    0.001040]Probe device 'dpll1-div5' with clk-fixed-factor
[    0.001050]Probe device 'dpll1-div6' with clk-fixed-factor
[    0.001060]Probe device 'dpll1-div7' with clk-fixed-factor
[    0.001070]Probe device 'dpll1-div8' with clk-fixed-factor
[    0.001080]Probe device 'dpll1-div39' with clk-fixed-factor
[    0.001090]Probe device 'dpll1-div85' with clk-fixed-factor
[    0.001100]Probe device 'dpll3-div4' with clk-fixed-factor
[    0.001110]Probe device 'dpll3-div5' with clk-fixed-factor
[    0.001120]Probe device 'dpll3-div6' with clk-fixed-factor
[    0.001130]Probe device 'dpll3-div7' with clk-fixed-factor
[    0.001140]Probe device 'dpll3-div8' with clk-fixed-factor
[    0.001150]Probe device 'ck1-usb' with clk-gate
[    0.001160]Probe device 'mux-ck1-aud' with clk-mux
[    0.001170]Probe device 'ck1-aud' with clk-gate
[    0.001180]Probe device 'mux-ck1-dev' with clk-mux
[    0.001190]Probe device 'ck1-dev' with clk-gate
[    0.001200]Probe device 'mux-ck1-m33' with clk-mux
[    0.001210]Probe device 'ck1-m33' with clk-gate
[    0.001220]Probe device 'mux-ck3-dev' with clk-mux
[    0.001230]Probe device 'ck3-dev' with clk-gate
[    0.001240]Probe device 'mux-ck3-m33' with clk-mux
[    0.001250]Probe device 'ck3-m33' with clk-gate
[    0.001260]Probe device 'ck-dev' with clk-mux
[    0.001270]Probe device 'device-clk' with clk-divider
[    0.001280]Probe device 'ck-m33' with clk-mux
[    0.001290]Probe device 'sys' with clk-divider
[    0.001300]Probe device 'aud-rco-div' with clk-divider
[    0.001310]Probe device 'ar200a-f' with clk-mux
[    0.001320]Probe device 'hfclk-div' with clk-ratio
[    0.001330]Probe device 'lfclk-div' with clk-ratio
[    0.001340]Probe device 'ahb-div' with clk-ratio
[    0.001350]Probe device 'apb' with clk-mux
[    0.001360]Probe device 'ble-32m' with clk-gate
[    0.001370]Probe device 'ble-48m' with clk-gate
[    0.001380]Probe device 'gpio-gate' with clk-gate
[    0.001390]Probe device 'bus-codec-dac' with clk-gate
[    0.001400]Probe device 'rccal' with clk-gate
[    0.001410]Probe device 'bus-codec-adc' with clk-gate
[    0.001420]Probe device 'dmic-bus' with clk-gate
[    0.001430]Probe device 'gpadc' with clk-gate
[    0.001440]Probe device 'lpuart1-wkup' with clk-gate
[    0.001450]Probe device 'lpuart0-wkup' with clk-gate
[    0.001460]Probe device 'osc32k-en' with clk-gate
[    0.001470]Probe device 'rc32k-en' with clk-gate
[    0.001480]Probe device 'rc-hf-en' with clk-gate
[    0.001490]Probe device 'rccal-32k' with clk-gate
[    0.001500]Probe device 'rco-wup-en' with clk-gate
[    0.001510]Probe device 'lf-sel' with clk-mux
[    0.001520]Probe device 'sys-32k-sel' with clk-mux
[    0.001530]Probe device 'ble-sel' with clk-mux
[    0.001540]Probe device 'sysrtc32k' with clk-mux
[    0.001550]Probe device 'pad' with clk-mux
[    0.001560]Probe device 'div-pad' with clk-divider
[    0.001570]Probe device 'pad-out' with clk-gate
[    0.001580]Probe device 'div' with clk-mux
[    0.001590]Probe device '32k-auto-en-switch' with clk-gate
[    0.001600]Probe device 'bus-ehci0' with clk-gate
[    0.001610]Probe device 'bus-ohci0' with clk-gate
[    0.001620]Probe device 'bus-csi-jpe' with clk-gate
[    0.001630]Probe device 'bus-ledc' with clk-gate
[    0.001640]Probe device 'bus-otg' with clk-gate
[    0.001650]Probe device 'bus-smcard' with clk-gate
[    0.001660]Probe device 'bus-hspsram-ctrl' with clk-gate
[    0.001670]Probe device 'bus-irrx' with clk-gate
[    0.001680]Probe device 'bus-irtx' with clk-gate
[    0.001690]Probe device 'bus-pwm' with clk-gate
[    0.001700]Probe device 'bus-twi1' with clk-gate
[    0.001710]Probe device 'bus-twi0' with clk-gate
[    0.001720]Probe device 'bus-uart2' with clk-gate
[    0.001730]Probe device 'bus-uart1' with clk-gate
[    0.001740]Probe device 'bus-uart0' with clk-gate
[    0.001750]Probe device 'bus-sdc0' with clk-gate
[    0.001760]Probe device 'bus-spi1' with clk-gate
[    0.001770]Probe device 'bus-spi0' with clk-gate
[    0.001780]Probe device 'bus-monitor' with clk-gate
[    0.001790]Probe device 'bus-g2d' with clk-gate
[    0.001800]Probe device 'bus-de' with clk-gate
[    0.001810]Probe device 'bus-display' with clk-gate
[    0.001820]Probe device 'bus-lcd' with clk-gate
[    0.001830]Probe device 'bus-bt-core' with clk-gate
[    0.001840]Probe device 'bus-wlan-ctrl' with clk-gate
[    0.001850]Probe device 'bus-trng' with clk-gate
[    0.001860]Probe device 'bus-spc' with clk-gate
[    0.001870]Probe device 'bus-ss' with clk-gate
[    0.001880]Probe device 'bus-timer' with clk-gate
[    0.001890]Probe device 'bus-spinlock' with clk-gate
[    0.001900]Probe device 'bus-dma1' with clk-gate
[    0.001910]Probe device 'bus-dma0' with clk-gate
[    0.001920]Probe device 'bus-spdif' with clk-gate
[    0.001930]Probe device 'bus-i2s' with clk-gate
[    0.001940]Probe device 'riscv-cfg' with clk-gate
[    0.001950]Probe device 'riscv-msgbox' with clk-gate
[    0.001960]Probe device 'dsp-cfg' with clk-gate
[    0.001970]Probe device 'dsp-msgbox' with clk-gate
[    0.001980]Probe device 'cpu-msgbox' with clk-gate
[    0.001990]Probe device 'mbus-de' with clk-gate
[    0.002000]Probe device 'mbus-g2d' with clk-gate
[    0.002010]Probe device 'mbus-csi' with clk-gate
[    0.002020]Probe device 'mbus-dma1' with clk-gate
[    0.002030]Probe device 'mbus-dma0' with clk-gate
[    0.002040]Probe device 'mbus-usb' with clk-gate
[    0.002050]Probe device 'mbus-ce' with clk-gate
[    0.002060]Probe device 'mbus-dsp' with clk-gate
[    0.002070]Probe device 'mbus-riscv' with clk-gate
[    0.002080]Probe device 'mbus-cpu' with clk-gate
[    0.002090]Probe device 'mux-pclk-spc' with clk-mux
[    0.002100]Probe device 'div-pclk-spc' with clk-divider
[    0.002110]Probe device 'pclk-spc' with clk-ratio
[    0.002120]Probe device 'mux-spi0' with clk-mux
[    0.002130]Probe device 'div-spi0' with clk-divider
[    0.002140]Probe device 'ratio-spi0' with clk-ratio
[    0.002150]Probe device 'spi0' with clk-gate
[    0.002160]Probe device 'mux-spi1' with clk-mux
[    0.002170]Probe device 'div-spi1' with clk-divider
[    0.002180]Probe device 'ratio-spi1' with clk-ratio
[    0.002190]Probe device 'spi1' with clk-gate
[    0.002200]Probe device 'mux-sdc0' with clk-mux
[    0.002210]Probe device 'div-sdc0' with clk-divider
[    0.002220]Probe device 'ratio-sdc0' with clk-ratio
[    0.002230]Probe device 'sdc0' with clk-gate
[    0.002240]Probe device 'mux-ss' with clk-mux
[    0.002250]Probe device 'div-ss' with clk-divider
[    0.002260]Probe device 'ratio-ss' with clk-ratio
[    0.002270]Probe device 'ss' with clk-gate
[    0.002280]Probe device 'mux-csi-jpe' with clk-mux
[    0.002290]Probe device 'div-csi-jpe' with clk-divider
[    0.002300]Probe device 'ratio-csi-jpe' with clk-ratio
[    0.002310]Probe device 'csi-jpe' with clk-gate
[    0.002320]Probe device 'mux-ledc' with clk-mux
[    0.002330]Probe device 'div-ledc' with clk-divider
[    0.002340]Probe device 'ratio-ledc' with clk-ratio
[    0.002350]Probe device 'ledc' with clk-gate
[    0.002360]Probe device 'mux-irrx' with clk-mux
[    0.002370]Probe device 'div-irrx' with clk-divider
[    0.002380]Probe device 'ratio-irrx' with clk-ratio
[    0.002390]Probe device 'irrx' with clk-gate
[    0.002400]Probe device 'mux-irtx' with clk-mux
[    0.002410]Probe device 'div-irtx' with clk-divider
[    0.002420]Probe device 'ratio-irtx' with clk-ratio
[    0.002430]Probe device 'irtx' with clk-gate
[    0.002440]Probe device 'mux-systick-ref' with clk-mux
[    0.002450]Probe device 'div-systick-ref' with clk-divider
[    0.002460]Probe device 'ratio-systick-ref' with clk-ratio
[    0.002470]Probe device 'systick-ref' with clk-gate
[    0.002480]Probe device 'systick-noref' with clk-gate
[    0.002490]Probe device 'systick-skew' with clk-gate
[    0.002500]Probe device 'mux-csi-mclk' with clk-mux
[    0.002510]Probe device 'div-csi-mclk' with clk-divider
[    0.002520]Probe device 'ratio-csi-mclk' with clk-ratio
[    0.002530]Probe device 'csi-mclk' with clk-gate
[    0.002540]Probe device 'mux-flash-spi' with clk-mux
[    0.002550]Probe device 'div-flash-spi' with clk-divider
[    0.002560]Probe device 'ratio-flash-spi' with clk-ratio
[    0.002570]Probe device 'flash-spi' with clk-gate
[    0.002580]Probe device 'mux-g2d' with clk-mux
[    0.002590]Probe device 'div-g2d' with clk-divider
[    0.002600]Probe device 'ratio-g2d' with clk-ratio
[    0.002610]Probe device 'g2d' with clk-gate
[    0.002620]Probe device 'mux-de' with clk-mux
[    0.002630]Probe device 'div-de' with clk-divider
[    0.002640]Probe device 'ratio-de' with clk-ratio
[    0.002650]Probe device 'de' with clk-gate
[    0.002660]Probe device 'mux-lcd' with clk-mux
[    0.002670]Probe device 'div-lcd' with clk-divider
[    0.002680]Probe device 'ratio-lcd' with clk-ratio
[    0.002690]Probe device 'lcd' with clk-gate
[    0.002700]Probe device 'timer0' with clk-link
[    0.002710]Probe device 'timer1' with clk-link
[    0.002720]Probe device 'wdg' with clk-fixed
[    0.002730]Probe device 'uart0' with clk-fixed
[    0.002740]Probe device 'uart1' with clk-fixed
[    0.002750]Probe device 'uart2' with clk-fixed
[    0.002760]Probe device 'reset-r128.0' with reset-r128
[    0.002770]Probe device 'reset-r128.1' with reset-r128
[    0.002780]Probe device 'reset-r128.2' with reset-r128
[    0.002790]Probe device 'reset-r128.3' with reset-r128
[    0.002800]Probe device 'reset-r128.4' with reset-r128
[    0.002810]Probe device 'reset-r128.5' with reset-r128
[    0.002820]Probe device 'reset-r128.6' with reset-r128
[    0.002830]Probe device 'irq-r128.0' with irq-r128
[    0.002840]Probe device 'irq-r128-gpio.0' with irq-r128-gpio
[    0.002850]Probe device 'irq-r128-gpio.1' with irq-r128-gpio
[    0.002860]Probe device 'gpio-r128.0' with gpio-r128
[    0.002870]Probe device 'gpio-r128.1' with gpio-r128
[    0.002880]Probe device 'ce-r128-timer.0' with ce-r128-timer
[    0.000046]Probe device 'cs-r128-timer.0' with cs-r128-timer
[    0.005696]Probe device 'uart-16550.0' with uart-16550
[    0.010808]Probe device 'uart-16550.1' with uart-16550
[    0.015957]Probe device 'i2c-r128.0' with i2c-r128
[    0.020727]Probe device 'i2c-r128.1' with i2c-r128
[    0.025489]Probe device 'spi-r128.0' with spi-r128
[    0.039591]Found spi nor flash 'SFDP' with 16.000MB
[    0.044374]Found partition:
[    0.047151]  0x0000000000000000 ~ 0x0000000000ffffff 16.000MB  - blk-spinor.0
[    0.054304]  0x0000000000000000 ~ 0x00000000005fffff 6.000MB   - blk-spinor.0.xboot
[    0.061925]  0x0000000000600000 ~ 0x00000000007fffff 2.000MB   - blk-spinor.0.reserve
[    0.069725]  0x0000000000800000 ~ 0x0000000000ffffff 8.000MB   - blk-spinor.0.private
[    0.077480]Probe device 'blk-spinor.0' with blk-spinor
[    0.082645]Probe device 'wdg-r128.0' with wdg-r128
[    0.087402]Probe device 'console-uart.0' with console-uart
[    0.094821]mount /private with 'ram' filesystem
Press any key to stop auto boot:  0.120
xboot: /# 

最近编辑记录 xboot (2023-05-22 17:24:17)

离线

楼主 #22 2023-05-22 19:27:10

xboot
会员
注册时间: 2019-10-15
已发帖子: 692
积分: 434

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

已实现xfel烧写R128内部SPI NOR FLASH,但出现了一个超级超级大的坑。

只要用xfel访问过的R128芯片,哪怕仅仅是探测下spi nor flash,就会导致全志的固件无法正常运行,而且这个时候想用Phoenixsuit工具去刷机也不给刷了,提示找不到spi nor flash,但用xfel是可以正常读写spi nor flash的,这坑坑。。。。

换句话说,xfel能将R128搞残,而且是永久性的,这。。。。

全志固件启动的提示:

[2]BOOT0 commit : 7de04b7c
[5]set pll end
[6]board init ok
[8]boot reason: SUNXI_BOOT_REASON_COLD_BOOT
[26]heap: 0x40a0000 size:0xe000
[29]lspsram init aps64
[31]lspsram dqs:0x01190190
[36]psram chip APS64 init ok!, freq 1920000000
[40]Init psram controller ok
[43]hpsram init
[44]DRAM DQS gate is PD mode.
[47]DRAM BOOT DRIVE INFO: V2.00
[50]DRAM CLK = 800 MHZ
[52]dram_tpr11 = 0x0 , dram_tpr12 =0x0
[56]dram_tpr9 = 0x2121
[86]DRAM simple test OK.
[88]DRAM SIZE =8 MB
[90]boot package base:0xc600000
[93]prcm: 0x1
[94]init pins for sip nor
[96]nor read id ret:0x0, id[0]:0x0
[100]spinor init fail
[102]load gpt fail
[103]init gpt fail
[115]go to usb efex!

手上仅有的2片R128都被搞残了。再贴个xfel烧写spi nor 的log吧,读写spi nor完全正常,校验也可以通过。

xfel spinor
Found spi nor flash 'SFDP' with 16777216 bytes


xfel spinor read 0 16777216 dump4.bin
100% [================================================] 16.000 MB, 383.050 KB/s

xfel spinor write 0 dump.bin 
100% [================================================] 16.000 MB, 193.715 KB/s

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#23 2023-05-23 07:59:19

yelong98
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

这个是有潜力代替f1c100跑linux啊,高内存版本

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#24 2023-05-23 08:44:37

lanlanzhilian
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积分: 50

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

这会不会是读写的姿势不对

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楼主 #25 2023-05-23 09:10:15

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

高内存版本是有可能代替F1C100S的,但现在还没见到R128-S3的芯片

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楼主 #26 2023-05-23 09:12:28

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

lanlanzhilian 说:

这会不会是读写的姿势不对

初步怀疑是spi flash只要一被unlock了,全志的sdk固件就无法正常运行,包括烧录,如果确定是这个原因的话,那就是全志SPI NOR FLASH驱动问题了,而且这段代码还在闭源的boot0里,你想修这bug都没门。80%的可能性是这个问题导致的。

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#27 2023-05-23 09:39:02

地理课代表
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

只能搞裸机?

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楼主 #28 2023-05-23 12:04:09

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

确认是R128芯片内部的SPI NOR FLASH只要处于unlock的状态,就无法正常启动,而且也无法烧录,这个问题全志肯定要去解决了,不然wifi芯片,只要被攻击了,可以造成所谓的物理损坏,让产品直接宕机,类似于多年前的bios病毒,可以将主板搞挂

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#29 2023-05-23 12:32:34

novice
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

xboot 说:

高内存版本是有可能代替F1C100S的,但现在还没见到R128-S3的芯片

看了一下R128-S2的售价,立创商城要29元,你确定这价格能替代f1c100s?

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楼主 #30 2023-05-23 12:49:58

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

严谨点说,就是多做3个操作,R128芯片内部spi nor flash必挂

1, 全局解锁SPI NOR FLASH
2, 将状态寄存器2,清零
3,将状态寄存器3,清零

具体是哪一个操作导致的,还是3个操作共同导致的,就不得而知了,每实验一次,一个芯片就报废了,我手上的三颗芯片,全处于搞残的状态,已经没有新芯片了,这些实验代价有点高。


除了这三个操作,xfel在操作spi nor时,还会执行两个动作
1,复位SPI NOR FLASH
2, 将状态寄存器1,清零

这两个动作是不会产生任何副作用的,在R128上已测试通过,就是最上面的三个步骤,会导致问题,而且百分百必现。

再去锁定下SPI NOR FLASH,可以救活被搞残的芯片?

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楼主 #31 2023-05-23 14:35:52

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

QQ图片20230523143253.png

经测试,是状态寄存器2里面的QE位,如果这个bit被清零了,那么内置的spi nor flash就无法引导了,而且也无法烧录,这个状态寄存器是掉电不丢失的,永久保存,除非再次修改。

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楼主 #32 2023-05-23 15:08:08

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

只要将这个比特重新写回1,就可以救活,R128内部的SPI NOR FLASH

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楼主 #33 2023-05-23 23:30:37

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

xfel升级到V1.3.1版本,此版本已完整支持R128,楼上计划的所有功能均以实现,包括烧写SPI NOR FLASH,通过fel启动RISCV核心,启动DSP核心。

这里扩展了一个extra命令,可以启动RISCV和DSP核,后面的地址,就是核心的入口地址。

usage:
    xfel extra exec riscv <address> - Boot riscv and jump to address
    xfel extra exec dsp <address>   - Boot dsp and jump to address

现在运行xboot有两种方案:

1,直接用xfel来运行RISCV程序

xfel ddr r128-s2;
xfel write 0x08200000 xboot.bin;
xfel extra exec riscv 0x08200000;

2,利用全志SDK里的m33.bin程序来引导riscv

xfel ddr r128-s2;
xfel write 0x08004000 lichee/rtos/build/r128s2_pro_m33/img/rt_system.bin;
xfel write 0x08200000 xboot.bin;
xfel exec 0x08004001;

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楼主 #34 2023-05-23 23:32:24

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

对于前面遇到的SPI NOR FLASH清除QE比特导致的无法启动烧录问题,这里在xfel做了修正,直接删除写状态寄存器2及状态寄存器3的擦作。

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楼主 #35 2023-05-24 09:38:42

xboot
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

贴一个采用xfel直接引导xboot的完整log,可以是空片直接启动。

xfel ddr r128-s2;
xfel write 0x08200000 xboot.bin;
xfel extra exec riscv 0x08200000;
[2]set pll end
[3]board init ok
[5]fake dram ok
[7]heap: 0x40a0000 size:0xe000
[9]lpsram init
[11]lspsram init aps64
[13]lspsram dqs:0x011a01a0
[18]psram chip APS64 init ok!, freq 1920000000
[22]Init psram controller ok
[24]hpsram init
[26]DRAM DQS gate is PD mode.
[29]DRAM BOOT DRIVE INFO: V2.00
[32]DRAM CLK = 800 MHZ
[34]dram_tpr11 = 0x0 , dram_tpr12 =0x0
[37]dram_tpr9 = 0x2020
[86]DRAM simple test OK.
[88]DRAM SIZE =8 MB
[100]fes1 done
█████████████████████████████████
██ ▄▄▄▄▄ █ ▀███▀ ▄█▀█ ▄█ ▄▄▄▄▄ ██
██ █   █ █ ▀▄█▄▄▀▄▀█▄▀ █ █   █ ██
██ █▄▄▄█ █▄   ▄▄▀█▄▀█ ▄█ █▄▄▄█ ██
██▄▄▄▄▄▄▄█ █ █▄▀▄█▄▀▄▀▄█▄▄▄▄▄▄▄██
███▄▄█▄█▄▄▀█ ▀  ▀ ▀  ███ ▀▄ ▄▄ ██
██▀  ▄▄ ▄▄█▄▄ ▀  ▄▄▀▄▀▄█ ▀▄▀▄▀▄██
██▄▀▄█▄█▄ ▄▄█▀▄▀  ▀  ███ ██ ██ ██
███ ▄▄▄▄▄▄ ▄▄▀▀▄▄█▀▀▄▀▄▀▄▀▄▀▄▀▄██
██▄▄█▀▄▄▄ ▄ ▀▀▄▄▄▀▄  ███  █ ██ ██
██▄▀▄▄█ ▄▀▀▄▀▄ ▄▀▀▄▀▄▀▄▀▄▀▄▀▄▀▄██
██▄██▄█▄▄█▀▀▀▄█ ███  █ ▄▄▄  ██ ██
██ ▄▄▄▄▄ █▄ ██▀ ▀▀▄▀▄  █▄█ ▀▄▀▄██
██ █   █ █▄▀██▀█▄██  ▀▄ ▄▄  █▀ ██
██ █▄▄▄█ █ ▀▀▄▄██▀▄▀▄█  █▀▄▀▄▀▄██
██▄▄▄▄▄▄▄███▄▄▄▄▄██▄▄█▄█▄█▄▄█▄▄██
█████████████████████████████████
       _                   _                     
 _  _ | |___ _____ _____ _| |_                   
\ \/ /|  _  |  _  |  _  |_   _|  (C) 2007-2023   
 )  ( | |_| | |_| | |_| | | |____JIANJUN.JIANG__ 
/_/\_\|_____|_____|_____| |_____________________|
V3.0.0 (May 24 2023 - 09:30:05) - [yuzuki][Yuzuki Based On Allwinner R128 SOC]
[    0.000020]Probe device 'blk-romdisk.0' with blk-romdisk
[    0.000800]Probe device 'fix-losc' with clk-fixed
[    0.000810]Probe device 'rc-16m' with clk-fixed
[    0.000820]Probe device 'rcosc-clk' with clk-fixed
[    0.000830]Probe device 'ext-32k' with clk-fixed
[    0.000840]Probe device 'rc-hf' with clk-fixed
[    0.000850]Probe device 'rccal-fake-parent' with clk-fixed
[    0.000860]Probe device 'osc26m' with clk-fixed
[    0.000870]Probe device 'osc40m' with clk-fixed
[    0.000880]Probe device 'osc24m' with clk-fixed
[    0.000890]Probe device 'osc32m' with clk-fixed
[    0.000900]Probe device 'osc24.576m' with clk-fixed
[    0.000910]Probe device 'hosc' with clk-mux
[    0.000920]Probe device 'hosc-div32k' with clk-fixed-factor
[    0.000930]Probe device 'rcosc-div32k' with clk-fixed-factor
[    0.000940]Probe device 'hosc-div2' with clk-fixed-factor
[    0.000950]Probe device 'dpll1' with clk-r128-pll
[    0.000960]Probe device 'dpll2' with clk-r128-pll
[    0.000970]Probe device 'dpll3' with clk-r128-pll
[    0.000980]Probe device 'pll-audio' with clk-r128-pll
[    0.000990]Probe device 'rfip0-dpll' with clk-fixed-factor
[    0.001000]Probe device 'rfip1-dpll' with clk-fixed-factor
[    0.001010]Probe device 'pll-audio2x' with clk-fixed-factor
[    0.001020]Probe device 'pll-audio1x' with clk-fixed-factor
[    0.001030]Probe device 'dpll1-div4' with clk-fixed-factor
[    0.001040]Probe device 'dpll1-div5' with clk-fixed-factor
[    0.001050]Probe device 'dpll1-div6' with clk-fixed-factor
[    0.001060]Probe device 'dpll1-div7' with clk-fixed-factor
[    0.001070]Probe device 'dpll1-div8' with clk-fixed-factor
[    0.001080]Probe device 'dpll1-div39' with clk-fixed-factor
[    0.001090]Probe device 'dpll1-div85' with clk-fixed-factor
[    0.001100]Probe device 'dpll3-div4' with clk-fixed-factor
[    0.001110]Probe device 'dpll3-div5' with clk-fixed-factor
[    0.001120]Probe device 'dpll3-div6' with clk-fixed-factor
[    0.001130]Probe device 'dpll3-div7' with clk-fixed-factor
[    0.001140]Probe device 'dpll3-div8' with clk-fixed-factor
[    0.001150]Probe device 'ck1-usb' with clk-gate
[    0.001160]Probe device 'mux-ck1-aud' with clk-mux
[    0.001170]Probe device 'ck1-aud' with clk-gate
[    0.001180]Probe device 'mux-ck1-dev' with clk-mux
[    0.001190]Probe device 'ck1-dev' with clk-gate
[    0.001200]Probe device 'mux-ck1-m33' with clk-mux
[    0.001210]Probe device 'ck1-m33' with clk-gate
[    0.001220]Probe device 'mux-ck3-dev' with clk-mux
[    0.001230]Probe device 'ck3-dev' with clk-gate
[    0.001240]Probe device 'mux-ck3-m33' with clk-mux
[    0.001250]Probe device 'ck3-m33' with clk-gate
[    0.001260]Probe device 'ck-dev' with clk-mux
[    0.001270]Probe device 'device-clk' with clk-divider
[    0.001280]Probe device 'ck-m33' with clk-mux
[    0.001290]Probe device 'sys' with clk-divider
[    0.001300]Probe device 'aud-rco-div' with clk-divider
[    0.001310]Probe device 'ar200a-f' with clk-mux
[    0.001320]Probe device 'hfclk-div' with clk-ratio
[    0.001330]Probe device 'lfclk-div' with clk-ratio
[    0.001340]Probe device 'ahb-div' with clk-ratio
[    0.001350]Probe device 'apb' with clk-mux
[    0.001360]Probe device 'ble-32m' with clk-gate
[    0.001370]Probe device 'ble-48m' with clk-gate
[    0.001380]Probe device 'gpio-gate' with clk-gate
[    0.001390]Probe device 'bus-codec-dac' with clk-gate
[    0.001400]Probe device 'rccal' with clk-gate
[    0.001410]Probe device 'bus-codec-adc' with clk-gate
[    0.001420]Probe device 'dmic-bus' with clk-gate
[    0.001430]Probe device 'gpadc' with clk-gate
[    0.001440]Probe device 'lpuart1-wkup' with clk-gate
[    0.001450]Probe device 'lpuart0-wkup' with clk-gate
[    0.001460]Probe device 'osc32k-en' with clk-gate
[    0.001470]Probe device 'rc32k-en' with clk-gate
[    0.001480]Probe device 'rc-hf-en' with clk-gate
[    0.001490]Probe device 'rccal-32k' with clk-gate
[    0.001500]Probe device 'rco-wup-en' with clk-gate
[    0.001510]Probe device 'lf-sel' with clk-mux
[    0.001520]Probe device 'sys-32k-sel' with clk-mux
[    0.001530]Probe device 'ble-sel' with clk-mux
[    0.001540]Probe device 'sysrtc32k' with clk-mux
[    0.001550]Probe device 'pad' with clk-mux
[    0.001560]Probe device 'div-pad' with clk-divider
[    0.001570]Probe device 'pad-out' with clk-gate
[    0.001580]Probe device 'div' with clk-mux
[    0.001590]Probe device '32k-auto-en-switch' with clk-gate
[    0.001600]Probe device 'bus-ehci0' with clk-gate
[    0.001610]Probe device 'bus-ohci0' with clk-gate
[    0.001620]Probe device 'bus-csi-jpe' with clk-gate
[    0.001630]Probe device 'bus-ledc' with clk-gate
[    0.001640]Probe device 'bus-otg' with clk-gate
[    0.001650]Probe device 'bus-smcard' with clk-gate
[    0.001660]Probe device 'bus-hspsram-ctrl' with clk-gate
[    0.001670]Probe device 'bus-irrx' with clk-gate
[    0.001680]Probe device 'bus-irtx' with clk-gate
[    0.001690]Probe device 'bus-pwm' with clk-gate
[    0.001700]Probe device 'bus-twi1' with clk-gate
[    0.001710]Probe device 'bus-twi0' with clk-gate
[    0.001720]Probe device 'bus-uart2' with clk-gate
[    0.001730]Probe device 'bus-uart1' with clk-gate
[    0.001740]Probe device 'bus-uart0' with clk-gate
[    0.001750]Probe device 'bus-sdc0' with clk-gate
[    0.001760]Probe device 'bus-spi1' with clk-gate
[    0.001770]Probe device 'bus-spi0' with clk-gate
[    0.001780]Probe device 'bus-monitor' with clk-gate
[    0.001790]Probe device 'bus-g2d' with clk-gate
[    0.001800]Probe device 'bus-de' with clk-gate
[    0.001810]Probe device 'bus-display' with clk-gate
[    0.001820]Probe device 'bus-lcd' with clk-gate
[    0.001830]Probe device 'bus-bt-core' with clk-gate
[    0.001840]Probe device 'bus-wlan-ctrl' with clk-gate
[    0.001850]Probe device 'bus-trng' with clk-gate
[    0.001860]Probe device 'bus-spc' with clk-gate
[    0.001870]Probe device 'bus-ss' with clk-gate
[    0.001880]Probe device 'bus-timer' with clk-gate
[    0.001890]Probe device 'bus-spinlock' with clk-gate
[    0.001900]Probe device 'bus-dma1' with clk-gate
[    0.001910]Probe device 'bus-dma0' with clk-gate
[    0.001920]Probe device 'bus-spdif' with clk-gate
[    0.001930]Probe device 'bus-i2s' with clk-gate
[    0.001940]Probe device 'riscv-cfg' with clk-gate
[    0.001950]Probe device 'riscv-msgbox' with clk-gate
[    0.001960]Probe device 'dsp-cfg' with clk-gate
[    0.001970]Probe device 'dsp-msgbox' with clk-gate
[    0.001980]Probe device 'cpu-msgbox' with clk-gate
[    0.001990]Probe device 'mbus-de' with clk-gate
[    0.002000]Probe device 'mbus-g2d' with clk-gate
[    0.002010]Probe device 'mbus-csi' with clk-gate
[    0.002020]Probe device 'mbus-dma1' with clk-gate
[    0.002030]Probe device 'mbus-dma0' with clk-gate
[    0.002040]Probe device 'mbus-usb' with clk-gate
[    0.002050]Probe device 'mbus-ce' with clk-gate
[    0.002060]Probe device 'mbus-dsp' with clk-gate
[    0.002070]Probe device 'mbus-riscv' with clk-gate
[    0.002080]Probe device 'mbus-cpu' with clk-gate
[    0.002090]Probe device 'mux-pclk-spc' with clk-mux
[    0.002100]Probe device 'div-pclk-spc' with clk-divider
[    0.002110]Probe device 'pclk-spc' with clk-ratio
[    0.002120]Probe device 'mux-spi0' with clk-mux
[    0.002130]Probe device 'div-spi0' with clk-divider
[    0.002140]Probe device 'ratio-spi0' with clk-ratio
[    0.002150]Probe device 'spi0' with clk-gate
[    0.002160]Probe device 'mux-spi1' with clk-mux
[    0.002170]Probe device 'div-spi1' with clk-divider
[    0.002180]Probe device 'ratio-spi1' with clk-ratio
[    0.002190]Probe device 'spi1' with clk-gate
[    0.002200]Probe device 'mux-sdc0' with clk-mux
[    0.002210]Probe device 'div-sdc0' with clk-divider
[    0.002220]Probe device 'ratio-sdc0' with clk-ratio
[    0.002230]Probe device 'sdc0' with clk-gate
[    0.002240]Probe device 'mux-ss' with clk-mux
[    0.002250]Probe device 'div-ss' with clk-divider
[    0.002260]Probe device 'ratio-ss' with clk-ratio
[    0.002270]Probe device 'ss' with clk-gate
[    0.002280]Probe device 'mux-csi-jpe' with clk-mux
[    0.002290]Probe device 'div-csi-jpe' with clk-divider
[    0.002300]Probe device 'ratio-csi-jpe' with clk-ratio
[    0.002310]Probe device 'csi-jpe' with clk-gate
[    0.002320]Probe device 'mux-ledc' with clk-mux
[    0.002330]Probe device 'div-ledc' with clk-divider
[    0.002340]Probe device 'ratio-ledc' with clk-ratio
[    0.002350]Probe device 'ledc' with clk-gate
[    0.002360]Probe device 'mux-irrx' with clk-mux
[    0.002370]Probe device 'div-irrx' with clk-divider
[    0.002380]Probe device 'ratio-irrx' with clk-ratio
[    0.002390]Probe device 'irrx' with clk-gate
[    0.002400]Probe device 'mux-irtx' with clk-mux
[    0.002410]Probe device 'div-irtx' with clk-divider
[    0.002420]Probe device 'ratio-irtx' with clk-ratio
[    0.002430]Probe device 'irtx' with clk-gate
[    0.002440]Probe device 'mux-systick-ref' with clk-mux
[    0.002450]Probe device 'div-systick-ref' with clk-divider
[    0.002460]Probe device 'ratio-systick-ref' with clk-ratio
[    0.002470]Probe device 'systick-ref' with clk-gate
[    0.002480]Probe device 'systick-noref' with clk-gate
[    0.002490]Probe device 'systick-skew' with clk-gate
[    0.002500]Probe device 'mux-csi-mclk' with clk-mux
[    0.002510]Probe device 'div-csi-mclk' with clk-divider
[    0.002520]Probe device 'ratio-csi-mclk' with clk-ratio
[    0.002530]Probe device 'csi-mclk' with clk-gate
[    0.002540]Probe device 'mux-flash-spi' with clk-mux
[    0.002550]Probe device 'div-flash-spi' with clk-divider
[    0.002560]Probe device 'ratio-flash-spi' with clk-ratio
[    0.002570]Probe device 'flash-spi' with clk-gate
[    0.002580]Probe device 'mux-g2d' with clk-mux
[    0.002590]Probe device 'div-g2d' with clk-divider
[    0.002600]Probe device 'ratio-g2d' with clk-ratio
[    0.002610]Probe device 'g2d' with clk-gate
[    0.002620]Probe device 'mux-de' with clk-mux
[    0.002630]Probe device 'div-de' with clk-divider
[    0.002640]Probe device 'ratio-de' with clk-ratio
[    0.002650]Probe device 'de' with clk-gate
[    0.002660]Probe device 'mux-lcd' with clk-mux
[    0.002670]Probe device 'div-lcd' with clk-divider
[    0.002680]Probe device 'ratio-lcd' with clk-ratio
[    0.002690]Probe device 'lcd' with clk-gate
[    0.002700]Probe device 'timer0' with clk-link
[    0.002710]Probe device 'timer1' with clk-link
[    0.002720]Probe device 'uart0' with clk-link
[    0.002730]Probe device 'uart1' with clk-link
[    0.002740]Probe device 'uart2' with clk-link
[    0.002750]Probe device 'wdg' with clk-fixed
[    0.002760]Probe device 'reset-r128.0' with reset-r128
[    0.002770]Probe device 'reset-r128.1' with reset-r128
[    0.002780]Probe device 'reset-r128.2' with reset-r128
[    0.002790]Probe device 'reset-r128.3' with reset-r128
[    0.002800]Probe device 'reset-r128.4' with reset-r128
[    0.002810]Probe device 'reset-r128.5' with reset-r128
[    0.002820]Probe device 'reset-r128.6' with reset-r128
[    0.002830]Probe device 'irq-r128.0' with irq-r128
[    0.002840]Probe device 'irq-r128-gpio.0' with irq-r128-gpio
[    0.002850]Probe device 'irq-r128-gpio.1' with irq-r128-gpio
[    0.002860]Probe device 'gpio-r128.0' with gpio-r128
[    0.002870]Probe device 'gpio-r128.1' with gpio-r128
[    0.002880]Probe device 'ce-r128-timer.0' with ce-r128-timer
[    0.000089]Probe device 'cs-r128-timer.0' with cs-r128-timer
[    0.005967]Probe device 'uart-16550.0' with uart-16550
[    0.011228]Probe device 'uart-16550.1' with uart-16550
[    0.016569]Probe device 'i2c-r128.0' with i2c-r128
[    0.021506]Probe device 'i2c-r128.1' with i2c-r128
[    0.026445]Probe device 'spi-r128.0' with spi-r128
[    0.040882]Found spi nor flash 'SFDP' with 16.000MB
[    0.045752]Found partition:
[    0.048569]  0x0000000000000000 ~ 0x0000000000ffffff 16.000MB  - blk-spinor.0
[    0.055880]  0x0000000000000000 ~ 0x00000000005fffff 6.000MB   - blk-spinor.0.xboot
[    0.063687]  0x0000000000600000 ~ 0x00000000007fffff 2.000MB   - blk-spinor.0.reserve
[    0.071651]  0x0000000000800000 ~ 0x0000000000ffffff 8.000MB   - blk-spinor.0.private
[    0.079508]Probe device 'blk-spinor.0' with blk-spinor
[    0.084811]Probe device 'wdg-r128.0' with wdg-r128
[    0.089669]Probe device 'console-uart.0' with console-uart
[    0.098777]mount /private with 'ram' filesystem
Press any key to stop auto boot:  0.260
xboot: /# 
xboot: /# 
xboot: /# 

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楼主 #36 2023-05-24 09:43:51

xboot
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注册时间: 2019-10-15
已发帖子: 692
积分: 434

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

xfel-windows-v1.3.1.7z
上传一个已编译好的V1.3.1版本,windows平台。

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楼主 #37 2023-05-24 14:33:22

xboot
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注册时间: 2019-10-15
已发帖子: 692
积分: 434

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

R128-S2内存带宽测试,HSPRAM

xboot: /#  wboxtest benchmark-memory       
[benchmark-memory]-[memcmp]
 Bandwidth: 37.313MB/s
[benchmark-memory]-[memcpy]
 Bandwidth: 553.000MB/s
[benchmark-memory]-[memmove]
 Bandwidth: 56.219MB/s
[benchmark-memory]-[memset]
 Bandwidth: 824.000MB/s

最近编辑记录 xboot (2023-05-24 15:36:47)

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楼主 #38 2023-05-24 15:36:30

xboot
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注册时间: 2019-10-15
已发帖子: 692
积分: 434

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

带宽跟主频比较相关,可能是cache的原因

xboot: /# wboxtest benchmark-memory 
[benchmark-memory]-[memcmp]
 Bandwidth: 74.019MB/s
[benchmark-memory]-[memcpy]
 Bandwidth: 712.000MB/s
[benchmark-memory]-[memmove]
 Bandwidth: 111.721MB/s
[benchmark-memory]-[memset]
 Bandwidth: 1.432GB/s

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#40 2023-05-27 11:49:14

zhenfanhei
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注册时间: 2018-01-18
已发帖子: 301
积分: 236
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

R128跑不起来?  T113,R528都可以
先看下板子和PhoenixSuit烧录后的运行,正常。
第一片R128-s2碰到了LPSRAM有错误,换了一片才好。

QQ图片20230527114450.png

IMG_20230527_114359_edit_337464353134963.jpg


然后换驱动,用xfel 1.3来试,不行,换T113, R528, 是没问题的,情况是出在哪里呢,换台电脑试也还是不行。

QQ图片20230527114330.jpg
QQ图片20230527114413.jpg
QQ图片20230527114359.jpg
QQ图片20230527114404.jpg
QQ图片20230527114407.jpg





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楼主 #41 2023-05-27 12:21:38

xboot
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已发帖子: 692
积分: 434

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

这个现象比较奇怪,板子问题?又不太像,可以linux下面试一试。看是否能探测成功。

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#42 2023-05-27 17:19:10

zhenfanhei
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积分: 236
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

试过,也是一样现象,有点怪





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楼主 #43 2023-05-27 17:25:22

xboot
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注册时间: 2019-10-15
已发帖子: 692
积分: 434

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

那估计你就得怀疑你的硬件了

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#44 2023-05-27 17:34:21

zhenfanhei
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已发帖子: 301
积分: 236
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

也有可能,这个没试公板,直接打板调的





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楼主 #45 2023-05-31 19:44:09

xboot
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注册时间: 2019-10-15
已发帖子: 692
积分: 434

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

R128点1.28寸圆屏
IMG_1849.jpg

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#46 2023-06-05 09:13:05

zhenfanhei
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已发帖子: 301
积分: 236
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Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

这板上架了吗?这圆屏是QSPI的吧?





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#47 2023-07-26 08:00:49

audiomonster
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注册时间: 2018-04-21
已发帖子: 9
积分: 4

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

taobao ? smile 看来不可以买R128 ! 我真的想玩看一下

R128 HIFI5, T113 HIFI4, 他们是Xtensa LX7 + DSP HIFI TIE.
我们不能使用DSP指令,因为没有免费的XCC编译器
但我们可以编译通用的 Xtensa LX7

也许 XBOOT 可以支持在 LX7 上运行的小型“hello world” ?
https://github.com/YuzukiHD/FreeRTOS-HIFI4-DSP

可以使用 xtensa-hifi4-elf-gcc 编写快速的自定义 HIFI DSP 代码(使用 VLIW 并行指令) , 使用assembly

最近编辑记录 audiomonster (2023-07-26 08:23:13)

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#49 2023-07-31 18:59:12

lfs911
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注册时间: 2020-09-24
已发帖子: 37
积分: 22

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

这颗和esp32s2对比怎么样呢

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#51 2023-10-16 14:55:59

ubuntu
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注册时间: 2020-03-30
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积分: 254

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

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#52 2023-11-14 09:44:39

wj8331585
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注册时间: 2023-02-07
已发帖子: 44
积分: 19

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

ubuntu 说:

你好,网盘过期了,能再发一下吗?

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#53 2024-05-11 18:53:34

Liiunix
会员
所在地: 长春
注册时间: 2021-06-26
已发帖子: 8
积分: 8

Re: 全志R128来袭,有想入坑的吗?我先来点初步研究成果

官方Phoenixsuit烧录没有问题,在github上下了V1.3.1和V1.3.2版本测试R128均报bulk error,换Lichee D1H开发板能够正常识别,其中测试系统为W11 23H2,安装zadig驱动后在详细信息栏只有winusb.sys

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