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SEGGER J-Link Commander V4.96l ('?' for help)
Compiled Feb 25 2015 10:24:24
DLL version V4.96l, compiled Feb 25 2015 10:24:11
Firmware: J-Link ARM V8 compiled Nov 28 2014 13:44:46
Hardware: V8.00
S/N: 20121126
Feature(s): RDI,FlashDL,FlashBP,JFlash
VTarget = 2.478V
Info: TotalIRLen = 4, IRPrint = 0x01
Info: ARM AP[0]: 0x64770001, AHB-AP
Info: ARM AP[1]: 0x44770002, APB-AP
Info: ROMTbl 0 [0]: 00001003, CID: 00000000, PID:00-00000000
Info: ROMTbl 0 [1]: 00100003, CID: B105100D, PID:04-000BB4A7 ROM Table
Info: ROMTbl 1 [0]: 00010003, CID: B105900D, PID:04-005BBC07 Cortex-A7
Info: Found Cortex-A7 r0p5
Info: 6 code breakpoints, 4 data breakpoints
Info: Debug architecture ARMv7.1
Info: Data endian: little
Info: Main ID register: 0x410FC075
Info: I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
Info: D-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way
Info: Unified-Cache L2: 128 KB, 256 Sets, 64 Bytes/Line, 8-Way
Info: System control register:
Info:   Instruction endian: little
Info:   Level-1 instruction cache disabled
Info:   Level-1 data cache disabled
Info:   MMU disabled
Info:   Branch prediction enabled
Found 1 JTAG device, Total IRLen = 4:
#0 Id: 0x5BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
Cortex-A7 identified.
Target interface speed: 100 kHz
J-Link>