采用MT7621+MT7603+MT7612板子
openwrt17.01.07版本
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========================================================
MT7621 stage1 code Mar 12 2015 14:43:30 (ASIC)
CPU=500000000 HZ BUS=166666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL2 FB_DL: 0x10, 1/0 = 603/421 41000000
PLL4 FB_DL: 0x12, 1/0 = 620/404 49000000
[16:23:41.542]收←◆PLL3 FB_DL: 0x18, 1/0 = 629/395 61000000
do DDR setting..[01F40000]
Apply DDR3 Setting...(use customer AC)
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
--------------------------------------------------------------------------------
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0
[16:23:43.414]收←◆ 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
000E:| 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
000F:| 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0
0010:| 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0
0011:| 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DRAMC_DQSCTL1[0e0]=13000000
DRAMC_DQSGCTL[124]=80000033
rank 0 coarse = 15
rank 0 fine = 64
B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
opt_dle value:9
DRAMC_DDR2CTL[07c]=C287221D
DRAMC_PADCTL4[0e4]=000022B3
DRAMC_DQIDLY1[210]=0C080A0A
DRAMC_DQIDLY2[214]=06090A0A
DRAMC_DQIDLY3[218]=0A0A0809
DRAMC_DQIDLY4[21c]=0A080C09
DRAMC_R0DELDLY[018]=00001D1D
==================================================================
RX DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 9 9 7 11 8 8 8 6 8 7
10 | 9 9 9 10 7 9
--------------------------------------
==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delay:DQS0 =29 DQS1 = 29
==================================================================
bit DQS0 bit DQS1
0 (1~55)28 8 (1~56)28
1 (1~56)28 9 (1~55)28
2 (1~55)28 10 (1~56)28
3 (1~55)28 11 (1~55)28
4 (1~53)27 12 (1~57)29
5 (1~53)27 13 (1~54)27
6 (1~55)28 14 (1~56)28
7 (1~57)29 15 (1~55)28
==================================================================
3.dq delay value last
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 10 10 8 12 10 10 9 6 9 8
10 | 10 10 9 12 8 10
==================================================================
==================================================================
TX perbyte calibration
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
DQ loop=15, cmp_err_1 = ffff03ba
DQ loop=14, cmp_err_1 = ffff0002
dqs_perbyte_dly.last_dqdly_pass[1]=14, finish count=1
DQ loop=13, cmp_err_1 = ffff0002
DQ loop=12, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=12, finish count=2
byte:0, (DQS,DQ)=(9,8)
byte:1, (DQS,DQ)=(8,8)
DRAMC_DQODLY1[200]=88888888
DRAMC_DQODLY2[204]=88888888
20,data:89
[EMI] DRAMC calibration passed
===================================================================
MT7621 stage1 code done
CPU=500000000 HZ BUS=166666666 HZ
===================================================================
U-Boot 1.1.3 (Jun 29 2019 - 00:39:17)
Board: Ralink APSoC DRAM: 128 MB
relocate_code Pointer at: 87fb8000
Config XHCI 40M PLL
******************************
Software System Reset Occurred
******************************
flash manufacture id: ef, device id 40 19
find flash: W25Q256FV
=================
[16:23:43.468]收←◆===========================
Ralink UBoot Version: 4.3.0.0
--------------------------------------------
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: SPI Flash
Date:Jun 29 2019 Time:00:39:17
withwin.com.cn
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 880 MHZ ####
estimate memory size =128 Mbytes
#Reset_MT7530
set LAN/WAN LLLLW
Please choose the operation:
1:
[16:23:43.526]收←◆ Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP.
[16:23:44.022]收←◆ 4
[16:23:44.533]收←◆ 3
[16:23:45.030]收←◆ 2
[16:23:45.525]收←◆ 1
[16:23:46.081]收←◆ 0
3: System Boot system code via Flash.
## Booting image at bc050000 ...
Image Name: MIPS LEDE Linux-4.4.182
Image Type: MIPS Linux Kernel Image (lzma compressed)
Data Size: 1432322 Bytes = 1.4 MB
Load Address: 80001000
Entry Point: 80001000
[16:23:47.201]收←◆ Verifying Checksum ... OK
Uncompressing Kernel Image ...
[16:23:49.018]收←◆OK
No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 128
Starting kernel ...
[ 0.000000] Linux version 4.4.182 (ubuntu@ubuntuservice) (gcc version 5.4.0 (LEDE GCC 5.4.0 r4030-6028f00df0) ) #0 SMP Thu Jun 20 10:53:53 2019
[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[ 0.000000] bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] MIPS: machine is Mediatek MT7621 evaluation board
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 02000000 @ 00000000 (usable)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x0000000001ffffff]
[ 0.000000] HighMem empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x0000000001ffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000001ffffff]
[ 0.000000] VPE topology {2,2} total 4
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] PERCPU: Embedded 10 pages/cpu @8104a000 s8544 r8192 d24224 u40960
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 8128
[ 0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2
[ 0.000000] log_buf_len individual max cpu contribution: 4096 bytes
[ 0.000000] log_buf_len total cpu_extra contributions: 12288 bytes
[ 0.000000] log_buf_len min size: 16384 bytes
[ 0.000000] log_buf_len: 32768 bytes
[ 0.000000] early log buf free: 14272(87%)
[ 0.000000] PID hash table entries: 128 (order: -3, 512 bytes)
[ 0.000000] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.000000] Writing ErrCtl register=00020231
[ 0.000000] Readback ErrCtl register=00020231
[ 0.000000] Memory: 27528K/32768K available (3342K kernel code, 218K rwdata, 784K rodata, 188K init, 131K bss, 5240K reserved, 0K cma-reserved, 0K highmem)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] NR_IRQS:256
[ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[ 0.000009] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[ 0.015467] Calibrating delay loop...
[16:23:49.086]收←◆583.68 BogoMIPS (lpj=1167360)
[ 0.055738] pid_max: default: 32768 minimum: 301
[ 0.065025] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.078040] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[16:23:49.117]收←◆[ 0.096051] Primary instructi
[16:23:49.187]收←◆on cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.096062] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.096072] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.096216] CPU1 revision is: 0001992f (MIPS 1004Kc)
[ 0.174841] Synchronize counters for CPU 1: done.
[16:23:49.275]收←◆[ 0.194919] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.194927] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.194933] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.195007] CPU2 revision is: 0001992f (MIPS 1004Kc)
[ 0.268823] Synchronize counters for CPU 2: done.
[16:23:49.419]收←◆[ 0.279614] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.279620] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.279627] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.279708] CPU3 revision is: 0001992f (MIPS 1004Kc)
[ 0.356389] Synchronize counters for CPU 3: done.
[ 0.365794] Brought up 4 CPUs
[ 0.374665] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.393958] futex hash table entries: 1024 (order: 3, 32768 bytes)
[ 0.406393] pinctrl core: initialized pinctrl subsystem
[ 0.417267] NET: Registered protocol family 16
[16:23:49.577]收←◆[ 0.452622] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.463689] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.474688] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.486928] clocksource: Switched to clocksource GIC
[ 0.497586] NET: Registered protocol family 2
[ 0.506762] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.520503] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
[ 0.533099] TCP: Hash tables configured (established 1024 bind 1024)
[ 0.545774] UDP hash table entries: 256 (order: 1, 8192 bytes)
[ 0.557307] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[ 0.569987] NET: Registered protocol family 1
[16:23:49.685]收←◆[ 0.670876] 4 CPUs re-calibrate udelay(lpj = 1167360)
[ 0.681603] Crashlog allocated RAM at address 0x1f00000
[16:23:49.933]收←◆[ 0.697661] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.709147] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[ 0.730855] io scheduler noop registered
[ 0.738533] io scheduler deadline registered (default)
[ 0.749109] Serial: 8250/16550 driver, 16 ports, IRQ sharing enabled
[ 0.763775] console [ttyS0] disabled
[ 0.770786] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 33, base_baud = 3125000) is a 16550A
[ 0.788753] console [ttyS0] enabled
[ 0.788753] console [ttyS0] enabled
[ 0.802537] bootconsole [early0] disabled
[ 0.802537] bootconsole [early0] disabled
[ 0.819280] MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error
[ 0.833233] Allocate 16 byte aligned buffer: 80489180
[ 0.843294] Enable NFI Clock
[ 0.849022] # MTK NAND # : Use HW ECC
[ 0.856326] Device not found, ID: cfff
[ 0.863781] Not Support this Device!
[ 0.871238] chip_mode=00000002
[ 0.877316] Support this Device in MTK table! cfff
[ 0.887248] nand: No NAND device found
[ 0.894705] [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
[ 0.907527] # MTK NAND # : nand_scan fail.
[ 0.915675] [NFI] mtk_nand_probe fail, err = -6!
[ 0.925308] netif_napi_add() called with weight 128 on device eth%d
[16:23:49.965]收←◆[ 0.968771] mtk_soc_eth 1e100000.ethernet: generated random MAC address d6:29:9b:32:7f:24
[ 0.985165] libphy: mdio: probed
[16:23:51.382]收←◆[ 2.3917
[16:23:51.554]收←◆61] mtk_soc_eth 1e100000.ethernet: loaded mt7530 driver
[ 2.404130] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 10
[ 2.421258] mt7621_wdt 1e000100.wdt: Initialized
[ 2.431576] NET: Registered protocol family 10
[ 2.441750] NET: Registered protocol family 17
[ 2.450674] bridge: automatic filtering via arp/ip/ip6tables has been deprecated. Update your scripts to load br_netfilter if you need this.
[ 2.475787] 8021q: 802.1Q VLAN Support v1.8
[ 2.484959] hctosys: unable to open rtc device (rtc0)
[ 2.496246] VFS: Cannot open root device "(null)" or unknown-block(0,0): error -6
[ 2.511159] Please append a correct "root=" boot option; here are the available partitions:
[ 2.527793] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
[ 2.545447] Rebooting in 1 seconds..