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晕哥

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注册时间： 2017-09-06

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积分： 9202

xboot 的 GNU C 内嵌汇编 改为 MDK 风格

https://github.com/xboot/xboot/blob/master/src/arch/arm32/include/arm32.h
https://raw.githubusercontent.com/xboot/xboot/master/src/arch/arm32/include/arm32.h

#ifndef __ARM32_H__
#define __ARM32_H__

#ifdef __cplusplus
extern "C" {
#endif

#include <stdint.h>

static inline uint32_t arm32_read_p15_c1(void)
{
	uint32_t value;

	__asm__ __volatile__(
		"mrc p15, 0, %0, c1, c0, 0"
		: "=r" (value)
		:
		: "memory");

	return value;
}

static inline void arm32_write_p15_c1(uint32_t value)
{
	__asm__ __volatile__(
		"mcr p15, 0, %0, c1, c0, 0"
		:
		: "r" (value)
		: "memory");
	arm32_read_p15_c1();
}

static inline void arm32_interrupt_enable(void)
{
	uint32_t tmp;

	__asm__ __volatile__(
		"mrs %0, cpsr\n"
		"bic %0, %0, #(1<<7)\n"
		"msr cpsr_cxsf, %0"
		: "=r" (tmp)
		:
		: "memory");
}

static inline void arm32_interrupt_disable(void)
{
	uint32_t tmp;

	__asm__ __volatile__(
		"mrs %0, cpsr\n"
		"orr %0, %0, #(1<<7)\n"
		"msr cpsr_cxsf, %0"
		: "=r" (tmp)
		:
		: "memory");
}

static inline void arm32_mmu_enable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value | (1 << 0));
}

static inline void arm32_mmu_disable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value & ~(1 << 0));
}

static inline void arm32_dcache_enable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value | (1 << 2));
}

static inline void arm32_dcache_disable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value & ~(1 << 2));
}

static inline void arm32_icache_enable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value | (1 << 12));
}

static inline void arm32_icache_disable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value & ~(1 << 12));
}

static inline uint32_t arm32_smp_processor_id(void)
{
	uint32_t tmp;

	__asm__ __volatile__(
		"mrc p15,0,%0,c0,c0,5\n"
		"and %0,%0,#0x3\n"
		: "=r" (tmp)
		:
		: "memory");
	return tmp;
}

static inline void arm32_ttb_set(uint32_t base)
{
	__asm__ __volatile__(
		"mcr p15, 0, %0, c2, c0, 0"
		:
		: "r" (base)
		: "memory");
}

static inline void arm32_domain_set(uint32_t domain)
{
	__asm__ __volatile__(
		"mcr p15, 0, %0, c3, c0, 0"
		:
		: "r" (domain)
		: "memory");
}

static inline void arm32_tlb_invalidate(void)
{
	__asm__ __volatile__(
		"mov r0, #0\n"
		"mcr p15, 0, r0, c7, c10, 4\n"
		"mcr p15, 0, r0, c8, c6, 0\n"
		"mcr p15, 0, r0, c8, c5, 0\n"
		:
		:
		: "r0");
}

#ifdef __cplusplus
}
#endif

#endif /* __ARM32_H__ */

修改传成 MDK 风格:

#ifndef __ARM32_H__
#define __ARM32_H__

#ifdef __cplusplus
extern "C" {
#endif

#include <stdint.h>

static inline uint32_t arm32_read_p15_c1(void)
{
	uint32_t value;
#if 0
	__asm__ __volatile__(
		"mrc p15, 0, %0, c1, c0, 0"
		: "=r" (value)
		:
		: "memory");
#endif
	__asm
	{
		mrc p15, 0, value, c1, c0, 0
	}
	return value;
}

static inline void arm32_write_p15_c1(uint32_t value)
{
#if 0
	__asm__ __volatile__(
		"mcr p15, 0, %0, c1, c0, 0"
		:
		: "r" (value)
		: "memory");
#endif
	__asm
	{
		mcr p15, 0, value, c1, c0, 0
	}
	
	arm32_read_p15_c1();
}

static inline void arm32_interrupt_enable(void)
{
	uint32_t tmp;
#if 0
	__asm__ __volatile__(
		"mrs %0, cpsr\n"
		"bic %0, %0, #(1<<7)\n"
		"msr cpsr_cxsf, %0"
		: "=r" (tmp)
		:
		: "memory");
#endif
	__asm
	{
		mrs tmp, cpsr
		bic tmp, tmp, #(1<<7)
		msr cpsr_cxsf, tmp
	}
}

static inline void arm32_interrupt_disable(void)
{
	uint32_t tmp;
#if 0
	__asm__ __volatile__(
		"mrs %0, cpsr\n"
		"orr %0, %0, #(1<<7)\n"
		"msr cpsr_cxsf, %0"
		: "=r" (tmp)
		:
		: "memory");
#endif
	__asm
	{
		mrs tmp, cpsr
		orr tmp, tmp, #(1<<7)
		msr cpsr_cxsf, tmp
	}
}

static inline void arm32_mmu_enable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value | (1 << 0));
}

static inline void arm32_mmu_disable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value & ~(1 << 0));
}

static inline void arm32_dcache_enable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value | (1 << 2));
}

static inline void arm32_dcache_disable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value & ~(1 << 2));
}

static inline void arm32_icache_enable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value | (1 << 12));
}

static inline void arm32_icache_disable(void)
{
	uint32_t value = arm32_read_p15_c1();
	arm32_write_p15_c1(value & ~(1 << 12));
}

static inline uint32_t arm32_smp_processor_id(void)
{
	uint32_t tmp;
#if 0
	__asm__ __volatile__(
		"mrc p15,0,%0,c0,c0,5\n"
		"and %0,%0,#0x3\n"
		: "=r" (tmp)
		:
		: "memory");
#endif
	__asm
	{
		mrc p15, 0, tmp, c0, c0, 5
		and tmp, tmp, #0x3
	}
	return tmp;
}

static inline void arm32_ttb_set(uint32_t base)
{
#if 0
	__asm__ __volatile__(
		"mcr p15, 0, %0, c2, c0, 0"
		:
		: "r" (base)
		: "memory");
#endif
	__asm
	{
		mcr p15, 0, base, c2, c0, 0
	}
}

static inline void arm32_domain_set(uint32_t domain)
{
#if 0
	__asm__ __volatile__(
		"mcr p15, 0, %0, c3, c0, 0"
		:
		: "r" (domain)
		: "memory");
#endif
	__asm
	{
		mcr p15, 0, domain, c3, c0, 0
	}
}

static inline void arm32_tlb_invalidate(void)
{
#if 0
	__asm__ __volatile__(
		"mov r0, #0\n"
		"mcr p15, 0, r0, c7, c10, 4\n"
		"mcr p15, 0, r0, c8, c6, 0\n"
		"mcr p15, 0, r0, c8, c5, 0\n"
		:
		:
		: "r0");
#endif
	__asm
	{
		mov r0, #0
		mcr p15, 0, r0, c7, c10, 4
	  mcr p15, 0, r0, c8, c6, 0
	  mcr p15, 0, r0, c8, c5, 0
	}
}

#ifdef __cplusplus
}
#endif

#endif /* __ARM32_H__ */

---

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