楼主 #1 2018-09-07 16:53:33 分享评论
楼主 #4 2018-09-08 09:28:40 分享评论
楼主 #6 2018-09-08 10:30:44 分享评论
楼主 #9 2018-10-10 15:53:00 分享评论
楼主 #10 2018-10-10 16:19:32 分享评论
楼主 #11 2018-10-10 17:46:15 分享评论
楼主 #13 2018-10-10 18:09:16 分享评论
- 晕哥
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Re: 可用于全志系列芯片的 TF扩展板，可以插入TF卡座，引出JTAG和UART
晕哥 说：说明这个SD Nand是真的可以替代TF卡，而不用软件管理nand坏块和读写平衡什么的？
手册没写，我去问下厂家, 如果是SDIO接口，上层接口没有 坏块和读写平衡管理.
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楼主 #14 2018-10-11 10:31:23 分享评论
楼主 #15 2018-10-12 09:08:03 分享评论
- 晕哥
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Re: 可用于全志系列芯片的 TF扩展板，可以插入TF卡座，引出JTAG和UART
SEGGER J-Link Commander V4.96l ('?' for help)
Compiled Feb 25 2015 10:24:24
DLL version V4.96l, compiled Feb 25 2015 10:24:11
Firmware: J-Link V9 compiled Aug 23 2018 09:45:44
Hardware: V9.20
S/N: -1
VTarget = 3.327V
Info: TotalIRLen = 4, IRPrint = 0x01
Info: CP15.0.0: 0x41069265: ARM, Architecure 5TEJ
Info: CP15.0.1: 0x1D152192: ICache: 32kB (4*256*32), DCache: 16kB (4*128*32)
Info: Cache type: Separate, Write-back, Format C (WT supported)
Found 1 JTAG device, Total IRLen = 4:
#0 Id: 0x07926F0F, IRLen: 04, IRPrint: 0x1, ARM926EJ-S Core
Found ARM with core Id 0x07926F0F (ARM9)
Target interface speed: 100 kHz
J-Link>
是丑了一点， 但是插上去 JLINK 能用了。
昨天插唱戏机上面一点反应都没有， 以为我焊的这个板子有问题。
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楼主 #16 2018-10-15 11:23:40 分享评论
- 晕哥
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Re: 可用于全志系列芯片的 TF扩展板，可以插入TF卡座，引出JTAG和UART
SEGGER J-Link Commander V4.96l ('?' for help)
Compiled Feb 25 2015 10:24:24
DLL version V4.96l, compiled Feb 25 2015 10:24:11
Firmware: J-Link V9 compiled Aug 23 2018 09:45:44
Hardware: V9.20
S/N: -1
VTarget = 3.325V
Info: TotalIRLen = 4, IRPrint = 0x01
Info: ARM AP[0]: 0x64770001, AHB-AP
Info: ARM AP[1]: 0x44770002, APB-AP
Info: ROMTbl 0 [0]: 00001003, CID: 00000000, PID:00-00000000
Info: ROMTbl 0 [1]: 00100003, CID: B105100D, PID:04-000BB4A7 ROM Table
Info: ROMTbl 1 [0]: 00010003, CID: B105900D, PID:04-005BBC07 Cortex-A7
Info: Found Cortex-A7 r0p5
Info: 6 code breakpoints, 4 data breakpoints
Info: Debug architecture ARMv7.1
Info: Data endian: little
Info: Main ID register: 0x410FC075
Info: I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
Info: D-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way
Info: Unified-Cache L2: 128 KB, 256 Sets, 64 Bytes/Line, 8-Way
Info: System control register:
Info: Instruction endian: little
Info: Level-1 instruction cache disabled
Info: Level-1 data cache disabled
Info: MMU disabled
Info: Branch prediction enabled
Found 1 JTAG device, Total IRLen = 4:
#0 Id: 0x5BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
Cortex-A7 identified.
Target interface speed: 100 kHz
J-Link>
插入海豚派第二版里面，接JLINK, 很正常.
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楼主 #18 2018-12-04 10:38:55 分享评论
- 晕哥
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Re: 可用于全志系列芯片的 TF扩展板，可以插入TF卡座，引出JTAG和UART
晕哥 说：https://whycan.cn/files/members/3/QQ20181015112153.jpg
https://whycan.cn/files/members/3/QQ20181015112214.png
SEGGER J-Link Commander V4.96l ('?' for help)
Compiled Feb 25 2015 10:24:24
DLL version V4.96l, compiled Feb 25 2015 10:24:11
Firmware: J-Link V9 compiled Aug 23 2018 09:45:44
Hardware: V9.20
S/N: -1
VTarget = 3.325V
Info: TotalIRLen = 4, IRPrint = 0x01
Info: ARM AP[0]: 0x64770001, AHB-AP
Info: ARM AP[1]: 0x44770002, APB-AP
Info: ROMTbl 0 [0]: 00001003, CID: 00000000, PID:00-00000000
Info: ROMTbl 0 [1]: 00100003, CID: B105100D, PID:04-000BB4A7 ROM Table
Info: ROMTbl 1 [0]: 00010003, CID: B105900D, PID:04-005BBC07 Cortex-A7
Info: Found Cortex-A7 r0p5
Info: 6 code breakpoints, 4 data breakpoints
Info: Debug architecture ARMv7.1
Info: Data endian: little
Info: Main ID register: 0x410FC075
Info: I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
Info: D-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way
Info: Unified-Cache L2: 128 KB, 256 Sets, 64 Bytes/Line, 8-Way
Info: System control register:
Info: Instruction endian: little
Info: Level-1 instruction cache disabled
Info: Level-1 data cache disabled
Info: MMU disabled
Info: Branch prediction enabled
Found 1 JTAG device, Total IRLen = 4:
#0 Id: 0x5BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
Cortex-A7 identified.
Target interface speed: 100 kHz
J-Link>插入海豚派第二版里面，接JLINK, 很正常.
能否提供这个uboot.bin 用JLINK调试
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