购买链接:
小智极客 索智 全志 S3 核心板 开发板Linux系统: https://item.taobao.com/item.htm?id=588502966831
小智极客 索智/全志S3全功能底板: https://item.taobao.com/item.htm?id=588722094008
全志/索智S3芯片零售,内置128MB DDR3内存: https://item.taobao.com/item.htm?id=588754350002
QQ交流群: 202900925
全志V3s手册V1.0: Allwinner_V3s_Datasheet_V1.0.pdf
全志S3手册V0.2: Allwinner_S3_Datasheet_V0_2.pdf (索智S3手册)
参考链接: 编译索智(Sochip) S3 SDK (zeta)
2019-04-08 更新:
-------------------------------------------------
固件下载(主线uboot + 主线 linux 4.13): XiaoZhi_S3_Simple_V1_Pack_20190408.7z
2019-04-10 更新:
-------------------------------------------------
固件下载(主线uboot + 主线 linux 4.13)uart0, uart2两个版本: XiaoZhi_S3_Simple_V1_Pack_20190410.7z
源码地址: https://github.com/qq516333132/u-boot/tree/XiaoZhi_S3_Simple_V1
离线
把荔枝派的 u-boot 弄到 S3 跑跑:
参考链接: https://whycan.cn/t_561.html
1. 克隆源码: git clone https://github.com/Lichee-Pi/u-boot.git -b v3s-spi-experimental
2. ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- make LicheePi_Zero_defconfig (默认)
3. 修改 arch/arm/mach-sunxi/dram_sun8i_h3.c:
#ifdef CONFIG_SUNXI_H3_DRAM_DDR2
u8 bank_bits;
#endif
改为:
u8 bank_bits;
4. 修改 board/sunxi/Kconfig
删除第 138 行:
select SUNXI_H3_DRAM_DDR2
5. .config 文件 删除以下行: CONFIG_SUNXI_H3_DRAM_DDR2
可以用 sunxi-fel 烧录到 S3 板子,
调试串口是 PB8, PB9 也就是 示意图上面 B6, C6
离线
修改 drivers/video/sunxi_display.c
for (pin = SUNXI_GPE(0); pin <= SUNXI_GPE(24); pin++) {
if (pin >= SUNXI_GPE(20) && pin <= SUNXI_GPE(22))
continue; /* These pins are not LCD */
sunxi_gpio_set_cfgpin(pin, SUN8I_V3S_GPE_LCD);
}
改为:
for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(21); pin++) {
sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LCD0);
}
可以点亮 LCD 屏了!
离线
安装 arm gcc 浮点数工具链:
sudo apt-get install gcc-arm-linux-gnueabihf
编译 S3 u-boot 流程:
git clone https://github.com/qq516333132/u-boot.git -b XiaoZhi_S3_Simple_V1
###启用 4.3 寸 配置 ###
ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- make XiaoZhi_S3_Simple_V1_480x272LCD_defconfig###启用 5.0 寸 配置 ###
ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- make XiaoZhi_S3_Simple_V1_800x480LCD_defconfig###编译###
ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- make
修改记录:
https://github.com/qq516333132/u-boot/commits/XiaoZhi_S3_Simple_V1
https://github.com/qq516333132/u-boot/commit/404c4f2d1a8c88c8db338111173683043d3ba6cf
https://github.com/qq516333132/u-boot/commit/c14c5d029f10bf6a365a7f128b57ec0deb8b176b
https://github.com/qq516333132/u-boot/commit/b63ce45082d5b2762dbdb0d90000319c45ab06e2
diff 文件:
root@test4:/opt/u-boot# git diff dd6e8740dc2dc24d64c6ee62250330a174b16607 b63ce45082d5b2762dbdb0d90000319c45ab06e2
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 469dd71..24ac190 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -282,6 +282,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h3-nanopi-neo.dtb
dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
+dtb-$(CONFIG_MACH_SUN8I_S3) += \
+ sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 5bbc869..6aadac8 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -451,7 +451,7 @@ struct sunxi_ccm_reg {
/* CCM bits common to all Display Engine 2.0 clock ctrl regs */
#define CCM_DE2_CTRL_M(n) ((((n) - 1) & 0xf) << 0)
#define CCM_DE2_CTRL_PLL_MASK (3 << 24)
-#ifndef CONFIG_MACH_SUN8I_V3S
+#if !defined(CONFIG_MACH_SUN8I_V3S) && !defined(CONFIG_MACH_SUN8I_S3)
#define CCM_DE2_CTRL_PLL6_2X (0 << 24)
#define CCM_DE2_CTRL_PLL10 (1 << 24)
#else
diff --git a/arch/arm/include/asm/arch-sunxi/pwm.h b/arch/arm/include/asm/arch-sunxi/pwm.h
index c83ca37..f061383 100644
--- a/arch/arm/include/asm/arch-sunxi/pwm.h
+++ b/arch/arm/include/asm/arch-sunxi/pwm.h
@@ -31,7 +31,7 @@
#define SUNXI_PWM_MUX SUN8I_GPH_PWM
#endif
-#if defined CONFIG_MACH_SUN8I_V3S
+#if defined CONFIG_MACH_SUN8I_V3S || defined CONFIG_MACH_SUN8I_S3
#define SUNXI_PWM_PIN0 SUNXI_GPB(4)
#define SUNXI_PWM_MUX SUN8I_V3S_GPB_PWM
#endif
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 7a55ee3..b463653 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -110,7 +110,7 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0);
sunxi_gpio_set_pull(SUNXI_GPB(10), SUNXI_GPIO_PULL_UP);
-#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_V3S)
+#elif CONFIG_CONS_INDEX == 1 && (defined(CONFIG_MACH_SUN8I_V3S) || defined(CONFIG_MACH_SUN8I_S3))
sunxi_gpio_set_cfgpin(SUNXI_GPB(8), SUN8I_V3S_GPB_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_V3S_GPB_UART0);
sunxi_gpio_set_pull(SUNXI_GPB(9), SUNXI_GPIO_PULL_UP);
diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c
index 15f1e0e..34bcb5e 100644
--- a/arch/arm/mach-sunxi/cpu_info.c
+++ b/arch/arm/mach-sunxi/cpu_info.c
@@ -87,7 +87,7 @@ int print_cpuinfo(void)
printf("CPU: Allwinner A83T (SUN8I %04x)\n", sunxi_get_sram_id());
#elif defined CONFIG_MACH_SUN8I_H3
printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id());
-#elif defined CONFIG_MACH_SUN8I_V3S
+#elif defined CONFIG_MACH_SUN8I_V3S || defined CONFIG_MACH_SUN8I_S3
printf("CPU: Allwinner V3s (SUN8I %04x)\n", sunxi_get_sram_id());
#elif defined CONFIG_MACH_SUN9I
puts("CPU: Allwinner A80 (SUN9I)\n");
diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c b/arch/arm/mach-sunxi/dram_sun8i_h3.c
index a48320e..ec220f2 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_h3.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c
@@ -22,9 +22,9 @@ struct dram_para {
u8 bus_width;
u8 dual_rank;
u8 row_bits;
-#ifdef CONFIG_SUNXI_H3_DRAM_DDR2
+//#ifdef CONFIG_SUNXI_H3_DRAM_DDR2
u8 bank_bits;
-#endif
+//#endif
};
static inline int ns_to_t(int nanoseconds)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index a451f47..4437c01 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -139,6 +139,17 @@ config MACH_SUN8I_V3S
select SUNXI_DE2
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+config MACH_SUN8I_S3
+ bool "sun8i (Allwinner S3)"
+ select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
+ select SUNXI_GEN_SUN6I
+ select SUPPORT_SPL
+ select SUNXI_H3_DW_DRAM
+ select SUNXI_DE2
+ select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+
config MACH_SUN9I
bool "sun9i (Allwinner A80)"
select CPU_V7
@@ -155,7 +166,7 @@ endchoice
# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
config MACH_SUN8I
bool
- default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T || MACH_SUN8I_V3S
+ default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T || MACH_SUN8I_V3S || MACH_SUN8I_S3
config DRAM_TYPE
int "sunxi dram type"
diff --git a/configs/XiaoZhi_S3_Simple_V1_480x272LCD_defconfig b/configs/XiaoZhi_S3_Simple_V1_480x272LCD_defconfig
new file mode 100644
index 0000000..7192ee7
--- /dev/null
+++ b/configs/XiaoZhi_S3_Simple_V1_480x272LCD_defconfig
@@ -0,0 +1,27 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+# CONFIG_ARMV7_NONSEC is not set
+CONFIG_MACH_SUN8I_S3=y
+CONFIG_DRAM_CLK=360
+CONFIG_DRAM_ZQ=14779
+CONFIG_VIDEO_LCD_MODE="x:480,y:272,depth:18,pclk_khz:10000,le:42,ri:8,up:11,lo:4,hs:1,vs:1,sync:3,vmode:0"CONFIG_VIDEO_LCD_MODE="x:480,y:272,depth:18,pclk_khz:10000,le:42,ri:8,up:11,lo:4,hs:1,vs:1,sync:3,vmode:0"CONFIG_VIDEO_LCD_MODE="x:480,y:272,depth:18,pclk_khz:10000,le:42,ri:8,up:11,lo:4,hs:1,vs:1,sync:3,vmode:0"CONFIG_VIDEO_LCD_MODE="x:480,y:272,depth:18,pclk_khz:10000,le:42,ri:8,up:11,lo:4,hs:1,vs:1,sync:3,vmode:0"CONFIG_VIDEO_LCD_MODE="x:480,y:272,depth:18,pclk_khz:10000,le:42,ri:8,up:11,lo:4,hs:1,vs:1,sync:3,vmode:0"
+CONFIG_VIDEO_LCD_BL_PWM="PB4"
+# CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero"
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SPL=y
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPL_SPI_SUNXI=y
+# CONFIG_NETDEVICES is not set
+CONFIG_DM_SPI=y
+CONFIG_SUNXI_SPI=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/XiaoZhi_S3_Simple_V1_800x480LCD_defconfig b/configs/XiaoZhi_S3_Simple_V1_800x480LCD_defconfig
new file mode 100644
index 0000000..53245de
--- /dev/null
+++ b/configs/XiaoZhi_S3_Simple_V1_800x480LCD_defconfig
@@ -0,0 +1,27 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+# CONFIG_ARMV7_NONSEC is not set
+CONFIG_MACH_SUN8I_S3=y
+CONFIG_DRAM_CLK=360
+CONFIG_DRAM_ZQ=14779
+CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"
+CONFIG_VIDEO_LCD_BL_PWM="PB4"
+# CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero"
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SPL=y
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPL_SPI_SUNXI=y
+# CONFIG_NETDEVICES is not set
+CONFIG_DM_SPI=y
+CONFIG_SUNXI_SPI=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c
index 7049a3c..06ccb01 100644
--- a/drivers/video/sunxi_display.c
+++ b/drivers/video/sunxi_display.c
@@ -525,7 +525,7 @@ static void sunxi_composer_init(void)
struct sunxi_ccm_reg * const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-#ifndef CONFIG_MACH_SUN8I_V3S
+#if !defined(CONFIG_MACH_SUN8I_V3S) && !defined(CONFIG_MACH_SUN8I_S3)
clock_set_pll10(432000000);
/* Set DE parent to pll10 */
@@ -905,7 +905,7 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
(struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
int bp, clk_delay, clk_div, clk_double, pin, total, val;
-#ifndef CONFIG_MACH_SUN8I_V3S
+#if !defined(CONFIG_MACH_SUN8I_V3S) && !defined(CONFIG_MACH_SUN8I_S3)
#if defined CONFIG_MACH_SUN8I && defined CONFIG_VIDEO_LCD_IF_LVDS
for (pin = SUNXI_GPD(18); pin <= SUNXI_GPD(27); pin++) {
#else
@@ -921,13 +921,17 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
sunxi_gpio_set_drv(pin, 3);
#endif
}
-#else /* CONFIG_MACH_SUN8I_V3S */
+#elif defined CONFIG_MACH_SUN8I_V3S
for (pin = SUNXI_GPE(0); pin <= SUNXI_GPE(24); pin++) {
if (pin >= SUNXI_GPE(20) && pin <= SUNXI_GPE(22))
continue; /* These pins are not LCD */
sunxi_gpio_set_cfgpin(pin, SUN8I_V3S_GPE_LCD);
}
-#endif /* !CONFIG_MACH_SUN8I_V3S */
+#elif defined CONFIG_MACH_SUN8I_S3
+ for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(21); pin++) {
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LCD0);
+ }
+#endif
sunxi_lcdc_pll_set(0, mode->pixclock_khz, &clk_div, &clk_double);
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
index 6ac42ac..b8454ba 100644
--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
@@ -21,7 +21,7 @@
#define CONFIG_SUNXI_USB_PHYS 4
#elif defined CONFIG_MACH_SUN8I_A83T
#define CONFIG_SUNXI_USB_PHYS 3
-#elif defined CONFIG_MACH_SUN8I_V3S
+#elif (defined CONFIG_MACH_SUN8I_V3S) || (defined CONFIG_MACH_SUN8I_S3)
#define CONFIG_SUNXI_USB_PHYS 1
#else
#define CONFIG_SUNXI_USB_PHYS 2
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index fcecd0b..2874cef 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -77,7 +77,7 @@
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_LOAD_ADDR 0x41000000 /* default load address */
/* V3s do not have enough memory to place code at 0x4a000000 */
-#ifndef CONFIG_MACH_SUN8I_V3S
+#if !defined(CONFIG_MACH_SUN8I_V3S) && !defined(CONFIG_MACH_SUN8I_S3)
#define CONFIG_SYS_TEXT_BASE 0x4a000000
#else
#define CONFIG_SYS_TEXT_BASE 0x42e00000
@@ -153,7 +153,7 @@
#define CONFIG_SYS_MMC_MAX_DEVICE 4
#endif
-#ifndef CONFIG_MACH_SUN8I_V3S
+#if !defined(CONFIG_MACH_SUN8I_V3S) && !defined(CONFIG_MACH_SUN8I_S3)
/* 64MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
#else
@@ -303,7 +303,7 @@ extern int soft_i2c_gpio_scl;
* The amount of RAM to keep free at the top of RAM when relocating u-boot,
* to use as framebuffer. This must be a multiple of 4096.
*/
-#ifndef CONFIG_MACH_SUN8I_V3S
+#if !defined(CONFIG_MACH_SUN8I_V3S) && !defined(CONFIG_MACH_SUN8I_S3)
#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
#else
#define CONFIG_SUNXI_MAX_FB_SIZE (2 << 20)
@@ -410,7 +410,7 @@ extern int soft_i2c_gpio_scl;
* 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
* 1M script, 1M pxe and the ramdisk at the end.
*/
-#ifndef CONFIG_MACH_SUN8I_V3S
+#if !defined(CONFIG_MACH_SUN8I_V3S) && !defined(CONFIG_MACH_SUN8I_S3)
#define BOOTM_SIZE __stringify(0xa000000)
#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
@@ -440,7 +440,7 @@ extern int soft_i2c_gpio_scl;
"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
-#ifndef CONFIG_MACH_SUN8I_V3S
+#if !defined(CONFIG_MACH_SUN8I_V3S) && !defined(CONFIG_MACH_SUN8I_S3)
#define DFU_ALT_INFO_RAM \
"dfu_alt_info_ram=" \
"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
离线
https://github.com/qq516333132/u-boot/commits/XiaoZhi_S3_Simple_V1_BootCmdArgs
https://github.com/qq516333132/u-boot/commit/b9f440d625d727205970e93aace9639e7b23605f
https://github.com/qq516333132/u-boot/blob/XiaoZhi_S3_Simple_V1_BootCmdArgs/include/configs/sun8i.h
新建了一个 XiaoZhi_S3_Simple_V1_BootCmdArgs 分支,
在 include/configs/sun8i.h 添加 :
#undef CONFIG_BOOTCOMMAND
#undef CONFIG_BOOTARGS
#ifndef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND "sf probe 0 50000000;sf read 0x41800000 0x100000 0x4000;sf read 0x41000000 0x110000 0x500000; bootz 0x41000000 - 0x41800000"
#endif
#ifndef CONFIG_BOOTARGS
#define CONFIG_BOOTARGS "console=ttyS0,115200 earlyprintk panic=5 rootwait mtdparts=spi32766.0:992k(uboot)ro,32k(env)ro,64k(dtb)ro,5M(kernel)ro,-(rootfs) root=31:04 rw rootfstype=jffs2"
#endif
zImage 和 rootfs 按照 V3s 的套路编译生成即可。
固件下载(主线uboot + 主线 linux 4.13): XiaoZhi_S3_Simple_V1_Pack_20190408.7z
离线
https://github.com/Lichee-Pi/u-boot/commits/v3s-spi-experimental/common/Kconfig
https://github.com/Lichee-Pi/u-boot/commits/nano-v2018.01/common/Kconfig
原来是因为合并的版本不同, 导致 荔枝派 V3s 和 f1c100s 的 u-boot 表现有差异,
f1c100s 的 u-boot 可以通过 menuconfig 配置 bootargs 和 bootcmd,
而 V3s 的不可以。
离线
晕哥 说:https://whycan.cn/files/members/3/QQ20190311175226.jpg
焊上按键,烧录方便多了。
https://whycan.cn/files/members/3/QQ20190311164816.jpg
焊上排针, 串口输出正常。
用 sunxi-fel 测试烧录, 也正常。
请教一下,这个fel模式是通过哪个管脚进入的?
1. 不插TF卡 或 TF卡不能启动系统, 那短路 SPI FLASH 的 CLK 引脚到 GND, 再插入USB线即可。
2. 制作一个特殊的 TF卡: https://whycan.cn/t_2429.html
制作一个特殊的TF卡系统, 插入即进入 fel, 这样不用短路也能烧录:
wget https://github.com/linux-sunxi/sunxi-tools/raw/master/bin/fel-sdboot.sunxi
dd if=fel-sdboot.sunxi of=/dev/sdX bs=1024 seek=8 ####sdX替换成你的TF卡实际磁盘设备
强烈建议用第二种, 省得去插线拔线。
离线