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楼主 #1 2020-05-13 10:33:44

路人甲
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注册时间： 2017-09-07
已发帖子： 202
积分： 199.5

打算用N76E003作为全志A33@Linux的看门狗, A33应用程序控制PG0定时输出方波, 如果20秒内没有检测到方波, 用N76复位

打算用N76E003作为全志A33@Linux的看门狗,

A33应用程序控制PG0定时输出方波,

如果20秒内没有检测到方波, 用N76E003复位




可是问题来了， 我单片机不是很熟, N76E003就更差了，应该通过什么方法检测:

1. 定时轮询
2. 输入捕获
3. 其他

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楼主 #3 2020-05-13 10:45:21

路人甲
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注册时间： 2017-09-07
已发帖子： 202
积分： 199.5

Re: 打算用N76E003作为全志A33@Linux的看门狗, A33应用程序控制PG0定时输出方波, 如果20秒内没有检测到方波, 用N76复位

staunchheart 说：

一直有个问题，多核情况下，看门狗如何处理？
比如一个核心死了（如死循环了），其它的核心没死，如何处理呢？
求大神科普。

我这个产品只在应用看逻辑有没有死，不管底层四核的问题，

比如网络不通了, 或者采集不到modbus数据了， 就不给 PG0 一个脉冲信号了，

这样N76E003 就当他死了， 重新复位。

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楼主 #6 2020-05-13 11:14:36

路人甲
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注册时间： 2017-09-07
已发帖子： 202
积分： 199.5

Re: 打算用N76E003作为全志A33@Linux的看门狗, A33应用程序控制PG0定时输出方波, 如果20秒内没有检测到方波, 用N76复位

拉轰的脚踏车 说：

一组16位定时器2带有3路输入捕获功能，9个输入管脚可供选择

定时器2及输入捕获
定时器2是一个16位的向上计数器，由高8位寄存器(TH2)和低8位寄存器(TL2)组成。通过配置寄存器RCMP2H和
RCMP2L，设置       ̅̅ ̅̅̅(T2CON.0)后，定时器2能工作在比较模式和自动重载模式下。定时器2具有3通道输入
捕获模块，可用于测量输入脉冲宽度或周期。3通道捕获结果分别存放在寄存器C0H 及 C0L, C1H 及 C1L, C2H
及  C2L中。定时器2的时钟来自系统时钟的分频，总共具有8级分频，可适用于更多应用需求。当TR2
(T2CON.2) 置 1，定时器使能；TR2置0时，定时器关闭。下列寄存器用于控制定时器2功能。






刚刚翻了一下 N76E003 手册， 定时器2可以使用捕获外设。

谢大佬， 找到例程了:

https://github.com/OpenNuvoton/N76E003-BSP/tree/master/Sample_Code/Timer2_AutoReload_Capture

https://raw.githubusercontent.com/OpenNuvoton/N76E003-BSP/master/Sample_Code/Timer2_AutoReload_Capture/Code/Capture.c

就是定时器2的捕获例程:

/*---------------------------------------------------------------------------------------------------------*/
/*                                                                                                         */
/* Copyright(c) 2017 Nuvoton Technology Corp. All rights reserved.                                         */
/*                                                                                                         */
/*---------------------------------------------------------------------------------------------------------*/

//***********************************************************************************************************
//  Nuvoton Technoledge Corp. 
//  Website: http://www.nuvoton.com
//  E-Mail : MicroC-8bit@nuvoton.com
//  Date   : Apr/21/2017
//***********************************************************************************************************

//***********************************************************************************************************
//  File Function: N76E003 Timer2 Capture Mode demo code
//***********************************************************************************************************
#include "N76E003.h"
#include "Common.h"
#include "Delay.h"
#include "SFR_Macro.h"
#include "Function_define.h"

//*****************  The Following is in define in Fucntion_define.h  ***************************
//****** Always include Function_define.h call the define you want, detail see main(void) *******
//***********************************************************************************************
#if 0

////-------------------- Timer2 Capture define --------------------
////--- Falling Edge -----
//#define IC0_P12_CAP0_FallingEdge_Capture		CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC1_P11_CAP0_FallingEdge_Capture		CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x01;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC2_P10_CAP0_FallingEdge_Capture		CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x02;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC3_P00_CAP0_FallingEdge_Capture		CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x03;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC3_P04_CAP0_FallingEdge_Capture		CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x04;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC4_P01_CAP0_FallingEdge_Capture		CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x05;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC5_P03_CAP0_FallingEdge_Capture		CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x06;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC6_P05_CAP0_FallingEdge_Capture		CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x07;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC7_P15_CAP0_FallingEdge_Capture		CAPCON1&=0xFC;CAPCON3&=0xF0;CAPCON3|=0x08;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4

//#define IC0_P12_CAP1_FallingEdge_Capture		CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5
//#define	IC1_P11_CAP1_FallingEdge_Capture		CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x10;CAPCON0|=SET_BIT5;CAPCON0|=SET_BIT5
//#define	IC2_P10_CAP1_FallingEdge_Capture		CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x20;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5
//#define	IC3_P00_CAP1_FallingEdge_Capture		CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x30;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5
//#define	IC3_P04_CAP1_FallingEdge_Capture		CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x40;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5
//#define	IC4_P01_CAP1_FallingEdge_Capture		CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x50;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5
//#define	IC5_P03_CAP1_FallingEdge_Capture		CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x60;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5
//#define	IC6_P05_CAP1_FallingEdge_Capture		CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x70;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5
//#define	IC7_P15_CAP1_FallingEdge_Capture		CAPCON1&=0xF3;CAPCON3&=0x0F;CAPCON3|=0x80;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5

//#define IC0_P12_CAP2_FallingEdge_Capture		CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6
//#define	IC1_P11_CAP2_FallingEdge_Capture		CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x10;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6
//#define	IC2_P10_CAP2_FallingEdge_Capture		CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x20;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6
//#define	IC3_P00_CAP2_FallingEdge_Capture		CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x30;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6
//#define	IC3_P04_CAP2_FallingEdge_Capture		CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x40;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6
//#define	IC4_P01_CAP2_FallingEdge_Capture		CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x50;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6
//#define	IC5_P03_CAP2_FallingEdge_Capture		CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x60;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6
//#define	IC6_P05_CAP2_FallingEdge_Capture		CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x70;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6
//#define	IC7_P15_CAP2_FallingEdge_Capture		CAPCON1&=0x0F;CAPCON4&=0xF0;CAPCON4|=0x80;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6

////----- Rising edge ----
//#define IC0_P12_CAP0_RisingEdge_Capture			CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4;
//#define	IC1_P11_CAP0_RisingEdge_Capture			CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x01;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4;
//#define	IC2_P10_CAP0_RisingEdge_Capture			CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x02;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4;
//#define	IC3_P00_CAP0_RisingEdge_Capture			CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x03;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4;
//#define	IC3_P04_CAP0_RisingEdge_Capture			CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x04;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4;
//#define	IC4_P01_CAP0_RisingEdge_Capture			CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x05;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4;
//#define	IC5_P03_CAP0_RisingEdge_Capture			CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x06;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4;
//#define	IC6_P05_CAP0_RisingEdge_Capture			CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x07;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4;
//#define	IC7_P15_CAP0_RisingEdge_Capture			CAPCON1&=0xFC;CAPCON1|=0x01;CAPCON3&=0xF0;CAPCON3|=0x08;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4;

//#define IC0_P12_CAP1_RisingEdge_Capture			CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0FCAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC1_P11_CAP1_RisingEdge_Capture			CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x10;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC2_P10_CAP1_RisingEdge_Capture			CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x20;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC3_P00_CAP1_RisingEdge_Capture			CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x30;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC3_P04_CAP1_RisingEdge_Capture			CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x40;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC4_P01_CAP1_RisingEdge_Capture			CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x50;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC5_P03_CAP1_RisingEdge_Capture			CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x60;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC6_P05_CAP1_RisingEdge_Capture			CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x70;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC7_P15_CAP1_RisingEdge_Capture			CAPCON1&=0xF3;CAPCON1|=0x04;CAPCON3&=0x0F;CAPCON3|=0x80;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;

//#define IC0_P12_CAP3_RisingEdge_Capture			CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC1_P11_CAP3_RisingEdge_Capture			CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x01;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC2_P10_CAP3_RisingEdge_Capture			CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x02;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC3_P00_CAP3_RisingEdge_Capture			CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x03;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC3_P04_CAP3_RisingEdge_Capture			CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x04;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC4_P01_CAP3_RisingEdge_Capture			CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x05;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC5_P03_CAP3_RisingEdge_Capture			CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x06;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC6_P05_CAP3_RisingEdge_Capture			CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x07;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC7_P15_CAP3_RisingEdge_Capture			CAPCON1&=0x0F;CAPCON1|=0x10;CAPCON4&=0xF0;CAPCON4|=0x08;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;

////-----BOTH  edge ----
//#define IC0_P12_CAP0_BothEdge_Capture				CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC1_P11_CAP0_BothEdge_Capture				CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x01;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC2_P10_CAP0_BothEdge_Capture				CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x02;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC3_P00_CAP0_BothEdge_Capture				CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x03;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC3_P04_CAP0_BothEdge_Capture				CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x04;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC4_P01_CAP0_BothEdge_Capture				CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x05;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC5_P03_CAP0_BothEdge_Capture				CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x06;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC6_P05_CAP0_BothEdge_Capture				CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x07;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4
//#define	IC7_P15_CAP0_BothEdge_Capture				CAPCON1&=0xFC;CAPCON1|=0x02;CAPCON3&=0xF0;CAPCON3|=0x08;CAPCON0|=SET_BIT4;CAPCON2|=SET_BIT4

//#define IC0_P12_CAP1_BothEdge_Capture				CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5
//#define	IC1_P11_CAP1_BothEdge_Capture				CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x10;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC2_P10_CAP1_BothEdge_Capture				CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x20;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC3_P00_CAP1_BothEdge_Capture				CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x30;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC3_P04_CAP1_BothEdge_Capture				CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x40;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC4_P01_CAP1_BothEdge_Capture				CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x50;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC5_P03_CAP1_BothEdge_Capture				CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x60;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC6_P05_CAP1_BothEdge_Capture				CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x70;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;
//#define	IC7_P15_CAP1_BothEdge_Capture				CAPCON1&=0xF3;CAPCON1|=0x08;CAPCON3&=0x0F;CAPCON3|=0x80;CAPCON0|=SET_BIT5;CAPCON2|=SET_BIT5;

//#define IC0_P12_CAP3_BothEdge_Capture				CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC1_P11_CAP3_BothEdge_Capture				CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x01;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC2_P10_CAP3_BothEdge_Capture				CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x02;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC3_P00_CAP3_BothEdge_Capture				CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x03;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC3_P04_CAP3_BothEdge_Capture				CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x04;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC4_P01_CAP3_BothEdge_Capture				CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x05;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC5_P03_CAP3_BothEdge_Capture				CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x06;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC6_P05_CAP3_BothEdge_Capture				CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x07;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;
//#define	IC7_P15_CAP3_BothEdge_Capture				CAPCON1&=0x0F;CAPCON1|=0x20;CAPCON4&=0xF0;CAPCON4|=0x08;CAPCON0|=SET_BIT6;CAPCON2|=SET_BIT6;

//#define TIMER2_IC2_DISABLE									CAPCON0&=~SET_BIT6			 
//#define TIMER2_IC1_DISABLE									CAPCON0&=~SET_BIT5			
//#define TIMER2_IC0_DISABLE									CAPCON0&=~SET_BIT4	

///*----------------------------------------------------------------------------------------------------------
//*    Timer2 mode define
//------------------------------------------------------------------------------------------------------------*/

//#define 	TIMER2_CAP0_Capture_Mode			T2CON&=~SET_BIT0;T2MOD=0x89
//#define 	TIMER2_CAP1_Capture_Mode			T2CON&=~SET_BIT0;T2MOD=0x8A
//#define 	TIMER2_CAP2_Capture_Mode			T2CON&=~SET_BIT0;T2MOD=0x8B

///*----------------------------------------------------------------------------------------------------------
//*   Timer devider define
//----------------------------------------------------------------------------------------------------------*/
//#define TIMER2_DIV_4			T2MOD|=0x10;T2MOD&=0x9F
//#define TIMER2_DIV_16			T2MOD|=0x20;T2MOD&=0xAF
//#define TIMER2_DIV_32			T2MOD|=0x30;T2MOD&=0xBF
//#define TIMER2_DIV_64			T2MOD|=0x40;T2MOD&=0xCF
//#define TIMER2_DIV_128		T2MOD|=0x50;T2MOD&=0xDF
//#define TIMER2_DIV_256		T2MOD|=0x60;T2MOD&=0xEF
//#define TIMER2_DIV_512		T2MOD|=0x70
#endif


/************************************************************************************************************
*    Timer2 Capture interrupt subroutine
************************************************************************************************************/
void Capture_ISR (void) interrupt 12
{
        clr_CAPF0;                          // clear capture0 interrupt flag
        P1 = C0L;														// For capture mode CxL/CxH with data capture from I/O pin
        P2 = C0H;														
        P12 = ~P12;													//toggle GPIO1 to show int
				printf("\n TM2 CAP 0x%bX",C0H);
				clr_TF2;
}
/************************************************************************************************************
*    Main function 
************************************************************************************************************/
void main (void)
{
    Set_All_GPIO_Quasi_Mode;
		InitialUART0_Timer3(115200);
		P00_Input_Mode;
		P00 = 1;

		TIMER2_CAP0_Capture_Mode;
		IC3_P00_CAP0_BothEdge_Capture;
			
		set_ECAP;                                   //Enable Capture interrupt
		set_TR2;                                    //Triger Timer2
		set_EA;

    while(1);
}

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楼主 #7 2020-05-14 09:26:05

路人甲
会员
注册时间： 2017-09-07
已发帖子： 202
积分： 199.5

Re: 打算用N76E003作为全志A33@Linux的看门狗, A33应用程序控制PG0定时输出方波, 如果20秒内没有检测到方波, 用N76复位

感谢楼上各位， 参考 Timer2_AutoReload_Capture/Code/Capture.c 这个 demo,

已经搞定了N76做A33看门狗了,

我的逻辑是40秒超时, 如果40秒内没有收到PG0的脉冲，那么N76强拉 A33的 RESET 按键。

有一个问题要注意的是, N76E003的准双向上拉有点弱， 用PushPull会更好。

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