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// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
 * Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
 */

/dts-v1/;
#include "suniv-f1c100s.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Lichee Pi Nano";
	compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";

	aliases {
		serial0 = &uart0;
		spi1 = &spi1;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	panel: panel {
		compatible = "lg,lb070wv8", "simple-panel";
		#address-cells = <1>;
		#size-cells = <0>;
		enable-gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>;
		power-supply = <&reg_vcc3v3>;

 		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

 			panel_input: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&tcon0_out_lcd>;
			};
		};
	};

	reg_vcc3v3: vcc3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&be0 {
	status = "okay";
};

&de {
	status = "okay";
};

&tcon0 {
	pinctrl-names = "default";
	pinctrl-0 = <&lcd_rgb666_pins>;
	status = "okay";
};

&tcon0_out {
	tcon0_out_lcd: endpoint@0 {
		reg = <0>;
		remote-endpoint = <&panel_input>;
	};
};

&mmc0 {
	vmmc-supply = <&reg_vcc3v3>;
	bus-width = <4>;
	broken-cd;
	status = "okay";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pe_pins>;
	status = "okay";
};

&otg_sram {
	status = "okay";
};

&usb_otg {
	dr_mode = "otg";
	status = "okay";
};

&usbphy {
	usb0_id_det-gpio = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
	status = "okay";
};

&spi1 {
	spi-max-frequency = <32000000>;
    st7789v@0 {
        status = "okay";
        compatible = "sitronix,st7789v";
               reg = <0>;
               spi-max-frequency = <32000000>;
               rotate = <0>;
               spi-cpol;
               spi-cpha;
               rgb;
               fps = <30>;
               buswidth = <8>;
               reset-gpios = <&pio 4 7 GPIO_ACTIVE_LOW>;
               dc-gpios = <&pio 4 10 GPIO_ACTIVE_LOW>;
               debug = <1>;
        };
};

// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
 * Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
 * Copyright 2018 Mesih Kilinc <mesihkilinc@gmail.com>
 */

#include <dt-bindings/clock/suniv-ccu-f1c100s.h>
#include <dt-bindings/reset/suniv-ccu-f1c100s.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&intc>;

	clocks {
		osc24M: clk-24M {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
			clock-output-names = "osc24M";
		};

		osc32k: clk-32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
			clock-output-names = "osc32k";
		};
	};

	cpus {
		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};
	
	de: display-engine {
		compatible = "allwinner,suniv-f1c100s-display-engine";
		allwinner,pipelines = <&fe0>;
		status = "disabled";
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		sram-controller@1c00000 {
			compatible = "allwinner,suniv-f1c100s-system-control",
				     "allwinner,sun4i-a10-system-control";
			reg = <0x01c00000 0x30>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			sram_d: sram@10000 {
				compatible = "mmio-sram";
				reg = <0x00010000 0x1000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x00010000 0x1000>;

				otg_sram: sram-section@0 {
					compatible = "allwinner,suniv-f1c100s-sram-d",
						     "allwinner,sun4i-a10-sram-d";
					reg = <0x0000 0x1000>;
					status = "disabled";
				};
			};
		};

		tcon0: lcd-controller@1c0c000 {
			compatible = "allwinner,suniv-f1c100s-tcon";
			reg = <0x01c0c000 0x1000>;
			interrupts = <29>;
			clocks = <&ccu CLK_BUS_LCD>,
				 <&ccu CLK_TCON>;
			clock-names = "ahb",
				      "tcon-ch0";
			clock-output-names = "tcon-pixel-clock";
			resets = <&ccu RST_BUS_LCD>;
			reset-names = "lcd";
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				tcon0_in: port@0 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;

					tcon0_in_be0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&be0_out_tcon0>;
					};
				};

				tcon0_out: port@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;
				};
			};
		};

		ccu: clock@1c20000 {
			compatible = "allwinner,suniv-f1c100s-ccu";
			reg = <0x01c20000 0x400>;
			clocks = <&osc24M>, <&osc32k>;
			clock-names = "hosc", "losc";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		intc: interrupt-controller@1c20400 {
			compatible = "allwinner,suniv-f1c100s-ic";
			reg = <0x01c20400 0x400>;
			interrupt-controller;
			#interrupt-cells = <1>;
		};


        spi1:spi@1c06000 {
            compatible = "allwinner,suniv-spi", "allwinner,sun8i-h3-spi";
            reg = <0x1c06000 0x1000>;
            interrupts = <0xb>;
            clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_BUS_SPI1>;
            clock-names = "ahb", "mod";
            resets = <&ccu RST_BUS_SPI1>;
            status = "disabled";
            #address-cells = <1>;
            #size-cells = <0>;
            bias-pull-up;
            pinctrl-names = "default";
            pinctrl-0 = <&spi1_pins>;
        };       
		pio: pinctrl@1c20800 {
			compatible = "allwinner,suniv-f1c100s-pinctrl";
			reg = <0x01c20800 0x400>;
			interrupts = <38>, <39>, <40>;
			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			interrupt-controller;
			#interrupt-cells = <3>;
			#gpio-cells = <3>;

			uart0_pe_pins: uart0-pe-pins {
				pins = "PE0", "PE1";
				function = "uart0";
			};
			
			lcd_rgb666_pins: lcd-rgb666-pins {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4",
				       "PD5", "PD6", "PD7", "PD8", "PD9",
				       "PD10", "PD11", "PD12", "PD13", "PD14",
				       "PD15", "PD16", "PD17", "PD18", "PD19",
				       "PD20", "PD21";
				function = "lcd";
			};
			
			mmc0_pins: mmc0-pins {
				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				function = "mmc0";
			};
           		 spi1_pins: spi1-pins{
                		pins = "PA2","PA0","PA3","PA1";
                		function = "spi1";
            		};
		};

		timer@1c20c00 {
			compatible = "allwinner,suniv-f1c100s-timer";
			reg = <0x01c20c00 0x90>;
			interrupts = <13>;
			clocks = <&osc24M>;
		};

		mmc0: mmc@1c0f000 {
			compatible = "allwinner,suniv-f1c100s-mmc",
				     "allwinner,sun7i-a20-mmc";
			reg = <0x01c0f000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC0>,
				 <&ccu CLK_MMC0>,
				 <&ccu CLK_MMC0_OUTPUT>,
				 <&ccu CLK_MMC0_SAMPLE>;
			clock-names = "ahb",
					      "mmc",
					      "output",
				    	  "sample";
			resets = <&ccu RST_BUS_MMC0>;
			reset-names = "ahb";
			interrupts = <23>;
			pinctrl-names = "default";
			pinctrl-0 = <&mmc0_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		wdt: watchdog@1c20ca0 {
			compatible = "allwinner,suniv-f1c100s-wdt",
				     "allwinner,sun4i-a10-wdt";
			reg = <0x01c20ca0 0x20>;
		};

		uart0: serial@1c25000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c25000 0x400>;
			interrupts = <1>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART0>;
			resets = <&ccu RST_BUS_UART0>;
			status = "disabled";
		};

		uart1: serial@1c25400 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c25400 0x400>;
			interrupts = <2>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART1>;
			resets = <&ccu RST_BUS_UART1>;
			status = "disabled";
		};

		uart2: serial@1c25800 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c25800 0x400>;
			interrupts = <3>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART2>;
			resets = <&ccu RST_BUS_UART2>;
			status = "disabled";
		};
		usb_otg: usb@1c13000 {
			compatible = "allwinner,suniv-musb";
			reg = <0x01c13000 0x0400>;
			clocks = <&ccu CLK_BUS_OTG>;
			resets = <&ccu RST_BUS_OTG>;
			interrupts = <26>;
			interrupt-names = "mc";
			phys = <&usbphy 0>;
			phy-names = "usb";
			extcon = <&usbphy 0>;
			allwinner,sram = <&otg_sram 1>;
			status = "disabled";
		};

		usbphy: phy@1c13400 {
			compatible = "allwinner,suniv-usb-phy";
			reg = <0x01c13400 0x10>;
			reg-names = "phy_ctrl";
			clocks = <&ccu CLK_USB_PHY0>;
			clock-names = "usb0_phy";
			resets = <&ccu RST_USB_PHY0>;
			reset-names = "usb0_reset";
			#phy-cells = <1>;
			status = "disabled";
		};
		fe0: display-frontend@1e00000 {
			compatible = "allwinner,suniv-f1c100s-display-frontend";
			reg = <0x01e00000 0x20000>;
			interrupts = <30>;
			clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>,
				 <&ccu CLK_DRAM_DE_FE>;
			clock-names = "ahb", "mod",
				      "ram";
			resets = <&ccu RST_BUS_DE_FE>;
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				fe0_out: port@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					fe0_out_be0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&be0_in_fe0>;
					};
				};
			};
		};

		be0: display-backend@1e60000 {
			compatible = "allwinner,suniv-f1c100s-display-backend";
			reg = <0x01e60000 0x10000>;
			reg-names = "be";
			interrupts = <31>;
			clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
				 <&ccu CLK_DRAM_DE_BE>;
			clock-names = "ahb", "mod",
				      "ram";
			resets = <&ccu RST_BUS_DE_BE>;
			reset-names = "be";
			assigned-clocks = <&ccu CLK_DE_BE>;
			assigned-clock-rates = <300000000>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				be0_in: port@0 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;

					be0_in_fe0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&fe0_out_be0>;
					};
				};

				be0_out: port@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					be0_out_tcon0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&tcon0_in_be0>;
					};
				};
			};
		};
	};
};

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 5.2.0-licheepi-nano (coldj@ubuntu) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #5 Wed Sep 28 01:38:47 PDT 2022
[    0.000000] CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=0005317f
[    0.000000] CPU: VIVT data cache, VIVT instruction cache
[    0.000000] OF: fdt: Machine model: Lichee Pi Nano
[    0.000000] Memory policy: Data cache writeback
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 8128
[    0.000000] Kernel command line: console=ttyS0,115200 panic=5 root=/dev/mmcblk0p2 rootwait rw 
[    0.000000] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
[    0.000000] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
[    0.000000] Memory: 22700K/32768K available (6144K kernel code, 236K rwdata, 1472K rodata, 1024K init, 228K bss, 10068K reserved, 0K cma-reserved, 0K highmem)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] random: get_random_bytes called from start_kernel+0x254/0x42c with crng_init=0
[    0.000035] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
[    0.000090] clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[    0.000455] Console: colour dummy device 80x30
[    0.000523] Calibrating delay loop... 346.52 BogoMIPS (lpj=1732608)
[    0.060115] pid_max: default: 32768 minimum: 301
[    0.060413] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.060442] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.061593] CPU: Testing write buffer coherency: ok
[    0.063046] Setting up static identity map for 0x80100000 - 0x80100058
[    0.064593] devtmpfs: initialized
[    0.068643] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.068691] futex hash table entries: 256 (order: -1, 3072 bytes)
[    0.068913] pinctrl core: initialized pinctrl subsystem
[    0.070490] NET: Registered protocol family 16
[    0.071524] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.072942] cpuidle: using governor menu
[    0.107772] SCSI subsystem initialized
[    0.108066] usbcore: registered new interface driver usbfs
[    0.108171] usbcore: registered new interface driver hub
[    0.108303] usbcore: registered new device driver usb
[    0.108623] pps_core: LinuxPPS API ver. 1 registered
[    0.108640] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.109034] Advanced Linux Sound Architecture Driver Initialized.
[    0.110133] clocksource: Switched to clocksource timer
[    0.130798] NET: Registered protocol family 2
[    0.131806] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes)
[    0.131860] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[    0.131897] TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
[    0.131925] TCP: Hash tables configured (established 1024 bind 1024)
[    0.132143] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.132186] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.132553] NET: Registered protocol family 1
[    0.134314] NetWinder Floating Point Emulator V0.97 (double precision)
[    0.135775] Initialise system trusted keyrings
[    0.136207] workingset: timestamp_bits=30 max_order=13 bucket_order=0
[    0.153897] Key type asymmetric registered
[    0.153924] Asymmetric key parser 'x509' registered
[    0.154052] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
[    0.154070] io scheduler mq-deadline registered
[    0.154081] io scheduler kyber registered
[    0.155517] sun4i-usb-phy 1c13400.phy: Couldn't request ID GPIO
[    0.162661] suniv-f1c100s-pinctrl 1c20800.pinctrl: initialized sunXi PIO driver
[    0.291929] Serial: 8250/16550 driver, 8 ports, IRQ sharing disabled
[    0.295858] suniv-f1c100s-pinctrl 1c20800.pinctrl: 1c20800.pinctrl supply vcc-pe not found, using dummy regulator
[    0.297094] printk: console [ttyS0] disabled
[    0.317268] 1c25000.serial: ttyS0 at MMIO 0x1c25000 (irq = 22, base_baud = 6250000) is a 16550A
[    0.693619] printk: console [ttyS0] enabled
[    0.700518] suniv-f1c100s-pinctrl 1c20800.pinctrl: 1c20800.pinctrl supply vcc-pd not found, using dummy regulator
[    0.715944] SCSI Media Changer driver v0.25 
[    0.721216] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    0.727733] ehci-platform: EHCI generic platform driver
[    0.733220] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[    0.739420] ohci-platform: OHCI generic platform driver
[    0.744988] usbcore: registered new interface driver usb-storage
[    0.751966] i2c /dev entries driver
[    0.756650] suniv-f1c100s-pinctrl 1c20800.pinctrl: 1c20800.pinctrl supply vcc-pf not found, using dummy regulator
[    0.793909] sunxi-mmc 1c0f000.mmc: initialized, max. request size: 16384 KB
[    0.802561] usbcore: registered new interface driver usbhid
[    0.808126] usbhid: USB HID core driver
[    0.823113] NET: Registered protocol family 17
[    0.827653] Key type dns_resolver registered
[    0.833646] Loading compiled-in X.509 certificates
[    0.846283] suniv-f1c100s-pinctrl 1c20800.pinctrl: 1c20800.pinctrl supply vcc-pd not found, using dummy regulator
[    0.857360] sun4i-backend 1e60000.display-backend: Couldn't find matching frontend, frontend features disabled
[    0.867975] sun4i-drm display-engine: bound 1e60000.display-backend (ops 0xc0737d54)
[    0.876659] sun4i-drm display-engine: bound 1c0c000.lcd-controller (ops 0xc07369ac)
[    0.884402] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    0.891036] [drm] No driver support for vblank timestamp query.
[    0.898260] [drm] Initialized sun4i-drm 1.0.0 20150629 for display-engine on minor 0
[    1.046987] mmc0: host does not support reading read-only switch, assuming write-enable
[    1.049052] mmc0: new high speed SD card at address 219d
[    1.052518] mmcblk0: mmc0:219d SDN1G 121 MiB 
[    1.065751] Console: switching to colour frame buffer device 100x30
[    1.067700]  mmcblk0: p1 p2 p3
[    1.109969] sun4i-drm display-engine: fb0: sun4i-drmdrmfb frame buffer device
[    1.118342] usb_phy_generic usb_phy_generic.0.auto: usb_phy_generic.0.auto supply vcc not found, using dummy regulator
[    1.130247] musb-hdrc musb-hdrc.1.auto: MUSB HDRC host driver
[    1.136029] musb-hdrc musb-hdrc.1.auto: new USB bus registered, assigned bus number 1
[    1.145784] hub 1-0:1.0: USB hub found
[    1.149664] hub 1-0:1.0: 1 port detected
[    1.155548] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[    1.170053] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[    1.176897] ALSA device list:
[    1.179877]   #0: Loopback 1
[    1.183541] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[    1.192263] cfg80211: failed to load regulatory.db
[    1.270996] random: fast init done
[    1.323145] EXT4-fs (mmcblk0p2): recovery complete
[    1.367166] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[    1.375484] VFS: Mounted root (ext4 filesystem) on device 179:2.
[    1.382700] devtmpfs: mounted
[    1.389827] Freeing unused kernel memory: 1024K
[    1.394538] Run /sbin/init as init process
[    1.511646] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)
Starting syslogd: OK
Starting klogd: OK
Running sysctl: OK
Initializing random number generator: OK
Saving random seed: [    1.831080] random: dd: uninitialized urandom read (512 bytes read)
OK
Starting network: OK

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