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Load "D:\\maojing\\hdy-radio\\1-templete\\mdk\\Objects\\templete.axf" 
ProjectFile = D:\maojing\hdy-radio\1-templete\mdk\JLinkArm_debug_in_dram.ini
Info: Device "ARM7" selected (0 KB flash, 0 KB RAM).
Device = TMPA900CMXBG
Info: Device "ARM7" selected (0 KB flash, 0 KB RAM).
VTarget = 3.261V
Info: TotalIRLen = 4, IRPrint = 0x01
***JLink Warning: Identified core does not match configuration. (Found: ARM9, Configured: ARM7)
Info: CP15.0.0: 0x41069265: ARM, Architecure 5TEJ
Info: CP15.0.1: 0x1D152192: ICache: 32kB (4*256*32), DCache: 16kB (4*128*32)
Info: Cache type: Separate, Write-back, Format C (WT supported)
Info: RTCK is not connected
Info: Auto JTAG speed: 8000 kHz
Info: J-Link: ARM9 CP15 Settings changed: 52078 from 78, MMU Off, ICache Off, DCache Off
***JLink Warning: RESET (pin 15) high, but should be low. Please check target hardware.
***JLink Warning: PC of target system has unexpected value of 0xFFFF00D8 after reset.
Info: CP15.0.0: 0x41069265: ARM, Architecure 5TEJ
Info: CP15.0.1: 0x1D152192: ICache: 32kB (4*256*32), DCache: 16kB (4*128*32)
Info: Cache type: Separate, Write-back, Format C (WT supported)
DLL version V4.50l, compiled Jul  9 2012 15:02:49
Firmware: J-Link ARM V8 compiled Nov 28 2014 13:44:46
Hardware: V8.00
Hardware-Breakpoints: 2
Software-Breakpoints: 8192
Watchpoints:          0
Found 1 JTAG device, Total IRLen = 4:
 Id of device #0: 0x07926F0F
ARM9 identified.
JTAG speed: 1000 kHz
Info: RTCK is not connected
Info: Auto JTAG speed: 8000 kHz
***JLink Warning: RESET (pin 15) high, but should be low. Please check target hardware.
***JLink Warning: PC of target system has unexpected value of 0xFFFF018C after reset.
Info: CP15.0.0: 0x41069265: ARM, Architecure 5TEJ
Info: CP15.0.1: 0x1D152192: ICache: 32kB (4*256*32), DCache: 16kB (4*128*32)
Info: Cache type: Separate, Write-back, Format C (WT supported)
JTAG speed: 1000 kHz
No Algorithm found for: 00000000H - 00001357H
Erase skipped!
Error: Flash Download failed  -  ARM926EJ-S
Info: RTCK is not connected
Info: Auto JTAG speed: 8000 kHz
Flash Load finished at 10:13:14

LR_IROM1 0x00000000  {    ; load region size_region
    ER_IROM1 0x00000000 {  ; load address = execution address
        *.o (F1C100S_INIT, +First)
        *(InRoot$$Sections)
        .ANY (+RO)
    }
    RW_RAM1 +0  {  ; RW_RAM1 start address is after ER_ROM1
        .ANY (+RW +ZI)
    }
}

FUNC void SET_PC_SRAM(void)
{
	PC = 0x00000000;
}

SET_PC_SRAM();

LR_IROM1 0x80000000  {    ; load region size_region
    ER_IROM1 0x80000000 {  ; load address = execution address
        *.o (F1C100S_INIT, +First)
        *(InRoot$$Sections)
        .ANY (+RO)
    }
    RW_RAM1 +0  {  ; RW_RAM1 start address is after ER_ROM1
        .ANY (+RW +ZI)
    }
}

FUNC void INIT_CLOCK(void)
{
	int val;
	
	//先把CPU时钟源设置为24Mhz晶振
	val = _RDWORD(0x01c20050);
	val &= ~(3 << 16);
	val |= (1 << 16);
	_WDWORD(0x01c20050, val);
	
	//设置PLL_PERIPH(N=25,M=1) to 600Mhz
	_WDWORD(0x01c20028, 0x80041800);

	//设置AHB/APB/HCLKC的工作频率 200MHz/100MHz
	_WDWORD(0x01c20054, 0x00003180);

	//开启DRAM的front-end和back-end的DCLK门
	_WDWORD(0x01c20100, 0x05000000);	

	//配置PLL_CPU的值408MHz
	_WDWORD(0x01c20000, 0x80001000);

	//把CPU时钟源设置为PLL_CPU
	val = _RDWORD(0x01c20050);
	val &= ~(3 << 16);
	val |= (2 << 16);
	_WDWORD(0x01c20050, val);	
}

FUNC void INIT_DRAM(void)
{
	int val;
	
	//初始化DRAM
	val = _RDWORD(0x01c20824);
	val |= (7 << 12);
	_WDWORD(0x01c20824, val);

	//设置DRAM时钟 156MHz
	_WDWORD(0x01c20020, 0x80100c00);

	//开启DRAM时钟
	val = _RDWORD(0x01c20060);
	val |= (1 << 14);
	_WDWORD(0x01c20060, val);	

	//DRAM软件复位失效
	val = _RDWORD(0x01c202c0);
	val |= (1 << 14);
	_WDWORD(0x01c202c0, val);				

	//设置DRAM参数
	_WDWORD(0x01c01000, 0x0001318a);	//f1c100s设置
	//_WDWORD(0x01c01000, 0x0001338a);	//f1c200s设置

	val = _RDWORD(0x01c0100c);
	val &= ~(7 << 6);
	val |= ((4 << 6) | (1 << 0));
	_WDWORD(0x01c0100c, val);			
}

FUNC void SET_PC_DRAM(void)
{
	PC = 0x80000000;
}

INIT_CLOCK();
INIT_DRAM();
SET_PC_DRAM();