页次: 1
是不是DDR哪里不对?我一个成功的启动log
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[29]HELLO! BOOT0 is starting!
[32]BOOT0 commit : 5224261
[34]set pll start
[40]periph0 has been enabled
[43]set pll end
[45][pmu]: bus read error
[47]board init ok
[49]enable_jtag
[51]ZQ value = 0x31
[52]get_pmu_exist() = -1
[55]DRAM BOOT DRIVE INFO: V0.32
[58]DRAM CLK = 792 MHz
[60]DRAM Type = 3 (2:DDR2,3:DDR3)
[63]DRAMC read ODT off.
[66]DRAM ODT value: 0x42.
[68]ddr_efuse_type: 0xa
[71]mark_id: 0x60
[73]DRAM SIZE =128 M
[75]PLL_DDR_CTRL_REG:0xf8004100
[78]DRAM_CLK_REG:0xc0000000
[81][TIMING DEBUG] MR2= 0x18
[88]DRAM simple test OK.
页次: 1