WhyCan Forum(哇酷开发者社区)

void push_event_touch_end(void * device, s32_t x, s32_t y, u32_t id)
{
	struct event_t e;

	e.device = device;
	e.type = EVENT_TYPE_TOUCH_END;
	e.e.touch_end.x = x;
	e.e.touch_end.y = y;
	e.e.touch_end.id = id;
	push_event(&e);
	printf("%d\r\n",(int)e.type);
}

xboot: /# tscal fb-f1c200s.0 ts-f1c200s.0
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[23, 13259, -962672, 10512, 12, -2707748, 65536]
xboot: /# tscal fb-f1c200s.0 ts-f1c200s.0
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[67, 13208, -761848, 10452, -85, -2029674, 65536]
xboot: /# tscal fb-f1c200s.0 ts-f1c200s.0
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[41, 13200, -578824, 10400, -43, -2319552, 65536]
xboot: /# tscal fb-f1c200s.0 ts-f1c200s.0
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[135, 13038, -433968, 10462, 51, -2800992, 65536]
xboot: /# tscal fb-f1c200s.0 ts-f1c200s.0
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void push_event_touch_end(void * device, s32_t x, s32_t y, u32_t id)
{
	struct event_t e;

	e.device = device;
	e.type = EVENT_TYPE_TOUCH_END;
	e.e.touch_end.x = x;
	e.e.touch_end.y = y;
	e.e.touch_end.id = id;

	push_event(&e);

	e.device = device;
	e.type = EVENT_TYPE_TOUCH_END;
	e.e.touch_end.x = x;
	e.e.touch_end.y = y;
	e.e.touch_end.id = id;
	//printf("%d\r\n",(int)e.type);
}

printf("%d\r\n",(int)e.type);

case EVENT_TYPE_TOUCH_END:
						cal.x[cal.index] = e.e.touch_end.x;
						cal.y[cal.index] = e.e.touch_end.y;
						if(++cal.index >= 5)
						{
							if(perform_calibration(&cal))
							{
								input_ioctl(dev, "touchscreen-set-calibration", &cal.a[0]);
								printf("[%d, %d, %d, %d, %d, %d, %d]\r\n", cal.a[0], cal.a[1], cal.a[2], cal.a[3], cal.a[4], cal.a[5], cal.a[6]);
								running = 0;
							}
							else
							{
								cal.index = 0;
							}
						}
						break;

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enum event_type_t {
	EVENT_TYPE_KEY_DOWN					= 0x0100,
	EVENT_TYPE_KEY_UP					= 0x0101,

	EVENT_TYPE_ROTARY_TURN				= 0x0200,

	EVENT_TYPE_MOUSE_DOWN				= 0x0300,
	EVENT_TYPE_MOUSE_MOVE				= 0x0301,
	EVENT_TYPE_MOUSE_UP					= 0x0302,
	EVENT_TYPE_MOUSE_WHEEL				= 0x0303,

	EVENT_TYPE_TOUCH_BEGIN				= 0x0400,
	EVENT_TYPE_TOUCH_MOVE				= 0x0401,
	EVENT_TYPE_TOUCH_END				= 0x0402,

	EVENT_TYPE_JOYSTICK_LEFTSTICK		= 0x0500,
	EVENT_TYPE_JOYSTICK_RIGHTSTICK		= 0x0501,
	EVENT_TYPE_JOYSTICK_LEFTTRIGGER		= 0x0502,
	EVENT_TYPE_JOYSTICK_RIGHTTRIGGER	= 0x0503,
	EVENT_TYPE_JOYSTICK_BUTTONDOWN		= 0x0504,
	EVENT_TYPE_JOYSTICK_BUTTONUP		= 0x0505,

	EVENT_TYPE_SYSTEM_EXIT				= 0x1000,
};

static void ts_f1c100s_interrupt(void * data)
{
	struct input_t * input = (struct input_t *)(data);
	struct ts_f1c100s_pdata_t * pdat = (struct ts_f1c100s_pdata_t *)input->priv;
	u32_t val;
	int x = 0, y = 0;

	val = read32(pdat->virt + TP_INT_FIFOS);
	printf("%d\r\n",val);
	if(val & TP_DOWN_PENDING)
	{
		if(!pdat->press)
		{
		}
	}
	if(val & TP_UP_PENDING)
	{
		pdat->press = 0;
		pdat->ignore_fifo_data = 1;
		tsfilter_clear(pdat->filter);
		push_event_touch_end(input, pdat->x, pdat->y, 0);
	}
	if(val & FIFO_DATA_PENDING)
	{
		y = read32(pdat->virt + TP_DATA);
		x = read32(pdat->virt + TP_DATA);

		if(!pdat->ignore_fifo_data)
		{
			tsfilter_update(pdat->filter, &x, &y);

			if(!pdat->press)
			{
				push_event_touch_begin(input, x, y, 0);
				pdat->press = 1;
			}
			else
			{
				if((pdat->x != x) || (pdat->y != y))
				{
					push_event_touch_move(input, x, y, 0);
				}
			}
			pdat->x = x;
			pdat->y = y;
		}
		else
		{
			pdat->ignore_fifo_data = 0;
		}
	}
	write32(pdat->virt + TP_INT_FIFOS, val);
}

tscal fb-f1c200s ts-f1c200s

#
# Configurable advanced custom components
#
CFG_FRAMEWORK	?= n
CFG_CAIRO		?= n
CFG_WBOXTEST 	?= n

[    0.254008]mount /private with 'ram' filesystem
Press any key to stop auto boot:  0.000
 could not found 'launcher' command

overview

static void mach_logger(struct machine_t * mach, const char * buf, int count)
{
	#if 0
	virtual_addr_t virt = phys_to_virt(0x01c25000);
	int i;

	for(i = 0; i < count; i++)
	{
		while((read32(virt + 0x14) & (0x1 << 6)) == 0);
		write32(virt + 0x00, buf[i]);
	}
	#else
	virtual_addr_t virt = phys_to_virt(0x01c25800);
	int i;

	for(i = 0; i < count; i++)
	{
		while((read32(virt + 0x7c) & (0x1 << 1)) == 0);
		write32(virt + 0x00, buf[i]);
	}
	#endif
	
}

 _  _ | |___ _____ _____ _| |_
\ \/ /|  _  |  _  |  _  |_   _|  (C) 2007-2022
 )  ( | |_| | |_| | |_| | | |____JIANJUN.JIANG__
/_/\_\|_____|_____|_____| |_____________________|
V3.0.0 (Apr  4 2022 - 05:26:33) - [sast-kk131][SAST KK131 Digital Player Based On Allwinner F1C100S]
[    0.000020]Probe device 'blk-romdisk.0' with blk-romdisk
[    0.000800]Probe device 'hosc' with clk-fixed
[    0.000810]Probe device 'losc' with clk-fixed
[    0.000820]Probe device 'osc32k' with clk-fixed
[    0.000830]Probe device 'pll-cpu' with clk-f1c100s-pll
[    0.000840]Probe device 'pll-audio' with clk-f1c100s-pll
[    0.000850]Probe device 'pll-video' with clk-f1c100s-pll
[    0.000860]Probe device 'pll-ve' with clk-f1c100s-pll
[    0.000870]Probe device 'pll-ddr' with clk-f1c100s-pll
[    0.000880]Probe device 'pll-periph' with clk-f1c100s-pll
[    0.000890]Probe device 'pll-audio-8x' with clk-fixed-factor
[    0.000900]Probe device 'pll-audio-4x' with clk-fixed-factor
[    0.000910]Probe device 'pll-audio-2x' with clk-fixed-factor
[    0.000920]Probe device 'pll-audio-1x' with clk-fixed-factor
[    0.000930]Probe device 'cpu' with clk-mux
[    0.000940]Probe device 'hclk' with clk-divider
[    0.000950]Probe device 'ahb1-pre-div' with clk-divider
[    0.000960]Probe device 'mux-ahb1' with clk-mux
[    0.000970]Probe device 'ahb1' with clk-ratio
[    0.000980]Probe device 'apb1' with clk-ratio
[    0.000990]Probe device 'mux-clkout' with clk-mux
[    0.001000]Probe device 'ratio-clkout' with clk-ratio
[    0.001010]Probe device 'div-clkout' with clk-divider
[    0.001020]Probe device 'gate-clkout' with clk-gate
[    0.001030]Probe device 'link-clkout' with clk-link
[    0.001040]Probe device 'gate-bus-dma' with clk-gate
[    0.001050]Probe device 'link-dma' with clk-link
[    0.001060]Probe device 'gate-bus-uart0' with clk-gate
[    0.001070]Probe device 'gate-bus-uart1' with clk-gate
[    0.001080]Probe device 'gate-bus-uart2' with clk-gate
[    0.001090]Probe device 'link-uart0' with clk-link
[    0.001100]Probe device 'link-uart1' with clk-link
[    0.001110]Probe device 'link-uart2' with clk-link
[    0.001120]Probe device 'gate-bus-i2c0' with clk-gate
[    0.001130]Probe device 'gate-bus-i2c1' with clk-gate
[    0.001140]Probe device 'gate-bus-i2c2' with clk-gate
[    0.001150]Probe device 'link-i2c0' with clk-link
[    0.001160]Probe device 'link-i2c1' with clk-link
[    0.001170]Probe device 'link-i2c2' with clk-link
[    0.001180]Probe device 'gate-bus-spi0' with clk-gate
[    0.001190]Probe device 'gate-bus-spi1' with clk-gate
[    0.001200]Probe device 'link-spi0' with clk-link
[    0.001210]Probe device 'link-spi1' with clk-link
[    0.001220]Probe device 'mux-timer0' with clk-mux
[    0.001230]Probe device 'ratio-timer0' with clk-ratio
[    0.001240]Probe device 'link-timer0' with clk-link
[    0.001250]Probe device 'mux-timer1' with clk-mux
[    0.001260]Probe device 'ratio-timer1' with clk-ratio
[    0.001270]Probe device 'link-timer1' with clk-link
[    0.001280]Probe device 'mux-timer2' with clk-mux
[    0.001290]Probe device 'ratio-timer2' with clk-ratio
[    0.001300]Probe device 'link-timer2' with clk-link
[    0.001310]Probe device 'link-ts' with clk-link
[    0.001320]Probe device 'link-pwm' with clk-link
[    0.001330]Probe device 'link-wdt' with clk-link
[    0.001340]Probe device 'mux-defe' with clk-mux
[    0.001350]Probe device 'div-defe' with clk-divider
[    0.001360]Probe device 'gate-defe' with clk-gate
[    0.001370]Probe device 'gate-bus-defe' with clk-gate
[    0.001380]Probe device 'link-defe' with clk-link
[    0.001390]Probe device 'mux-debe' with clk-mux
[    0.001400]Probe device 'div-debe' with clk-divider
[    0.001410]Probe device 'gate-debe' with clk-gate
[    0.001420]Probe device 'gate-bus-debe' with clk-gate
[    0.001430]Probe device 'link-debe' with clk-link
[    0.001440]Probe device 'mux-tcon' with clk-mux
[    0.001450]Probe device 'gate-tcon' with clk-gate
[    0.001460]Probe device 'gate-bus-tcon' with clk-gate
[    0.001470]Probe device 'link-tcon' with clk-link
[    0.001480]Probe device 'mux-tvd' with clk-mux
[    0.001490]Probe device 'div-tvd' with clk-divider
[    0.001500]Probe device 'gate-tvd' with clk-gate
[    0.001510]Probe device 'gate-bus-tvd' with clk-gate
[    0.001520]Probe device 'link-tvd' with clk-link
[    0.001530]Probe device 'mux-sdmmc0' with clk-mux
[    0.001540]Probe device 'ratio-sdmmc0' with clk-ratio
[    0.001550]Probe device 'div-sdmmc0' with clk-divider
[    0.001560]Probe device 'gate-sdmmc0' with clk-gate
[    0.001570]Probe device 'gate-bus-sdmmc0' with clk-gate
[    0.001580]Probe device 'link-sdmmc0' with clk-link
[    0.001590]Probe device 'mux-sdmmc1' with clk-mux
[    0.001600]Probe device 'ratio-sdmmc1' with clk-ratio
[    0.001610]Probe device 'div-sdmmc1' with clk-divider
[    0.001620]Probe device 'gate-sdmmc1' with clk-gate
[    0.001630]Probe device 'gate-bus-sdmmc1' with clk-gate
[    0.001640]Probe device 'link-sdmmc1' with clk-link
[    0.001650]Probe device 'gate-bus-audio' with clk-gate
[    0.001660]Probe device 'gate-audio' with clk-gate
[    0.001670]Probe device 'link-audio' with clk-link
[    0.001680]Probe device 'reset-f1c100s.0' with reset-f1c100s
[    0.001690]Probe device 'reset-f1c100s.1' with reset-f1c100s
[    0.001700]Probe device 'reset-f1c100s.2' with reset-f1c100s
[    0.001710]Probe device 'irq-f1c100s.0' with irq-f1c100s
[    0.001720]Probe device 'irq-f1c100s-gpio.0' with irq-f1c100s-gpio
[    0.001730]Probe device 'irq-f1c100s-gpio.1' with irq-f1c100s-gpio
[    0.001740]Probe device 'irq-f1c100s-gpio.2' with irq-f1c100s-gpio
[    0.001750]Probe device 'gpio-f1c100s.0' with gpio-f1c100s
[    0.001760]Probe device 'gpio-f1c100s.1' with gpio-f1c100s
[    0.001770]Probe device 'gpio-f1c100s.2' with gpio-f1c100s
[    0.001780]Probe device 'gpio-f1c100s.3' with gpio-f1c100s
[    0.001790]Probe device 'gpio-f1c100s.4' with gpio-f1c100s
[    0.001840]Probe device 'dma-f1c100s.0' with dma-f1c100s
[    0.001850]Probe device 'pwm-f1c100s.0' with pwm-f1c100s
[    0.001860]Probe device 'pwm-f1c100s.1' with pwm-f1c100s
[    0.001870]Probe device 'ce-f1c100s-timer.0' with ce-f1c100s-timer
[    0.000061]Probe device 'cs-f1c100s-timer.0' with cs-f1c100s-timer
[    0.006330]Probe device 'i2c-f1c100s.0' with i2c-f1c100s
[    0.011575]Probe device 'i2c-f1c100s.1' with i2c-f1c100s
[    0.016841]Probe device 'i2c-f1c100s.2' with i2c-f1c100s
[    0.022009]Probe device 'uart-16550.0' with uart-16550
[    0.027096]Probe device 6[    0.032198]Probe device 'uart-16550.2' with uart-16550
[    0.034589]Probe device '

// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
 * Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
 */

/dts-v1/;
#include "suniv-f1c100s.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Lichee Pi Nano";
	compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s",
		     "allwinner,suniv";

	aliases {
		serial2 = &uart2;
		spi0 = &spi0;
	};

	chosen {
		stdout-path = "serial2:115200n8";
	};
};

&otg_sram {
	status = "okay";
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins_a>;
	status = "okay";

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "winbond,w25q128", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <40000000>;
	};
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins_e>;
	status = "okay";
};

&usb_otg {
	dr_mode = "otg";
	status = "okay";
};

&usbphy {
	usb0_id_det-gpio = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
	status = "okay";
};

// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
 * Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
 */

#include <dt-bindings/clock/suniv-ccu.h>
#include <dt-bindings/reset/suniv-ccu.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&intc>;

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		osc24M: clk-24M {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
			clock-output-names = "osc24M";
		};

		osc32k: clk-32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
			clock-output-names = "osc32k";
		};

		fake100M: clk-100M {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <100000000>;
			clock-output-names = "fake-100M";
		};
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		sram-controller@1c00000 {
			compatible = "allwinner,sun4i-a10-sram-controller";
			reg = <0x01c00000 0x30>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			sram_d: sram@10000 {
				compatible = "mmio-sram";
				reg = <0x00010000 0x1000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x00010000 0x1000>;

				otg_sram: sram-section@0 {
					compatible = "allwinner,sun4i-a10-sram-d";
					reg = <0x0000 0x1000>;
					status = "disabled";
				};
			};
		};

		spi0: spi@1c05000 {
			compatible = "allwinner,suniv-spi",
				     "allwinner,sun8i-h3-spi";
			reg = <0x01c05000 0x1000>;
			interrupts = <10>;
			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_BUS_SPI0>;
			clock-names = "ahb", "mod";
			resets = <&ccu RST_BUS_SPI0>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		ccu: clock@1c20000 {
			compatible = "allwinner,suniv-ccu";
			reg = <0x01c20000 0x400>;
			clocks = <&osc24M>, <&osc32k>;
			clock-names = "hosc", "losc";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		intc: interrupt-controller@1c20400 {
			compatible = "allwinner,suniv-ic";
			reg = <0x01c20400 0x400>;
			interrupt-controller;
			#interrupt-cells = <1>;
		};

		pio: pinctrl@1c20800 {
			compatible = "allwinner,suniv-pinctrl";
			reg = <0x01c20800 0x400>;
			interrupts = <38>, <39>, <40>;
			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			interrupt-controller;
			#interrupt-cells = <3>;
			#gpio-cells = <3>;

			spi0_pins_a: spi0-pins-pc {
				pins = "PC0", "PC1", "PC2", "PC3";
				function = "spi0";
			};

			uart2_pins_e: uart-pins-pe {
				pins = "PE7", "PE8";
				function = "uart2";
			};
		};

		timer@1c20c00 {
			compatible = "allwinner,sun4i-a10-timer";
			reg = <0x01c20c00 0x90>;
			interrupts = <13>;
			clocks = <&osc24M>;
		};

		wdt: watchdog@1c20ca0 {
			compatible = "allwinner,sun6i-a31-wdt";
			reg = <0x01c20ca0 0x20>;
		};

		uart0: serial@1c25000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c25000 0x400>;
			interrupts = <1>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART0>;
			resets = <&ccu RST_BUS_UART0>;
			status = "disabled";
		};

		uart1: serial@1c25400 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c25400 0x400>;
			interrupts = <2>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART1>;
			resets = <&ccu RST_BUS_UART1>;
			status = "disabled";
		};

		uart2: serial@1c25800 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c25800 0x400>;
			interrupts = <3>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART2>;
			resets = <&ccu RST_BUS_UART2>;
			status = "disabled";
		};

		usb_otg: usb@1c13000 {
			compatible = "allwinner,suniv-musb";
			reg = <0x01c13000 0x0400>;
			clocks = <&ccu CLK_BUS_OTG>;
			resets = <&ccu RST_BUS_OTG>;
			interrupts = <26>;
			interrupt-names = "mc";
			phys = <&usbphy 0>;
			phy-names = "usb";
			extcon = <&usbphy 0>;
			allwinner,sram = <&otg_sram 1>;
			status = "disabled";
		};

		usbphy: phy@1c13400 {
			compatible = "allwinner,suniv-usb-phy";
			reg = <0x01c13400 0x10>;
			reg-names = "phy_ctrl";
			clocks = <&ccu CLK_USB_PHY0>;
			clock-names = "usb0_phy";
			resets = <&ccu RST_USB_PHY0>;
			reset-names = "usb0_reset";
			#phy-cells = <1>;
			status = "disabled";
		};
	};
};

#
# Automatically generated file; DO NOT EDIT.
# U-Boot 2018.01 Configuration
#
CONFIG_CREATE_ARCH_SYMLINK=y
# CONFIG_ARC is not set
CONFIG_ARM=y
# CONFIG_M68K is not set
# CONFIG_MICROBLAZE is not set
# CONFIG_MIPS is not set
# CONFIG_NDS32 is not set
# CONFIG_NIOS2 is not set
# CONFIG_PPC is not set
# CONFIG_SANDBOX is not set
# CONFIG_SH is not set
# CONFIG_X86 is not set
# CONFIG_XTENSA is not set
CONFIG_SYS_ARCH="arm"
CONFIG_SYS_CPU="arm926ejs"
CONFIG_SYS_SOC="sunxi"
CONFIG_SYS_BOARD="sunxi"
CONFIG_SYS_CONFIG_NAME="suniv"

#
# ARM architecture
#
CONFIG_ARM_ASM_UNIFIED=y
CONFIG_CPU_ARM926EJS=y
CONFIG_SYS_ARM_ARCH=5
CONFIG_SYS_CACHE_SHIFT_5=y
CONFIG_SYS_CACHELINE_SIZE=32
# CONFIG_SEMIHOSTING is not set
CONFIG_SYS_THUMB_BUILD=y
CONFIG_SPL_SYS_THUMB_BUILD=y
# CONFIG_SYS_L2CACHE_OFF is not set
# CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK is not set
# CONFIG_ARM_CORTEX_CPU_IS_UP is not set
CONFIG_USE_ARCH_MEMCPY=y
CONFIG_SPL_USE_ARCH_MEMCPY=y
CONFIG_USE_ARCH_MEMSET=y
CONFIG_SPL_USE_ARCH_MEMSET=y
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
# CONFIG_ARCH_AT91 is not set
# CONFIG_TARGET_EDB93XX is not set
# CONFIG_TARGET_ASPENITE is not set
# CONFIG_TARGET_GPLUGD is not set
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_KIRKWOOD is not set
# CONFIG_ARCH_MVEBU is not set
# CONFIG_TARGET_DEVKIT3250 is not set
# CONFIG_TARGET_WORK_92105 is not set
# CONFIG_TARGET_APF27 is not set
# CONFIG_TARGET_APX4DEVKIT is not set
# CONFIG_TARGET_XFI3 is not set
# CONFIG_TARGET_M28EVK is not set
# CONFIG_TARGET_MX23EVK is not set
# CONFIG_TARGET_MX28EVK is not set
# CONFIG_TARGET_MX23_OLINUXINO is not set
# CONFIG_TARGET_BG0900 is not set
# CONFIG_TARGET_SANSA_FUZE_PLUS is not set
# CONFIG_TARGET_SC_SPS_1 is not set
# CONFIG_ORION5X is not set
# CONFIG_TARGET_SPEAR300 is not set
# CONFIG_TARGET_SPEAR310 is not set
# CONFIG_TARGET_SPEAR320 is not set
# CONFIG_TARGET_SPEAR600 is not set
# CONFIG_TARGET_STV0991 is not set
# CONFIG_TARGET_X600 is not set
# CONFIG_TARGET_IMX31_PHYCORE is not set
# CONFIG_TARGET_IMX31_PHYCORE_EET is not set
# CONFIG_TARGET_MX31ADS is not set
# CONFIG_TARGET_MX31PDK is not set
# CONFIG_TARGET_WOODBURN is not set
# CONFIG_TARGET_WOODBURN_SD is not set
# CONFIG_TARGET_FLEA3 is not set
# CONFIG_TARGET_MX35PDK is not set
# CONFIG_ARCH_BCM283X is not set
# CONFIG_TARGET_VEXPRESS_CA15_TC2 is not set
# CONFIG_TARGET_VEXPRESS_CA5X2 is not set
# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
# CONFIG_TARGET_BCM23550_W1D is not set
# CONFIG_TARGET_BCM28155_AP is not set
# CONFIG_TARGET_BCMCYGNUS is not set
# CONFIG_TARGET_BCMNSP is not set
# CONFIG_TARGET_BCMNS2 is not set
# CONFIG_ARCH_EXYNOS is not set
# CONFIG_ARCH_S5PC1XX is not set
# CONFIG_ARCH_HIGHBANK is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_KEYSTONE is not set
# CONFIG_ARCH_OMAP2PLUS is not set
# CONFIG_ARCH_MESON is not set
# CONFIG_ARCH_MX25 is not set
# CONFIG_ARCH_MX7ULP is not set
# CONFIG_ARCH_MX7 is not set
# CONFIG_ARCH_MX6 is not set
CONFIG_SPL_LDSCRIPT="arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds"
# CONFIG_ARCH_MX5 is not set
# CONFIG_ARCH_QEMU is not set
# CONFIG_ARCH_RMOBILE is not set
# CONFIG_TARGET_S32V234EVB is not set
# CONFIG_ARCH_SNAPDRAGON is not set
# CONFIG_ARCH_SOCFPGA is not set
CONFIG_ARCH_SUNXI=y
# CONFIG_TARGET_TS4600 is not set
# CONFIG_ARCH_VF610 is not set
# CONFIG_ARCH_ZYNQ is not set
# CONFIG_ARCH_ZYNQMP is not set
# CONFIG_TEGRA is not set
# CONFIG_TARGET_VEXPRESS64_AEMV8A is not set
# CONFIG_TARGET_VEXPRESS64_BASE_FVP is not set
# CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM is not set
# CONFIG_TARGET_VEXPRESS64_JUNO is not set
# CONFIG_TARGET_LS2080A_EMU is not set
# CONFIG_TARGET_LS2080A_SIMU is not set
# CONFIG_TARGET_LS1088AQDS is not set
# CONFIG_TARGET_LS2080AQDS is not set
# CONFIG_TARGET_LS2080ARDB is not set
# CONFIG_TARGET_LS2081ARDB is not set
# CONFIG_TARGET_HIKEY is not set
# CONFIG_TARGET_POPLAR is not set
# CONFIG_TARGET_LS1012AQDS is not set
# CONFIG_TARGET_LS1012ARDB is not set
# CONFIG_TARGET_LS1012AFRDM is not set
# CONFIG_TARGET_LS1088ARDB is not set
# CONFIG_TARGET_LS1021AQDS is not set
# CONFIG_TARGET_LS1021ATWR is not set
# CONFIG_TARGET_LS1021AIOT is not set
# CONFIG_TARGET_LS1043AQDS is not set
# CONFIG_TARGET_LS1043ARDB is not set
# CONFIG_TARGET_LS1046AQDS is not set
# CONFIG_TARGET_LS1046ARDB is not set
# CONFIG_TARGET_H2200 is not set
# CONFIG_TARGET_ZIPITZ2 is not set
# CONFIG_TARGET_COLIBRI_PXA270 is not set
# CONFIG_ARCH_UNIPHIER is not set
# CONFIG_STM32 is not set
# CONFIG_ARCH_STI is not set
# CONFIG_ARCH_ROCKCHIP is not set
# CONFIG_TARGET_THUNDERX_88XX is not set
# CONFIG_ARCH_ASPEED is not set
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_CONS_INDEX=2
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
# CONFIG_SPL_DRIVERS_MISC_SUPPORT is not set
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0xf8000
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_SPL_NAND_SUPPORT is not set
# CONFIG_SPL_SPI_FLASH_SUPPORT is not set
# CONFIG_SPL_SPI_SUPPORT is not set
# CONFIG_SPL_WATCHDOG_SUPPORT is not set
CONFIG_IDENT_STRING=" Allwinner Technology"
# CONFIG_SUNXI_HIGH_SRAM is not set
CONFIG_SUNXI_GEN_SUN6I=y
CONFIG_MACH_SUNIV=y
# CONFIG_MACH_SUN4I is not set
# CONFIG_MACH_SUN5I is not set
# CONFIG_MACH_SUN6I is not set
# CONFIG_MACH_SUN7I is not set
# CONFIG_MACH_SUN8I_A23 is not set
# CONFIG_MACH_SUN8I_A33 is not set
# CONFIG_MACH_SUN8I_A83T is not set
# CONFIG_MACH_SUN8I_H3 is not set
# CONFIG_MACH_SUN8I_R40 is not set
# CONFIG_MACH_SUN8I_V3S is not set
# CONFIG_MACH_SUN9I is not set
# CONFIG_MACH_SUN50I is not set
# CONFIG_MACH_SUN50I_H5 is not set
# CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER is not set
CONFIG_DRAM_CLK=156
CONFIG_DRAM_ZQ=0
# CONFIG_DRAM_ODT_EN is not set
CONFIG_SYS_CLK_FREQ=408000000
# CONFIG_UART0_PORT_F is not set
# CONFIG_OLD_SUNXI_KERNEL_COMPAT is not set
CONFIG_MACPWR=""
CONFIG_MMC0_CD_PIN=""
CONFIG_MMC1_CD_PIN=""
CONFIG_MMC2_CD_PIN=""
CONFIG_MMC3_CD_PIN=""
CONFIG_MMC1_PINS=""
CONFIG_MMC2_PINS=""
CONFIG_MMC3_PINS=""
CONFIG_MMC_SUNXI_SLOT_EXTRA=-1
CONFIG_INITIAL_USB_SCAN_DELAY=0
CONFIG_USB0_VBUS_PIN=""
CONFIG_USB0_VBUS_DET=""
CONFIG_USB0_ID_DET=""
CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
CONFIG_USB3_VBUS_PIN=""
# CONFIG_I2C0_ENABLE is not set
# CONFIG_I2C1_ENABLE is not set
# CONFIG_I2C2_ENABLE is not set
# CONFIG_R_I2C_ENABLE is not set
# CONFIG_AXP_GPIO is not set
# CONFIG_VIDEO_SUNXI is not set
# CONFIG_SUNXI_DE2 is not set
CONFIG_SATAPWR=""
CONFIG_GMAC_TX_DELAY=0
CONFIG_SPL_STACK_R_ADDR=0x81e00000
# CONFIG_SPL_FAT_SUPPORT is not set
# CONFIG_CMD_DEKBLOB is not set
# CONFIG_CMD_HDMIDETECT is not set

#
# ARM debug
#
# CONFIG_DEBUG_LL is not set
CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c100s-licheepi-nano"
CONFIG_SMBIOS_PRODUCT_NAME="sunxi"
# CONFIG_DEBUG_UART is not set
# CONFIG_AHCI is not set

#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_MALLOC_F=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
CONFIG_EXPERT=y
CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
# CONFIG_TOOLS_DEBUG is not set
# CONFIG_PHYS_64BIT is not set

#
# Boot images
#
# CONFIG_ANDROID_BOOT_IMAGE is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
# CONFIG_OF_SYSTEM_SETUP is not set
# CONFIG_OF_STDOUT_VIA_ALIAS is not set
CONFIG_SYS_EXTRA_OPTIONS=""
CONFIG_ARCH_FIXUP_FDT_MEMORY=y

#
# API
#
# CONFIG_API is not set

#
# Boot timing
#
# CONFIG_BOOTSTAGE is not set
CONFIG_BOOTSTAGE_RECORD_COUNT=30
CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=5
CONFIG_BOOTSTAGE_STASH_ADDR=0
CONFIG_BOOTSTAGE_STASH_SIZE=0x1000

#
# Boot media
#
# CONFIG_NAND_BOOT is not set
# CONFIG_ONENAND_BOOT is not set
# CONFIG_QSPI_BOOT is not set
# CONFIG_SATA_BOOT is not set
# CONFIG_SD_BOOT is not set
# CONFIG_SPI_BOOT is not set
CONFIG_BOOTDELAY=2
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS2,115200 panic=5 rootwait root=/dev/mtdblock3 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0 50000000; sf read 0x80C00000 0x100000 0x4000; sf read 0x80008000 0x110000 0x400000; bootz 0x80008000 - 0x80C00000"

#
# Console
#
CONFIG_MENU=y
# CONFIG_CONSOLE_RECORD is not set
CONFIG_LOGLEVEL=4
CONFIG_SPL_LOGLEVEL=4
# CONFIG_SILENT_CONSOLE is not set
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_PRE_CON_BUF_SZ=4096
CONFIG_PRE_CON_BUF_ADDR=0x4f000000
# CONFIG_CONSOLE_MUX is not set
# CONFIG_SYS_CONSOLE_IS_IN_ENV is not set
# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
# CONFIG_SYS_CONSOLE_INFO_QUIET is not set
CONFIG_SYS_STDIO_DEREGISTER=y

#
# Logging
#
CONFIG_LOG=y
# CONFIG_SPL_LOG is not set
CONFIG_LOG_MAX_LEVEL=5
CONFIG_LOG_CONSOLE=y
# CONFIG_LOG_TEST is not set
CONFIG_DEFAULT_FDT_FILE=""
# CONFIG_VERSION_VARIABLE is not set
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y

#
# Start-up hooks
#
# CONFIG_ARCH_EARLY_INIT_R is not set
# CONFIG_ARCH_MISC_INIT is not set
# CONFIG_BOARD_EARLY_INIT_F is not set

#
# Security support
#

#
# SPL / TPL
#
CONFIG_SUPPORT_SPL=y
CONFIG_SPL=y
# CONFIG_SPL_BOARD_INIT is not set
# CONFIG_SPL_BOOTROM_SUPPORT is not set
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x100000
# CONFIG_SPL_SEPARATE_BSS is not set
# CONFIG_SPL_DISPLAY_PRINT is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x50
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set
# CONFIG_SPL_CPU_SUPPORT is not set
# CONFIG_SPL_CRYPTO_SUPPORT is not set
# CONFIG_SPL_HASH_SUPPORT is not set
# CONFIG_SPL_DMA_SUPPORT is not set
# CONFIG_SPL_ENV_SUPPORT is not set
# CONFIG_SPL_EXT_SUPPORT is not set
# CONFIG_SPL_FPGA_SUPPORT is not set
# CONFIG_SPL_I2C_SUPPORT is not set
# CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT is not set
# CONFIG_SPL_MTD_SUPPORT is not set
# CONFIG_SPL_MUSB_NEW_SUPPORT is not set
# CONFIG_SPL_NET_SUPPORT is not set
# CONFIG_SPL_NO_CPU_SUPPORT is not set
# CONFIG_SPL_NOR_SUPPORT is not set
# CONFIG_SPL_XIP_SUPPORT is not set
# CONFIG_SPL_ONENAND_SUPPORT is not set
# CONFIG_SPL_OS_BOOT is not set
# CONFIG_SPL_PCI_SUPPORT is not set
# CONFIG_SPL_PCH_SUPPORT is not set
# CONFIG_SPL_POST_MEM_SUPPORT is not set
CONFIG_SPL_POWER_SUPPORT=y
# CONFIG_SPL_RAM_SUPPORT is not set
# CONFIG_SPL_RTC_SUPPORT is not set
# CONFIG_SPL_SATA_SUPPORT is not set
# CONFIG_SPL_THERMAL is not set
# CONFIG_SPL_USB_HOST_SUPPORT is not set
# CONFIG_SPL_USB_GADGET_SUPPORT is not set
# CONFIG_SPL_YMODEM_SUPPORT is not set

#
# Command line interface
#
CONFIG_CMDLINE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="=> "

#
# Autoboot options
#
CONFIG_AUTOBOOT=y
# CONFIG_AUTOBOOT_KEYED is not set

#
# FASTBOOT
#
# CONFIG_FASTBOOT is not set

#
# Commands
#

#
# Info commands
#
CONFIG_CMD_BDI=y
# CONFIG_CMD_CONFIG is not set
CONFIG_CMD_CONSOLE=y
# CONFIG_CMD_CPU is not set
# CONFIG_CMD_LICENSE is not set

#
# Boot commands
#
CONFIG_CMD_BOOTD=y
CONFIG_CMD_BOOTM=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_BOOTEFI=y
CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
# CONFIG_CMD_BOOTEFI_HELLO is not set
# CONFIG_CMD_BOOTEFI_SELFTEST is not set
# CONFIG_CMD_BOOTMENU is not set
CONFIG_CMD_ELF=y
CONFIG_CMD_FDT=y
CONFIG_CMD_GO=y
CONFIG_CMD_RUN=y
CONFIG_CMD_IMI=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_XIMG=y
# CONFIG_CMD_POWEROFF is not set
# CONFIG_CMD_SPL is not set
# CONFIG_CMD_THOR_DOWNLOAD is not set
# CONFIG_CMD_ZBOOT is not set

#
# Environment commands
#
# CONFIG_CMD_ASKENV is not set
CONFIG_CMD_EXPORTENV=y
CONFIG_CMD_IMPORTENV=y
CONFIG_CMD_EDITENV=y
# CONFIG_CMD_GREPENV is not set
CONFIG_CMD_SAVEENV=y
CONFIG_CMD_ENV_EXISTS=y
# CONFIG_CMD_ENV_CALLBACK is not set
# CONFIG_CMD_ENV_FLAGS is not set

#
# Memory commands
#
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_EEPROM is not set
# CONFIG_LOOPW is not set
# CONFIG_CMD_MD5SUM is not set
# CONFIG_CMD_MEMINFO is not set
CONFIG_CMD_MEMORY=y
# CONFIG_CMD_MEMTEST is not set
# CONFIG_CMD_MX_CYCLIC is not set
# CONFIG_CMD_SHA1SUM is not set
# CONFIG_CMD_STRINGS is not set

#
# Compression commands
#
# CONFIG_CMD_LZMADEC is not set
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_ZIP is not set

#
# Device access commands
#
# CONFIG_CMD_ARMFLASH is not set
# CONFIG_CMD_CLK is not set
# CONFIG_CMD_DEMO is not set
# CONFIG_CMD_DFU is not set
CONFIG_CMD_DM=y
# CONFIG_CMD_FDC is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_FPGAD is not set
# CONFIG_CMD_FUSE is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_RANDOM_UUID=y
# CONFIG_CMD_GPT_RENAME is not set
# CONFIG_CMD_IDE is not set
# CONFIG_CMD_IO is not set
# CONFIG_CMD_IOTRACE is not set
# CONFIG_CMD_I2C is not set
CONFIG_CMD_LOADB=y
CONFIG_CMD_LOADS=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
# CONFIG_CMD_MMC_SPI is not set
# CONFIG_CMD_ONENAND is not set
CONFIG_CMD_PART=y
# CONFIG_CMD_PCI is not set
# CONFIG_CMD_PCMCIA is not set
# CONFIG_CMD_READ is not set
# CONFIG_CMD_SATA is not set
# CONFIG_CMD_SAVES is not set
# CONFIG_CMD_SDRAM is not set
CONFIG_CMD_SF=y
# CONFIG_CMD_SF_TEST is not set
CONFIG_CMD_SPI=y
# CONFIG_CMD_TSI148 is not set
# CONFIG_CMD_UNIVERSE is not set
CONFIG_CMD_USB=y
# CONFIG_CMD_USB_SDP is not set
# CONFIG_CMD_USB_MASS_STORAGE is not set

#
# Shell scripting commands
#
CONFIG_CMD_ECHO=y
CONFIG_CMD_ITEST=y
CONFIG_CMD_SOURCE=y
CONFIG_CMD_SETEXPR=y

#
# Network commands
#
CONFIG_CMD_NET=y
# CONFIG_CMD_TFTPPUT is not set
# CONFIG_CMD_TFTPSRV is not set
# CONFIG_CMD_RARP is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
CONFIG_CMD_NFS=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_CDP is not set
# CONFIG_CMD_SNTP is not set
# CONFIG_CMD_DNS is not set
# CONFIG_CMD_LINK_LOCAL is not set
# CONFIG_CMD_ETHSW is not set

#
# Misc commands
#
# CONFIG_CMD_BSP is not set
# CONFIG_CMD_BKOPS_ENABLE is not set
# CONFIG_CMD_CACHE is not set
# CONFIG_CMD_DISPLAY is not set
# CONFIG_CMD_LED is not set
# CONFIG_CMD_DATE is not set
# CONFIG_CMD_TIME is not set
# CONFIG_CMD_GETTIME is not set
# CONFIG_CMD_MISC is not set
# CONFIG_CMD_TIMER is not set
# CONFIG_CMD_QFW is not set
# CONFIG_CMD_TERMINAL is not set
# CONFIG_CMD_UUID is not set

#
# Power commands
#

#
# Security commands
#
# CONFIG_CMD_AES is not set
# CONFIG_CMD_BLOB is not set
# CONFIG_CMD_HASH is not set

#
# Firmware commands
#

#
# Filesystem commands
#
# CONFIG_CMD_BTRFS is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
# CONFIG_CMD_EXT4_WRITE is not set
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
# CONFIG_CMD_FS_UUID is not set
# CONFIG_CMD_JFFS2 is not set
# CONFIG_CMD_MTDPARTS is not set
# CONFIG_CMD_REISER is not set
# CONFIG_CMD_SCSI is not set
# CONFIG_CMD_ZFS is not set

#
# Debug commands
#
# CONFIG_CMD_BEDBUG is not set
# CONFIG_CMD_DIAG is not set
# CONFIG_CMD_KGDB is not set
# CONFIG_CMD_LOG is not set
# CONFIG_CMD_TRACE is not set
# CONFIG_CMD_UBI is not set

#
# Partition Types
#
CONFIG_PARTITIONS=y
# CONFIG_MAC_PARTITION is not set
# CONFIG_SPL_MAC_PARTITION is not set
CONFIG_DOS_PARTITION=y
CONFIG_SPL_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_SPL_ISO_PARTITION=y
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_SPL_AMIGA_PARTITION is not set
CONFIG_EFI_PARTITION=y
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=56
CONFIG_EFI_PARTITION_ENTRIES_OFF=0
CONFIG_SPL_EFI_PARTITION=y
CONFIG_PARTITION_UUIDS=y
CONFIG_SPL_PARTITION_UUIDS=y
# CONFIG_PARTITION_TYPE_GUID is not set
CONFIG_SUPPORT_OF_CONTROL=y
CONFIG_DTC=y
CONFIG_PYLIBFDT=y
CONFIG_DTOC=y
CONFIG_BINMAN=y

#
# Device Tree Control
#
CONFIG_OF_CONTROL=y
# CONFIG_OF_BOARD_FIXUP is not set
# CONFIG_SPL_OF_CONTROL is not set
# CONFIG_OF_LIVE is not set
CONFIG_OF_SEPARATE=y
# CONFIG_OF_EMBED is not set
# CONFIG_OF_BOARD is not set
# CONFIG_MULTI_DTB_FIT is not set
CONFIG_MKIMAGE_DTC_PATH="dtc"

#
# Environment
#
# CONFIG_ENV_IS_NOWHERE is not set
# CONFIG_ENV_IS_IN_EEPROM is not set
# CONFIG_ENV_IS_IN_FAT is not set
# CONFIG_ENV_IS_IN_FLASH is not set
# CONFIG_ENV_IS_IN_MMC is not set
# CONFIG_ENV_IS_IN_NAND is not set
# CONFIG_ENV_IS_IN_NVRAM is not set
# CONFIG_ENV_IS_IN_ONENAND is not set
# CONFIG_ENV_IS_IN_REMOTE is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
# CONFIG_ENV_IS_IN_UBI is not set
CONFIG_NET=y
# CONFIG_NET_RANDOM_ETHADDR is not set
# CONFIG_NETCONSOLE is not set
CONFIG_NET_TFTP_VARS=y
CONFIG_BOOTP_PXE_CLIENTARCH=0x15
CONFIG_BOOTP_VCI_STRING="U-Boot.arm"

#
# Device Drivers
#

#
# Generic Driver Options
#
CONFIG_DM=y
# CONFIG_SPL_DM is not set
CONFIG_DM_WARN=y
# CONFIG_DM_DEBUG is not set
CONFIG_DM_DEVICE_REMOVE=y
CONFIG_DM_STDIO=y
CONFIG_DM_SEQ_ALIAS=y
# CONFIG_SPL_DM_SEQ_ALIAS is not set
# CONFIG_REGMAP is not set
# CONFIG_DEVRES is not set
CONFIG_SIMPLE_BUS=y
CONFIG_OF_TRANSLATE=y
CONFIG_DM_DEV_READ_INLINE=y
# CONFIG_ADC is not set
# CONFIG_ADC_EXYNOS is not set
# CONFIG_ADC_SANDBOX is not set
# CONFIG_SARADC_ROCKCHIP is not set
# CONFIG_SATA is not set
# CONFIG_SCSI_AHCI is not set

#
# SATA/SCSI device support
#
# CONFIG_DWC_AHSATA is not set
# CONFIG_FSL_SATA is not set
# CONFIG_MVSATA_IDE is not set
# CONFIG_SATA_MV is not set
# CONFIG_SATA_SIL is not set
# CONFIG_SATA_SIL3114 is not set
# CONFIG_BLK is not set
# CONFIG_BLOCK_CACHE is not set
# CONFIG_IDE is not set

#
# Boot count support
#
# CONFIG_BOOTCOUNT is not set

#
# Clock
#
# CONFIG_CLK is not set
# CONFIG_CPU is not set

#
# Hardware crypto devices
#
# CONFIG_FSL_CAAM is not set
# CONFIG_SYS_FSL_SEC_BE is not set
# CONFIG_SYS_FSL_SEC_LE is not set

#
# Demo for driver model
#
# CONFIG_DM_DEMO is not set

#
# DFU support
#

#
# DMA Support
#
# CONFIG_DMA is not set
# CONFIG_TI_EDMA3 is not set

#
# FPGA support
#
# CONFIG_FPGA_ALTERA is not set
# CONFIG_FPGA_SOCFPGA is not set
# CONFIG_FPGA_XILINX is not set

#
# GPIO Support
#
CONFIG_DM_GPIO=y
# CONFIG_ALTERA_PIO is not set
# CONFIG_DWAPB_GPIO is not set
# CONFIG_AT91_GPIO is not set
# CONFIG_ATMEL_PIO4 is not set
# CONFIG_INTEL_BROADWELL_GPIO is not set
# CONFIG_INTEL_ICH6_GPIO is not set
# CONFIG_IMX_RGPIO2P is not set
# CONFIG_HSDK_CREG_GPIO is not set
# CONFIG_LPC32XX_GPIO is not set
# CONFIG_MSM_GPIO is not set
# CONFIG_CMD_PCA953X is not set
# CONFIG_ROCKCHIP_GPIO is not set
# CONFIG_CMD_TCA642X is not set
# CONFIG_TEGRA_GPIO is not set
# CONFIG_TEGRA186_GPIO is not set
# CONFIG_VYBRID_GPIO is not set
# CONFIG_DM_74X164 is not set
# CONFIG_DM_PCA953X is not set
# CONFIG_MPC85XX_GPIO is not set

#
# I2C support
#
# CONFIG_DM_I2C is not set
# CONFIG_DM_I2C_COMPAT is not set
# CONFIG_SYS_I2C_DW is not set
# CONFIG_SYS_I2C_IMX_LPI2C is not set
CONFIG_DM_KEYBOARD=y
# CONFIG_CROS_EC_KEYB is not set
# CONFIG_I8042_KEYB is not set

#
# LED Support
#
# CONFIG_LED is not set
# CONFIG_LED_STATUS is not set

#
# Mailbox Controller Support
#
# CONFIG_DM_MAILBOX is not set

#
# Memory Controller drivers
#

#
# Multifunction device drivers
#
# CONFIG_MISC is not set
# CONFIG_CROS_EC is not set
# CONFIG_DS4510 is not set
# CONFIG_FSL_SEC_MON is not set
# CONFIG_MXC_OCOTP is not set
# CONFIG_NUVOTON_NCT6102D is not set
# CONFIG_PWRSEQ is not set
# CONFIG_PCA9551_LED is not set
# CONFIG_WINBOND_W83627 is not set

#
# MMC Host controller Support
#
CONFIG_MMC=y
# CONFIG_DM_MMC is not set
# CONFIG_SPL_MMC_TINY is not set
# CONFIG_MMC_DW is not set
# CONFIG_MMC_MXC is not set
# CONFIG_MMC_MXS is not set
# CONFIG_MMC_PCI is not set
# CONFIG_MMC_OMAP_HS is not set
# CONFIG_MMC_SDHCI is not set
CONFIG_MMC_SUNXI=y
# CONFIG_FTSDC010 is not set

#
# MTD Support
#
# CONFIG_MTD is not set
# CONFIG_MTD_NOR_FLASH is not set
# CONFIG_NAND is not set

#
# SPI Flash Support
#
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
# CONFIG_SF_DUAL_FLASH is not set
# CONFIG_SPI_FLASH_ATMEL is not set
# CONFIG_SPI_FLASH_EON is not set
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
# CONFIG_SPI_FLASH_SPANSION is not set
# CONFIG_SPI_FLASH_STMICRO is not set
# CONFIG_SPI_FLASH_SST is not set
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_USE_4K_SECTORS=y
# CONFIG_SPI_FLASH_DATAFLASH is not set
# CONFIG_SPI_FLASH_MTD is not set
CONFIG_SPL_SPI_SUNXI=y

#
# UBI support
#
# CONFIG_MTD_UBI is not set
# CONFIG_BITBANGMII is not set
# CONFIG_MV88E6352_SWITCH is not set
# CONFIG_PHYLIB is not set
CONFIG_DM_ETH=y
CONFIG_NETDEVICES=y
# CONFIG_PHY_GIGE is not set
# CONFIG_ALTERA_TSE is not set
# CONFIG_BCM_SF2_ETH is not set
# CONFIG_DWC_ETH_QOS is not set
# CONFIG_E1000 is not set
# CONFIG_ETH_DESIGNWARE is not set
# CONFIG_ETHOC is not set
# CONFIG_FTMAC100 is not set
# CONFIG_MACB is not set
# CONFIG_RGMII is not set
# CONFIG_RTL8139 is not set
# CONFIG_RTL8169 is not set
# CONFIG_SMC911X is not set
# CONFIG_SUN7I_GMAC is not set
# CONFIG_SUN4I_EMAC is not set
# CONFIG_SUN8I_EMAC is not set
# CONFIG_PCI is not set

#
# PHY Subsystem
#
# CONFIG_PHY is not set
# CONFIG_SPL_PHY is not set
# CONFIG_MVEBU_COMPHY_SUPPORT is not set

#
# Pin controllers
#
# CONFIG_PINCTRL is not set

#
# Power
#

#
# Power Domain Support
#
# CONFIG_POWER_DOMAIN is not set
# CONFIG_DM_PMIC is not set
# CONFIG_PMIC_AS3722 is not set
# CONFIG_POWER_MC34VR500 is not set
# CONFIG_DM_REGULATOR is not set
CONFIG_SUNXI_NO_PMIC=y
# CONFIG_DM_PWM is not set
# CONFIG_PWM_SANDBOX is not set
# CONFIG_RAM is not set

#
# Remote Processor drivers
#

#
# Reset Controller Support
#
# CONFIG_DM_RESET is not set

#
# Real Time Clock
#
# CONFIG_DM_RTC is not set
# CONFIG_RTC_S35392A is not set
# CONFIG_SCSI is not set

#
# Serial drivers
#
CONFIG_BAUDRATE=115200
CONFIG_REQUIRE_SERIAL_CONSOLE=y
CONFIG_SERIAL_PRESENT=y
CONFIG_SPL_SERIAL_PRESENT=y
CONFIG_DM_SERIAL=y
# CONFIG_SERIAL_RX_BUFFER is not set
# CONFIG_SPL_DM_SERIAL is not set
# CONFIG_TPL_DM_SERIAL is not set
# CONFIG_DEBUG_UART_SKIP_INIT is not set
# CONFIG_ALTERA_JTAG_UART is not set
# CONFIG_ALTERA_UART is not set
# CONFIG_ATMEL_USART is not set
# CONFIG_FSL_LPUART is not set
# CONFIG_MVEBU_A3700_UART is not set
# CONFIG_NULLDEV_SERIAL is not set
CONFIG_SYS_NS16550=y
# CONFIG_MSM_SERIAL is not set
# CONFIG_PXA_SERIAL is not set

#
# Sound support
#
# CONFIG_SOUND is not set

#
# SPI Support
#
CONFIG_DM_SPI=y
# CONFIG_ALTERA_SPI is not set
# CONFIG_CADENCE_QSPI is not set
# CONFIG_DESIGNWARE_SPI is not set
# CONFIG_EXYNOS_SPI is not set
# CONFIG_FSL_DSPI is not set
# CONFIG_ICH_SPI is not set
# CONFIG_MVEBU_A3700_SPI is not set
# CONFIG_ROCKCHIP_SPI is not set
CONFIG_SUN6I_SPI=y
# CONFIG_TEGRA114_SPI is not set
# CONFIG_TEGRA20_SFLASH is not set
# CONFIG_TEGRA20_SLINK is not set
# CONFIG_TEGRA210_QSPI is not set
# CONFIG_XILINX_SPI is not set
# CONFIG_SOFT_SPI is not set
# CONFIG_FSL_ESPI is not set
# CONFIG_FSL_QSPI is not set
# CONFIG_ATCSPI200_SPI is not set
# CONFIG_TI_QSPI is not set
# CONFIG_OMAP3_SPI is not set

#
# SPMI support
#
# CONFIG_SPMI is not set

#
# System reset device drivers
#
# CONFIG_SYSRESET is not set
# CONFIG_SYSRESET_SYSCON is not set
# CONFIG_SYSRESET_WATCHDOG is not set
# CONFIG_DM_THERMAL is not set

#
# Timer Support
#
# CONFIG_TIMER is not set

#
# TPM support
#
CONFIG_USB=y
CONFIG_DM_USB=y

#
# USB Host Controller Drivers
#
# CONFIG_USB_XHCI_HCD is not set
# CONFIG_USB_EHCI_HCD is not set
# CONFIG_USB_OHCI_HCD is not set
# CONFIG_USB_UHCI_HCD is not set
# CONFIG_USB_DWC2 is not set
# CONFIG_USB_DWC3 is not set

#
# MUSB Controller Driver
#
# CONFIG_USB_MUSB_HOST is not set
# CONFIG_USB_MUSB_GADGET is not set
# CONFIG_USB_MUSB_TI is not set

#
# ULPI drivers
#

#
# USB peripherals
#
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_USB_EVENT_POLL=y
# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
# CONFIG_USB_GADGET_ATMEL_USBA is not set
# CONFIG_USB_GADGET_BCM_UDC_OTG_PHY is not set
# CONFIG_USB_GADGET_DWC2_OTG is not set
# CONFIG_CI_UDC is not set
CONFIG_USB_GADGET_VBUS_DRAW=2
# CONFIG_USB_GADGET_DOWNLOAD is not set
# CONFIG_USB_ETHER is not set
# CONFIG_USB_HOST_ETHER is not set

#
# Graphics support
#
# CONFIG_DM_VIDEO is not set
# CONFIG_SYS_WHITE_ON_BLACK is not set
# CONFIG_NO_FB_CLEAR is not set

#
# TrueType Fonts
#
# CONFIG_VIDEO_VESA is not set
# CONFIG_VIDEO_LCD_ANX9804 is not set
# CONFIG_VIDEO_LCD_SSD2828 is not set
# CONFIG_VIDEO_MVEBU is not set
# CONFIG_DISPLAY is not set
# CONFIG_VIDEO_TEGRA20 is not set
# CONFIG_VIDEO_BRIDGE is not set
# CONFIG_VIDEO is not set
# CONFIG_LCD is not set
# CONFIG_VIDEO_SIMPLE is not set
# CONFIG_VIDEO_DT_SIMPLEFB is not set

#
# Watchdog Timer Support
#
# CONFIG_BCM2835_WDT is not set
# CONFIG_ULP_WATCHDOG is not set
# CONFIG_WDT is not set
# CONFIG_PHYS_TO_BUS is not set

#
# File systems
#
# CONFIG_FS_BTRFS is not set
# CONFIG_FS_CBFS is not set
CONFIG_FS_FAT=y
CONFIG_FAT_WRITE=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
# CONFIG_FS_JFFS2 is not set
# CONFIG_FS_CRAMFS is not set
# CONFIG_YAFFS2 is not set

#
# Library routines
#
# CONFIG_BCH is not set
# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
CONFIG_HAVE_PRIVATE_LIBGCC=y
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_SYS_HZ=1000
CONFIG_USE_TINY_PRINTF=y
# CONFIG_PANIC_HANG is not set
# CONFIG_REGEX is not set
# CONFIG_LIB_RAND is not set
# CONFIG_SPL_TINY_MEMSET is not set
# CONFIG_TPL_TINY_MEMSET is not set
# CONFIG_BITREVERSE is not set
# CONFIG_CMD_DHRYSTONE is not set

#
# Security support
#
# CONFIG_AES is not set
# CONFIG_RSA is not set
# CONFIG_TPM is not set

#
# Hashing Support
#
# CONFIG_SHA1 is not set
# CONFIG_SHA256 is not set
# CONFIG_SHA_HW_ACCEL is not set

#
# Compression Support
#
# CONFIG_LZ4 is not set
# CONFIG_LZMA is not set
# CONFIG_LZO is not set
# CONFIG_SPL_LZO is not set
# CONFIG_SPL_GZIP is not set
# CONFIG_ERRNO_STR is not set
CONFIG_OF_LIBFDT=y
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_SPL_OF_LIBFDT is not set
# CONFIG_FDT_FIXUP_PARTITIONS is not set

#
# System tables
#
CONFIG_GENERATE_SMBIOS_TABLE=y
CONFIG_SMBIOS_MANUFACTURER=""
CONFIG_EFI_LOADER=y
# CONFIG_UNIT_TEST is not set

#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUNIV)
	sunxi_gpio_set_cfgpin(SUNXI_GPE(7), SUNIV_GPE_UART2);
	sunxi_gpio_set_cfgpin(SUNXI_GPE(8), SUNIV_GPE_UART2);
	sunxi_gpio_set_pull(SUNXI_GPE(7), SUNXI_GPIO_PULL_UP);

#define CONFIG_SUNXI_USB_PHYS 1
#define CONFIG_CONS_INDEX       2

#define SUNIV_GPE_UART2		3

#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUNIV)
#define OF_STDOUT_PATH		"/soc/serial@01c25800:115200"

/dts-v1/;

/memreserve/	0x0000000081000000 0x0000000000010000;
/ {
	model = "sunivw1p1";
	compatible = "arm,sunivw1p1", "arm,suniw1p1";
	interrupt-parent = <0x1>;
	#address-cells = <0x2>;
	#size-cells = <0x2>;

	clocks {
		compatible = "allwinner,sunxi-clk-init";
		device_type = "clocks";
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;
		reg = <0x0 0x1c20000 0x0 0x2d0>;

		losc {
			#clock-cells = <0x0>;
			compatible = "allwinner,fixed-clock";
			clock-frequency = <0x8000>;
			clock-output-names = "losc";
		};

		hosc {
			#clock-cells = <0x0>;
			compatible = "allwinner,fixed-clock";
			clock-frequency = <0x16e3600>;
			clock-output-names = "hosc";
			linux,phandle = <0x11>;
			phandle = <0x11>;
		};

		pll_cpu {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			assigned-clock-rates = <0x1f78a400>;
			clock-output-names = "pll_cpu";
		};

		pll_audio {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			clock-output-names = "pll_audio";
			linux,phandle = <0x2>;
			phandle = <0x2>;
		};

		pll_video {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			assigned-clock-rates = <0x11b3dc40>;
			clock-output-names = "pll_video";
			linux,phandle = <0x3>;
			phandle = <0x3>;
		};

		pll_ve {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			clock-output-names = "pll_ve";
			linux,phandle = <0x6>;
			phandle = <0x6>;
		};

		pll_ddr {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			assigned-clock-rates = <0x1298be00>;
			clock-output-names = "pll_ddr";
		};

		pll_periph {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			clock-output-names = "pll_periph";
			linux,phandle = <0x4>;
			phandle = <0x4>;
		};

		pll_audiox8 {
			#clock-cells = <0x0>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x2>;
			clock-mult = <0x8>;
			clock-div = <0x1>;
			clock-output-names = "pll_audiox8";
		};

		pll_audiox4 {
			#clock-cells = <0x0>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x2>;
			clock-mult = <0x8>;
			clock-div = <0x2>;
			clock-output-names = "pll_audiox4";
		};

		pll_audiox2 {
			#clock-cells = <0x0>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x2>;
			clock-mult = <0x8>;
			clock-div = <0x4>;
			clock-output-names = "pll_audiox2";
		};

		pll_videox2 {
			#clock-cells = <0x0>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x3>;
			clock-mult = <0x2>;
			clock-div = <0x1>;
			clock-output-names = "pll_videox2";
		};

		pll_periphx2 {
			#clock-cells = <0x0>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <0x4>;
			clock-mult = <0x2>;
			clock-div = <0x1>;
			clock-output-names = "pll_periphx2";
		};

		cpu {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "cpu";
		};

		pll_periphahb {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "pll_periphahb";
		};

		ahb1 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "ahb1";
		};

		apb1 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "apb1";
		};

		sdmmc0_mod {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc0_mod";
			linux,phandle = <0x27>;
			phandle = <0x27>;
		};

		sdmmc0_bus {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc0_bus";
			linux,phandle = <0x28>;
			phandle = <0x28>;
		};

		sdmmc0_rst {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc0_rst";
			linux,phandle = <0x29>;
			phandle = <0x29>;
		};

		sdmmc1_mod {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc1_mod";
			linux,phandle = <0x2c>;
			phandle = <0x2c>;
		};

		sdmmc1_bus {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc1_bus";
			linux,phandle = <0x2d>;
			phandle = <0x2d>;
		};

		sdmmc1_rst {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc1_rst";
			linux,phandle = <0x2e>;
			phandle = <0x2e>;
		};

		spi0 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "spi0";
			linux,phandle = <0x1e>;
			phandle = <0x1e>;
		};

		spi1 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "spi1";
			linux,phandle = <0x23>;
			phandle = <0x23>;
		};

		usbphy0 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "usbphy0";
			linux,phandle = <0x39>;
			phandle = <0x39>;
		};

		usbotg {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "usbotg";
			linux,phandle = <0x3a>;
			phandle = <0x3a>;
		};

		audio {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "audio";
			linux,phandle = <0x3b>;
			phandle = <0x3b>;
		};

		avs {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "avs";
		};

		codec {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "codec";
			linux,phandle = <0x42>;
			phandle = <0x42>;
		};

		spdif {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "spdif";
			linux,phandle = <0x3f>;
			phandle = <0x3f>;
		};

		debe {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "debe";
			linux,phandle = <0x32>;
			phandle = <0x32>;
		};

		defe {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "defe";
			linux,phandle = <0x31>;
			phandle = <0x31>;
		};

		tcon {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "tcon";
			linux,phandle = <0x34>;
			phandle = <0x34>;
		};

		deinterlace {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "deinterlace";
			linux,phandle = <0x33>;
			phandle = <0x33>;
		};

		tve_clk2 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "tve_clk2";
		};

		tve_clk1 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "tve_clk1";
		};

		tvd {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "tvd";
		};

		csi_m {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "csi_m";
			linux,phandle = <0x35>;
			phandle = <0x35>;
		};

		ve {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "ve";
			linux,phandle = <0x7>;
			phandle = <0x7>;
		};

		sdram {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdram";
		};

		dma {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "dma";
			linux,phandle = <0x5>;
			phandle = <0x5>;
		};

		uart0 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "uart0";
			linux,phandle = <0x8>;
			phandle = <0x8>;
		};

		uart1 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "uart1";
			linux,phandle = <0xb>;
			phandle = <0xb>;
		};

		uart2 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "uart2";
			linux,phandle = <0xe>;
			phandle = <0xe>;
		};

		twi0 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "twi0";
			linux,phandle = <0x15>;
			phandle = <0x15>;
		};

		twi1 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "twi1";
			linux,phandle = <0x18>;
			phandle = <0x18>;
		};

		twi2 {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "twi2";
			linux,phandle = <0x1b>;
			phandle = <0x1b>;
		};

		rsb {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "rsb";
		};

		cir {
			#clock-cells = <0x0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "cir";
			linux,phandle = <0x12>;
			phandle = <0x12>;
		};
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		device_type = "soc";
		ranges;

		pinctrl@01c20800 {
			compatible = "allwinner,sunivw1p1-pinctrl";
			reg = <0x0 0x1c20800 0x0 0x400>;
			interrupts = <0x26 0x27 0x28>;
			device_type = "pio";
			gpio-controller;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			#size-cells = <0x0>;
			#gpio-cells = <0x6>;
			linux,phandle = <0x38>;
			phandle = <0x38>;

			vdevice@0 {
				allwinner,pins = "PC0", "PC1";
				allwinner,function = "vdevice";
				allwinner,muxsel = <0x4>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x1>;
			};

			uart0@1 {
				allwinner,pins = "PF2", "PF4";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x1>;
				linux,phandle = <0xa>;
				phandle = <0xa>;
			};

			uart1@1 {
				allwinner,pins = "PA3", "PA2", "PA1", "PA0";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x1>;
				linux,phandle = <0xd>;
				phandle = <0xd>;
			};

			uart2@1 {
				allwinner,pins = "PE7", "PE8", "PE9", "PE10";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x1>;
				linux,phandle = <0x10>;
				phandle = <0x10>;
			};

			twi0@1 {
				allwinner,pins = "PD12", "PD0";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x17>;
				phandle = <0x17>;
			};

			twi1@1 {
				allwinner,pins = "PB0", "PB1";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x1a>;
				phandle = <0x1a>;
			};

			twi2@1 {
				allwinner,pins = "PE0", "PE1";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x1d>;
				phandle = <0x1d>;
			};

			spi0@2 {
				allwinner,pins = "PC0", "PC1", "PC2", "PC3";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x21>;
				phandle = <0x21>;
			};

			spi1@0 {
				allwinner,pins = "PB1", "PB3", "PB2";
				allwinner,pname = "spi1_mosi", "spi1_miso", "spi1_sclk";
				allwinner,function = "spi1";
				allwinner,muxsel = <0x6>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x24>;
				phandle = <0x24>;
			};

			spi1@1 {
				allwinner,pins = "PB0";
				allwinner,pname = "spi1_cs0";
				allwinner,function = "spi1";
				allwinner,muxsel = <0x6>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x1>;
				linux,phandle = <0x25>;
				phandle = <0x25>;
			};

			spi1@2 {
				allwinner,pins = "PB0", "PB1", "PB2", "PB3";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x26>;
				phandle = <0x26>;
			};

			csi0@0 {
				allwinner,pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5", "PE6", "PE7", "PE8", "PE9", "PE10";
				allwinner,pname = "csi0_hsync", "csi0_vsync", "csi0_pck", "csi0_d0", "csi0_d1", "csi0_d2", "csi0_d3", "csi0_d4", "csi0_d5", "csi0_d6", "csi0_d7";
				allwinner,function = "csi0";
				allwinner,muxsel = <0x2>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				allwinner,data = <0x0>;
				linux,phandle = <0x36>;
				phandle = <0x36>;
			};

			csi0_sleep@0 {
				allwinner,pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5", "PE6", "PE7", "PE8", "PE9", "PE10";
				allwinner,pname = "csi0_hsync", "csi0_vsync", "csi0_pck", "csi0_d0", "csi0_d1", "csi0_d2", "csi0_d3", "csi0_d4", "csi0_d5", "csi0_d6", "csi0_d7";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				allwinner,data = <0x0>;
				linux,phandle = <0x37>;
				phandle = <0x37>;
			};

			sdc0@1 {
				allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x1>;
				linux,phandle = <0x2b>;
				phandle = <0x2b>;
			};

			sdc1@1 {
				allwinner,pins = "PC0", "PC1", "PC2";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x1>;
				linux,phandle = <0x30>;
				phandle = <0x30>;
			};

			daudio0@0 {
				allwinner,pins = "PE3", "PE4", "PE5", "PE6";
				allwinner,function = "iis0";
				allwinner,muxsel = <0x4>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x3c>;
				phandle = <0x3c>;
			};

			daudio0@1 {
				allwinner,pins = "PD7";
				allwinner,function = "iis0";
				allwinner,muxsel = <0x3>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x3d>;
				phandle = <0x3d>;
			};

			daudio0_sleep@0 {
				allwinner,pins = "PE3", "PE4", "PE5", "PE6", "PE12";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x3e>;
				phandle = <0x3e>;
			};

			spdif@0 {
				allwinner,pins = "PD17";
				allwinner,function = "spdif0";
				allwinner,muxsel = <0x3>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x40>;
				phandle = <0x40>;
			};

			spdif_sleep@0 {
				allwinner,pins = "PD17";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x41>;
				phandle = <0x41>;
			};

			cir@0 {
				allwinner,pins = "PE11";
				allwinner,function = "cir";
				allwinner,muxsel = <0x4>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x13>;
				phandle = <0x13>;
			};

			cir_sleep@0 {
				allwinner,pins = "PE11";
				allwinner,function = "io_disabled";
				allwinner,muxsel = <0x7>;
				allwinner,drive = <0x1>;
				allwinner,pull = <0x0>;
				linux,phandle = <0x14>;
				phandle = <0x14>;
			};

			card0_boot_para@0 {
				linux,phandle = <0x47>;
				phandle = <0x47>;
				allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				allwinner,function = "card0_boot_para";
				allwinner,pname = "sdc_d1", "sdc_d0", "sdc_clk", "sdc_cmd", "sdc_d3", "sdc_d2";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0x2>;
				allwinner,data = <0xffffffff>;
			};

			card2_boot_para@0 {
				linux,phandle = <0x48>;
				phandle = <0x48>;
				allwinner,pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16", "PC1";
				allwinner,function = "card2_boot_para";
				allwinner,pname = "sdc_clk", "sdc_cmd", "sdc_d0", "sdc_d1", "sdc_d2", "sdc_d3", "sdc_d4", "sdc_d5", "sdc_d6", "sdc_d7", "sdc_emmc_rst", "sdc_ds";
				allwinner,muxsel = <0x3>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0x3>;
				allwinner,data = <0xffffffff>;
			};

			twi_para@0 {
				linux,phandle = <0x49>;
				phandle = <0x49>;
				allwinner,pins = "PD12", "PD0";
				allwinner,function = "twi_para";
				allwinner,pname = "twi_scl", "twi_sda";
				allwinner,muxsel = <0x3>;
				allwinner,pull = <0xffffffff>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			uart_para@0 {
				linux,phandle = <0x4a>;
				phandle = <0x4a>;
				allwinner,pins = "PE7", "PE8";
				allwinner,function = "uart_para";
				allwinner,pname = "uart_debug_tx", "uart_debug_rx";
				allwinner,muxsel = <0x3>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			force_uart_para@0 {
				linux,phandle = <0x4b>;
				phandle = <0x4b>;
				allwinner,pins = "PE7", "PE8";
				allwinner,function = "force_uart_para";
				allwinner,pname = "force_uart__tx", "force_uart__rx";
				allwinner,muxsel = <0x3>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			jtag_para@0 {
				linux,phandle = <0x4c>;
				phandle = <0x4c>;
				allwinner,pins = "PH9", "PH10", "PH11", "PH12";
				allwinner,function = "jtag_para";
				allwinner,pname = "jtag_ms", "jtag_ck", "jtag_do", "jtag_di";
				allwinner,muxsel = <0x3>;
				allwinner,pull = <0xffffffff>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			twi0@0 {
				linux,phandle = <0x4d>;
				phandle = <0x4d>;
				allwinner,pins = "PD12", "PD0";
				allwinner,function = "twi0";
				allwinner,pname = "twi0_scl", "twi0_sda";
				allwinner,muxsel = <0x3>;
				allwinner,pull = <0xffffffff>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			twi1@0 {
				linux,phandle = <0x4e>;
				phandle = <0x4e>;
				allwinner,pins = "PB0", "PB1";
				allwinner,function = "twi1";
				allwinner,pname = "twi1_scl", "twi1_sda";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0xffffffff>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			twi2@0 {
				linux,phandle = <0x4f>;
				phandle = <0x4f>;
				allwinner,pins = "PE0", "PE1";
				allwinner,function = "twi2";
				allwinner,pname = "twi2_scl", "twi2_sda";
				allwinner,muxsel = <0x4>;
				allwinner,pull = <0xffffffff>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			uart0@0 {
				linux,phandle = <0x50>;
				phandle = <0x50>;
				allwinner,pins = "PF2", "PF4";
				allwinner,function = "uart0";
				allwinner,pname = "uart0_tx", "uart0_rx";
				allwinner,muxsel = <0x3>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			uart1@0 {
				linux,phandle = <0x51>;
				phandle = <0x51>;
				allwinner,pins = "PA2", "PA3";
				allwinner,function = "uart1";
				allwinner,pname = "uart1_tx", "uart1_rx";
				allwinner,muxsel = <0x5>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			uart2@0 {
				linux,phandle = <0x52>;
				phandle = <0x52>;
				allwinner,pins = "PE7", "PE8";
				allwinner,function = "uart2";
				allwinner,pname = "uart1_tx", "uart1_rx";
				allwinner,muxsel = <0x3>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			spi0@0 {
				linux,phandle = <0x53>;
				phandle = <0x53>;
				allwinner,pins = "PC1";
				allwinner,function = "spi0";
				allwinner,pname = "spi0_cs0";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			spi0@1 {
				linux,phandle = <0x54>;
				phandle = <0x54>;
				allwinner,pins = "PC0", "PC3", "PC2";
				allwinner,function = "spi0";
				allwinner,pname = "spi0_sclk", "spi0_mosi", "spi0_miso";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0xffffffff>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			nand0@0 {
				linux,phandle = <0x55>;
				phandle = <0x55>;
				allwinner,pins = "PC0", "PC1", "PC2", "PC4", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14";
				allwinner,function = "nand0";
				allwinner,pname = "nand0_we", "nand0_ale", "nand0_cle", "nand0_nre", "nand0_d0", "nand0_d1", "nand0_d2", "nand0_d3", "nand0_d4", "nand0_d5", "nand0_d6", "nand0_d7", "nand0_ndqs";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0x0>;
				allwinner,drive = <0x1>;
				allwinner,data = <0xffffffff>;
			};

			nand0@1 {
				linux,phandle = <0x56>;
				phandle = <0x56>;
				allwinner,pins = "PC3", "PC5";
				allwinner,function = "nand0";
				allwinner,pname = "nand0_ce0", "nand0_rb0";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0x1>;
				allwinner,data = <0xffffffff>;
			};

			lcd0@0 {
				linux,phandle = <0x57>;
				phandle = <0x57>;
				allwinner,pins = "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19";
				allwinner,function = "lcd0";
				allwinner,pname = "lcdd3", "lcdd4", "lcdd5", "lcdd6", "lcdd7", "lcdd10", "lcdd11", "lcdd12", "lcdd13", "lcdd14", "lcdd15", "lcdd19", "lcdd20", "lcdd21", "lcdd22", "lcdd23", "lcdclk", "lcdde";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0x0>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			pwm0_para@0 {
				linux,phandle = <0x58>;
				phandle = <0x58>;
				allwinner,pins = "PH0";
				allwinner,function = "pwm0_para";
				allwinner,pname = "pwm_positive";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0x0>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			pwm1_para@0 {
				linux,phandle = <0x59>;
				phandle = <0x59>;
				allwinner,pins = "PH1";
				allwinner,function = "pwm1_para";
				allwinner,pname = "pwm_positive";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0x0>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			vip0@0 {
				linux,phandle = <0x5a>;
				phandle = <0x5a>;
				allwinner,pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6", "PE7", "PE8", "PE9", "PE10", "PE11", "PE12", "PE13";
				allwinner,function = "vip0";
				allwinner,pname = "vip0_csi_pck", "vip0_csi_hsync", "vip0_csi_vsync", "vip0_csi_d0", "vip0_csi_d1", "vip0_csi_d2", "vip0_csi_d3", "vip0_csi_d4", "vip0_csi_d5", "vip0_csi_d6", "vip0_csi_d7", "vip_csi_sck", "vip_csi_sda";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0xffffffff>;
				allwinner,drive = <0xffffffff>;
				allwinner,data = <0xffffffff>;
			};

			vip0@1 {
				linux,phandle = <0x5b>;
				phandle = <0x5b>;
				allwinner,pins = "PE1";
				allwinner,function = "vip0";
				allwinner,pname = "vip0_csi_mck";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0x0>;
				allwinner,drive = <0x1>;
				allwinner,data = <0x0>;
			};

			sdc0@0 {
				linux,phandle = <0x5c>;
				phandle = <0x5c>;
				allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				allwinner,function = "sdc0";
				allwinner,pname = "sdc0_d1", "sdc0_d0", "sdc0_clk", "sdc0_cmd", "sdc0_d3", "sdc0_d2";
				allwinner,muxsel = <0x2>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0x2>;
				allwinner,data = <0xffffffff>;
			};

			sdc1@0 {
				linux,phandle = <0x5d>;
				phandle = <0x5d>;
				allwinner,pins = "PC0", "PC1", "PC2";
				allwinner,function = "sdc1";
				allwinner,pname = "sdc1_clk", "sdc1_cmd", "sdc1_d0";
				allwinner,muxsel = <0x3>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0x2>;
				allwinner,data = <0xffffffff>;
			};

			Vdevice@0 {
				linux,phandle = <0x5e>;
				phandle = <0x5e>;
				allwinner,pins = "PB1", "PB2";
				allwinner,function = "Vdevice";
				allwinner,pname = "Vdevice_0", "Vdevice_1";
				allwinner,muxsel = <0x4>;
				allwinner,pull = <0x1>;
				allwinner,drive = <0x2>;
				allwinner,data = <0xffffffff>;
			};
		};

		dma-controller@01c02000 {
			compatible = "allwinner,suniv-dma";
			reg = <0x0 0x1c02000 0x0 0x1000>;
			interrupts = <0x12>;
			clocks = <0x5>;
			#dma-cells = <0x2>;
			linux,phandle = <0x22>;
			phandle = <0x22>;
		};

		timer@1c20c00 {
			compatible = "allwinner,sunxi-timer";
			device_type = "timer";
			reg = <0x0 0x1c20c00 0x0 0x90>;
			interrupts = <0xd>;
			clock-frequency = <0x16e3600>;
			timer-prescale = <0x10>;
		};

		ve@01c0e000 {
			compatible = "allwinner,sunxi-cedar-ve";
			reg = <0x0 0x1c0e000 0x0 0x1000 0x0 0x1c00000 0x0 0x3000 0x0 0x1c20000 0x0 0x800>;
			interrupts = <0x22>;
			clocks = <0x6 0x7>;
		};

		uart@01c25000 {
			compatible = "allwinner,suniv-uart";
			device_type = "uart0";
			reg = <0x0 0x1c25000 0x0 0x400>;
			interrupts = <0x1>;
			clocks = <0x8>;
			pinctrl-names = "default", "sleep";
			pinctrl-1 = <0xa>;
			uart0_port = <0x0>;
			uart0_type = <0x2>;
			status = "disabled";
			pinctrl-0 = <0x50>;
		};

		uart@01c25400 {
			compatible = "allwinner,suniv-uart";
			device_type = "uart1";
			reg = <0x0 0x1c25400 0x0 0x400>;
			interrupts = <0x2>;
			clocks = <0xb>;
			pinctrl-names = "default", "sleep";
			pinctrl-1 = <0xd>;
			uart1_port = <0x1>;
			uart1_type = <0x2>;
			status = "disabled";
			pinctrl-0 = <0x51>;
		};

		uart@01c25800 {
			compatible = "allwinner,suniv-uart";
			device_type = "uart2";
			reg = <0x0 0x1c25800 0x0 0x400>;
			interrupts = <0x3>;
			clocks = <0xe>;
			pinctrl-names = "default", "sleep";
			pinctrl-1 = <0x10>;
			uart2_port = <0x2>;
			uart2_type = <0x4>;
			status = "disabled";
			uart1_used = <0x1>;
			uart1_port = <0x2>;
			uart1_type = <0x2>;
			pinctrl-0 = <0x52>;
		};

		cir {
			compatible = "allwinner,s_cir";
			reg = <0x0 0x1c22c00 0x0 0x400>;
			interrupts = <0x6>;
			clocks = <0x11 0x12>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x13>;
			pinctrl-1 = <0x14>;
			supply = "vcc-pl";
			ir_power_key_code = <0x0>;
			ir_addr_code = <0x0>;
			status = "okay";
		};

		twi@0x01c27000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "allwinner,suniv-twi";
			device_type = "twi0";
			reg = <0x0 0x1c27000 0x0 0x400>;
			interrupts = <0x7>;
			clocks = <0x15>;
			clock-frequency = <0x186a0>;
			pinctrl-names = "default", "sleep";
			pinctrl-1 = <0x17>;
			status = "disabled";
			pinctrl-0 = <0x4d>;

			rtc@0x51 {
				compatible = "nxp,pcf8563";
				i2c-max-frequency = <0x186a0>;
				reg = <0x51>;
			};

			io_expand@0x20 {
				compatible = "ti,pcf8574a";
				i2c-max-frequency = <0x186a0>;
				reg = <0x20>;
			};

			sensor_ov5640@0x78 {
				compatible = "allwinner,sensor_ov5640";
				i2c-max-frequency = <0x186a0>;
				reg = <0x78>;
				status = "okay";
			};
		};

		twi@0x01c27400 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "allwinner,suniv-twi";
			device_type = "twi1";
			reg = <0x0 0x1c27400 0x0 0x400>;
			interrupts = <0x8>;
			clocks = <0x18>;
			clock-frequency = <0x30d40>;
			pinctrl-names = "default", "sleep";
			pinctrl-1 = <0x1a>;
			status = "disabled";
			pinctrl-0 = <0x4e>;
		};

		twi@0x01c27800 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "allwinner,suniv-twi";
			device_type = "twi2";
			reg = <0x0 0x1c27800 0x0 0x400>;
			interrupts = <0x9>;
			clocks = <0x1b>;
			clock-frequency = <0x30d40>;
			pinctrl-names = "default", "sleep";
			pinctrl-1 = <0x1d>;
			status = "okay";
			pinctrl-0 = <0x4f>;
		};

		spi@01c05000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "allwinner,sun8i-spi";
			device_type = "spi0";
			reg = <0x0 0x1c05000 0x0 0x1000>;
			interrupts = <0xa>;
			clocks = <0x4 0x1e>;
			clock-frequency = <0x5f5e100>;
			pinctrl-names = "default", "sleep";
			pinctrl-1 = <0x21>;
			spi0_cs_number = <0x1>;
			spi0_cs_bitmap = <0x1>;
			dmas = <0x22 0x0 0x4 0x22 0x0 0x4>;
			dma-names = "rx", "tx";
			status = "okay";
			pinctrl-0 = <0x53 0x54>;

			nor_flash@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				compatible = "st,m25p64";
				spi-max-frequency = <0x989680>;
				reg = <0x0>;
			};
		};

		spi@01c06000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "allwinner,sun8i-spi";
			device_type = "spi1";
			reg = <0x0 0x1c06000 0x0 0x1000>;
			interrupts = <0xb>;
			clocks = <0x4 0x23>;
			clock-frequency = <0x5f5e100>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x24 0x25>;
			pinctrl-1 = <0x26>;
			spi1_cs_number = <0x1>;
			spi1_cs_bitmap = <0x1>;
			status = "disabled";
		};

		sdmmc@01c0f000 {
			compatible = "allwinner,sunivw1p1-sdmmc0";
			device_type = "sdc0";
			reg = <0x0 0x1c0f000 0x0 0x1000>;
			interrupts = <0x17>;
			clocks = <0x11 0x4 0x27 0x28 0x29>;
			clock-names = "osc24m", "pll_periph", "mmc", "ahb", "rst";
			pinctrl-names = "default", "sleep";
			pinctrl-1 = <0x2b>;
			max-frequency = <0x2faf080>;
			bus-width = <0x4>;
			cap-sdio-irq;
			keep-power-in-suspend;
			ignore-pm-notify;
			status = "okay";
			sdc0_detmode = <0x4>;
			sdc0_buswidth = <0x4>;
			pinctrl-0 = <0x5c>;
			sdc0_det = <0x38 0x0 0x1 0x0 0x1 0x2 0xffffffff>;
			sdc0_use_wp = <0x0>;
			sdc0_wp;
			sdc0_isio = <0x0>;
			sdc0_regulator = "none";
		};

		sdmmc@01c10000 {
			compatible = "allwinner,sunivw1p1-sdmmc1";
			device_type = "sdc1";
			reg = <0x0 0x1c10000 0x0 0x1000>;
			interrupts = <0x18>;
			clocks = <0x11 0x4 0x2c 0x2d 0x2e>;
			clock-names = "osc24m", "pll_periph", "mmc", "ahb", "rst";
			pinctrl-names = "default", "sleep";
			pinctrl-1 = <0x30>;
			max-frequency = <0x2faf080>;
			bus-width = <0x1>;
			cap-sdio-irq;
			keep-power-in-suspend;
			ignore-pm-notify;
			sunxi-dly-52M-ddr4 = <0x1 0x0 0x0 0x0 0x2>;
			sunxi-dly-104M = <0x1 0x0 0x0 0x0 0x1>;
			sunxi-dly-208M = <0x1 0x0 0x0 0x0 0x1>;
			status = "disabled";
			sdc1_detmode = <0x4>;
			sdc1_buswidth = <0x1>;
			pinctrl-0 = <0x5d>;
			sdc1_det;
			sdc1_use_wp = <0x0>;
			sdc1_wp;
			sdc1_isio = <0x1>;
			sdc1_regulator = "none";
		};

		disp@0x01e00000 {
			compatible = "allwinner,suniv-disp";
			reg = <0x0 0x1e00000 0x0 0x20000 0x0 0x1e60000 0x0 0x10000 0x0 0x1e70000 0x0 0x10000 0x0 0x1c0c000 0x0 0x1000>;
			interrupts = <0x1e 0x1f 0x21 0x1d>;
			clocks = <0x31 0x32 0x33 0x34>;
			status = "okay";
		};

		lcd0@01c0c000 {
			compatible = "allwinner,sunxi-lcd0";
			pinctrl-names = "active", "sleep";
			status = "okay";
			device_type = "lcd0";
			lcd_used = <0x0>;
			lcd_driver_name = "default_lcd";
			lcd_if = <0x0>;
			lcd_x = <0x320>;
			lcd_y = <0x1e0>;
			lcd_width = <0x96>;
			lcd_height = <0x5e>;
			lcd_dclk_freq = <0x21>;
			lcd_pwm_used = <0x0>;
			lcd_pwm_ch = <0x0>;
			lcd_pwm_freq = <0x2710>;
			lcd_pwm_pol = <0x0>;
			lcd_hbp = <0x2e>;
			lcd_ht = <0x41f>;
			lcd_hspw = <0x0>;
			lcd_vbp = <0x17>;
			lcd_vt = <0x20d>;
			lcd_vspw = <0x0>;
			lcd_hv_if = <0x0>;
			lcd_hv_smode = <0x0>;
			lcd_hv_s888_if = <0x0>;
			lcd_hv_syuv_if = <0x0>;
			lcd_hv_vspw = <0x0>;
			lcd_hv_hspw = <0x0>;
			lcd_lvds_if = <0x0>;
			lcd_lvds_colordepth = <0x1>;
			lcd_lvds_mode = <0x0>;
			lcd_lvds_ch = <0x0>;
			lcd_lvds_bitwidth = <0x0>;
			lcd_lvds_io_cross = <0x0>;
			lcd_cpu_if = <0x0>;
			lcd_frm = <0x0>;
			lcd_io_phase = <0x0>;
			lcd_gamma_en = <0x0>;
			lcd_bright_curve_en = <0x0>;
			lcd_cmap_en = <0x0>;
			deu_mode = <0x0>;
			lcdgamma4iep = <0x16>;
			lcd_io_cfg0 = <0x4000000>;
			smart_color = <0x5a>;
			lcd_bl_en_used = <0x1>;
			lcd_bl_en = <0x38 0x4 0xc 0x1 0x0 0xffffffff 0x1>;
			lcd_power = <0x38 0x0 0x0 0x1 0x0 0xffffffff 0x1>;
			pinctrl-0 = <0x57>;
		};

		csi_res@0x01cb0000 {
			compatible = "allwinner,sunxi-csi";
			reg = <0x0 0x1cb0000 0x0 0x1000>;
			clocks = <0x35 0x3 0x11>;
			clocks-index = <0x0 0x1 0x2>;
			status = "okay";
		};

		vfe@0 {
			device_type = "csi0";
			compatible = "allwinner,sunxi-vfe";
			interrupts = <0x20>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x36>;
			pinctrl-1 = <0x37>;
			csi_sel = <0x0>;
			csi0_sensor_list = <0x0>;
			csi0_mck = <0x38 0x4 0xb 0x2 0x0 0x1 0x0>;
			status = "disable";

			dev@1 {
				compatible = "allwinner,sensor_ov5640";
				csi0_dev0_mname = "ov5640";
				csi0_dev0_twi_addr = <0x78>;
				csi0_dev0_pos = "rear";
				csi0_dev0_isp_used = <0x0>;
				csi0_dev0_fmt = <0x0>;
				csi0_dev0_stby_mode = <0x0>;
				csi0_dev0_vflip = <0x0>;
				csi0_dev0_hflip = <0x0>;
				csi0_dev0_iovdd = <0x0>;
				csi0_dev0_iovdd_vol = <0x0>;
				csi0_dev0_avdd = <0x0>;
				csi0_dev0_avdd_vol = <0x0>;
				csi0_dev0_dvdd = <0x0>;
				csi0_dev0_dvdd_vol = <0x0>;
				csi0_dev0_afvdd = <0x0>;
				csi0_dev0_afvdd_vol = <0x0>;
				csi0_dev0_power_en;
				csi0_dev0_flash_en;
				csi0_dev0_flash_mode;
				csi0_dev0_af_pwdn;
				csi0_dev0_act_used = <0x0>;
				csi0_dev0_act_name = <0x0>;
				csi0_dev0_act_slave = <0x0>;
				status = "disable";
			};
		};

		usbc0@0 {
			device_type = "usbc0";
			compatible = "allwinner,sun50i-otg-manager";
			usb_port_type = <0x1>;
			usb_detect_type = <0x1>;
			usb_det_vbus_gpio = <0x38 0x0 0x2 0x0 0x1 0x1 0x1>;
			usb_host_init_state = <0x0>;
			usb_regulator_io = "nocare";
			usb_wakeup_suspend = <0x0>;
			usb_luns = <0x3>;
			usb_serial_unique = <0x0>;
			usb_serial_number = "20080411";
			rndis_wceis = <0x1>;
			status = "okay";
		};

		udc-controller@0x01c13000 {
			compatible = "allwinner,sun50i-udc";
			reg = <0x0 0x1c13000 0x0 0x1000 0x0 0x1c00000 0x0 0x100>;
			interrupts = <0x1a>;
			clocks = <0x39 0x3a>;
			status = "okay";
		};

		otghci0-controller@0x01c13000 {
			compatible = "allwinner,sunxi-otghci";
			reg = <0x0 0x1c13000 0x0 0x1000 0x0 0x1c00000 0x0 0x100>;
			interrupts = <0x1a>;
			clocks = <0x39 0x3a>;
			hci_ctrl_no = <0x0>;
			status = "okay";
		};

		daudio@0x01c22000 {
			compatible = "allwinner,sunxi-daudio";
			reg = <0x0 0x1c22000 0x0 0x3c>;
			clocks = <0x2 0x3b>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x3c 0x3d>;
			pinctrl-1 = <0x3e>;
			word_select_size = <0x20>;
			pcm_sync_period = <0x10>;
			pcm_lsb_first = <0x0>;
			slot_width_select = <0x8>;
			pcm_sync_type = <0x0>;
			pcm_start_slot = <0x4>;
			tx_data_mode = <0x0>;
			rx_data_mode = <0x0>;
			tdm_config = <0x1>;
			tdm_num = <0x0>;
			dmas = <0x22 0x0 0xe 0x22 0x0 0xe>;
			dma-names = "rx-tx", "rx-tx";
			status = "okay";
			linux,phandle = <0x46>;
			phandle = <0x46>;
		};

		spdif-controller@0x01c21400 {
			compatible = "allwinner,sunxi-spdif";
			reg = <0x0 0x1c21400 0x0 0x38>;
			clocks = <0x2 0x3f>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x40>;
			pinctrl-1 = <0x41>;
			dmas = <0x22 0x0 0x1 0x22 0x0 0x1>;
			status = "disabled";
			linux,phandle = <0x45>;
			phandle = <0x45>;
		};

		codec@0x01c23c00 {
			compatible = "allwinner,sunxi-internal-codec";
			reg = <0x0 0x1c23c00 0x0 0x9c>;
			clocks = <0x2 0x42>;
			headphonevol = <0x3b>;
			spkervol = <0x1b>;
			maingain = <0x4>;
			hp_dirused = <0x0>;
			pa_sleep_time = <0x15e>;
			status = "okay";
			linux,phandle = <0x44>;
			phandle = <0x44>;
		};

		cpudai0-controller@0x01c23c00 {
			compatible = "allwinner,sunxi-internal-cpudai";
			reg = <0x0 0x1c23c00 0x0 0x9c>;
			clocks = <0x42>;
			dmas = <0x22 0x0 0xc 0x22 0x0 0xc>;
			dma-names = "rx-tx", "rx-tx";
			status = "okay";
			linux,phandle = <0x43>;
			phandle = <0x43>;
		};

		sound@0 {
			compatible = "allwinner,sunxi-codec-machine";
			sunxi,cpudai-controller = <0x43>;
			sunxi,audio-codec = <0x44>;
			hp_detect_case = <0x0>;
			status = "okay";
		};

		sound@1 {
			compatible = "allwinner,sunxi-spdif-machine";
			sunxi,spdif-controller = <0x45>;
			status = "okay";
		};

		sound@2 {
			device_type = "sndi2scodec_conf";
			compatible = "allwinner,sunxi-codec-machine-i2s";
			sunxi,cpudai-controller-i2s = <0x46>;
			sta33x_pwrdn_gpio = <0x38 0x4 0x7 0x0 0x1 0x1 0x1>;
			sta33x_reset_gpio = <0x38 0x4 0x8 0x0 0x1 0x1 0x1>;
			status = "okay";
		};

		wifi {
			device_type = "wifi_conf";
			interrupts = <0x26>;
			power_en;
			reset_pin = <0x38 0x3 0x10 0x0 0x1 0x1 0x1>;
			irq_pin = <0x38 0x3 0xd 0x0 0x6 0x1 0x1>;
			status = "okay";
		};

		power {
			device_type = "power_ctrl";
			usb_drvbus_down = <0x38 0x3 0xb 0x0 0x1 0x1 0x1>;
			power_on = <0x38 0x3 0xf 0x0 0x1 0x1 0x1>;
			status = "okay";
		};

		gpio_keys {
			compatible = "gpio-keys";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			autorepeat;

			button@21 {
				label = "GPIO Key Power";
				linux,code = <0x6c>;
				gpios = <0x38 0x3 0xe 0x0 0x6 0x1 0x1>;
				status = "okay";
			};
		};

		keyboard {
			compatible = "allwinner,keyboard_2000mv";
			reg = <0x0 0x1c23400 0x0 0x400>;
			interrupts = <0x16>;
			status = "okay";
			key_cnt = <0x6>;
			key1 = <0xf8 0x73>;
			key2 = <0x193 0x72>;
			key3 = <0x24d 0x8b>;
			key4 = <0x307 0x1c>;
			key5 = <0x3c1 0x66>;
			key6 = <0x4b9 0x67>;
		};

		wirelesskey@0 {
			compatible = "allwinner,wireless-key";
			gpio-key = <0x38 0x4 0x3 0x0 0x6 0x1 0x1>;
			debounce = <0x0>;
			status = "disabled";
		};

		product {
			device_type = "product";
			version = "100";
			machine = "evb";
		};

		platform {
			device_type = "platform";
			eraseflag = <0x0>;
		};

		target {
			device_type = "target";
			boot_clock = <0x198>;
			storage_type = <0x3>;
			burn_key = <0x1>;
		};

		power_sply {
			device_type = "power_sply";
			dcdc1_vol = <0xbb8>;
			dcdc2_vol = <0x4b0>;
			dcdc3_vol = <0x4b0>;
			dcdc4_vol = <0x4b0>;
			dcdc5_vol = <0x5dc>;
			aldo2_vol = <0x708>;
			aldo3_vol = <0xbb8>;
		};

		card_boot {
			device_type = "card_boot";
			logical_start = <0xa000>;
			sprite_gpio0;
		};

		pm_para {
			device_type = "pm_para";
			standby_mode = <0x1>;
		};

		card0_boot_para {
			device_type = "card0_boot_para";
			card_ctrl = <0x0>;
			card_high_speed = <0x1>;
			card_line = <0x4>;
			pinctrl-0 = <0x47>;
		};

		card2_boot_para {
			device_type = "card2_boot_para";
			card_ctrl = <0x2>;
			card_high_speed = <0x1>;
			card_line = <0x8>;
			pinctrl-0 = <0x48>;
		};

		twi_para {
			device_type = "twi_para";
			twi_port = <0x0>;
			pinctrl-0 = <0x49>;
		};

		uart_para {
			device_type = "uart_para";
			uart_debug_port = <0x2>;
			pinctrl-0 = <0x4a>;
		};

		force_uart_para {
			device_type = "force_uart_para";
			force_uart__port = <0x2>;
			pinctrl-0 = <0x4b>;
		};

		jtag_para {
			device_type = "jtag_para";
			jtag_enable = <0x0>;
			pinctrl-0 = <0x4c>;
		};

		dram {
			device_type = "dram";
			dram_clk = <0x1e0>;
			dram_type = <0x3>;
			dram_zq = <0x77bb>;
			dram_odt_en = <0x1>;
			dram_para1 = <0x4319f4>;
			dram_para2 = <0x5>;
			dram_mr0 = <0x620>;
			dram_mr1 = <0x0>;
			dram_mr2 = <0x8>;
			dram_mr3 = <0x0>;
			dram_tpr0 = <0x6141b10>;
			dram_tpr1 = <0x40416>;
			dram_tpr2 = <0x3030306>;
			dram_tpr3 = <0x2006>;
			dram_tpr4 = <0x5040405>;
			dram_tpr5 = <0x5050302>;
			dram_tpr6 = <0x90006644>;
			dram_tpr7 = <0x42c21590>;
			dram_tpr8 = <0xd05612c0>;
			dram_tpr9 = <0x83def>;
			dram_tpr10 = <0x18082356>;
			dram_tpr11 = <0x32034156>;
			dram_tpr12 = <0x0>;
			dram_tpr13 = <0x0>;
		};

		rtp_para {
			device_type = "rtp_para";
			rtp_used = <0x0>;
			rtp_screen_size = <0x5>;
			rtp_regidity_level = <0x5>;
			rtp_press_threshold_enable = <0x0>;
			rtp_press_threshold = <0x1f40>;
			rtp_sensitive_level = <0xf>;
			rtp_exchange_x_y_flag = <0x0>;
		};

		ctp_para {
			device_type = "ctp_para";
			ctp_used = <0x0>;
			ctp_twi_id = <0x1>;
			ctp_twi_addr = <0x5d>;
			ctp_screen_max_x = <0x500>;
			ctp_screen_max_y = <0x320>;
			ctp_revert_x_flag = <0x1>;
			ctp_revert_y_flag = <0x1>;
			ctp_exchange_x_y_flag = <0x1>;
			ctp_int_port = <0x38 0x0 0x3 0x6 0xffffffff 0xffffffff 0xffffffff>;
			ctp_wakeup = <0x38 0x0 0x2 0x1 0xffffffff 0xffffffff 0x1>;
		};

		tkey_para {
			device_type = "tkey_para";
			tkey_used = <0x0>;
			tkey_twi_id;
			tkey_twi_addr;
			tkey_int;
		};

		motor_para {
			device_type = "motor_para";
			motor_used = <0x0>;
		};

		nand0 {
			device_type = "nand0";
			nand0_support_2ch = <0x0>;
			status = "disabled";
			pinctrl-0 = <0x55 0x56>;
			nand0_regulator1 = "vcc-nand";
			nand0_regulator2 = "none";
			nand0_cache_level = <0x55aaaa55>;
			nand0_flush_cache_num = <0x55aaaa55>;
			nand0_capacity_level = <0x55aaaa55>;
			nand0_id_number_ctl = <0x55aaaa55>;
			nand0_print_level = <0x55aaaa55>;
			nand0_p0 = <0x55aaaa55>;
			nand0_p1 = <0x55aaaa55>;
			nand0_p2 = <0x55aaaa55>;
			nand0_p3 = <0x55aaaa55>;
		};

		disp_init {
			device_type = "disp_init";
			disp_init_enable = <0x0>;
			disp_mode = <0x0>;
			screen0_output_type = <0x1>;
			screen0_output_mode = <0x4>;
			screen1_output_type = <0x1>;
			screen1_output_mode = <0x4>;
			fb0_framebuffer_num = <0x2>;
			fb0_pixel_sequence = <0x0>;
			fb0_scaler_mode_enable = <0x0>;
			fb0_format = <0x5>;
			fb0_width = <0x320>;
			fb0_height = <0x1e0>;
			fb1_framebuffer_num = <0x0>;
			fb1_pixel_sequence = <0x0>;
			fb1_scaler_mode_enable = <0x0>;
			fb1_format = <0x0>;
			fb1_width = <0x0>;
			fb1_height = <0x0>;
			lcd0_backlight = <0x32>;
			lcd1_backlight = <0x32>;
			lcd0_bright = <0x32>;
			lcd0_contrast = <0x32>;
			lcd0_saturation = <0x39>;
			lcd0_hue = <0x32>;
			lcd1_bright = <0x32>;
			lcd1_contrast = <0x32>;
			lcd1_saturation = <0x39>;
			lcd1_hue = <0x32>;
		};

		pwm0_para {
			device_type = "pwm0_para";
			pwm_used = <0x0>;
			pinctrl-0 = <0x58>;
		};

		pwm1_para {
			device_type = "pwm1_para";
			pwm_used = <0x0>;
			pinctrl-0 = <0x59>;
		};

		vip0 {
			device_type = "vip0";
			status = "disabled";
			pinctrl-0 = <0x5a 0x5b>;
			vip0_mname = "ov5640";
			vip0_twi_addr = <0x78>;
			vip0_isp_used = <0x1>;
			vip0_fmt = <0x0>;
			vip0_stby_mode = <0x0>;
			vip0_vflip = <0x0>;
			vip0_hflip = <0x0>;
			vip0_iovdd = "axp22_eldo3";
			vip0_iovdd_vol = <0x2ab980>;
			vip0_avdd = "axp22_dldo4";
			vip0_avdd_vol = <0x2ab980>;
			vip0_dvdd = "axp22_eldo2";
			vip0_dvdd_vol = <0x16e360>;
			vip0_afvdd;
			vip0_afvdd_vol = <0x2ab980>;
			vip0_power_en;
			vip0_reset = <0x38 0x4 0x10 0x1 0x0 0x1 0x0>;
			vip0_pwdn = <0x38 0x4 0x11 0x1 0x0 0x1 0x0>;
			vip0_flash_en;
			vip0_flash_mode;
			vip0_af_pwdn;
		};

		tvout_para {
			device_type = "tvout_para";
			tvout_used;
			tvout_channel_num;
			tv_en;
		};

		tvin_para {
			device_type = "tvin_para";
			tvin_used;
			tvin_channel_num;
		};

		di {
			device_type = "di";
			status = "disabled";
		};

		smc {
			device_type = "smc";
			smc_used;
			smc_rst;
			smc_vppen;
			smc_vppp;
			smc_det;
			smc_vccen;
			smc_sck;
			smc_sda;
		};

		gsensor_para {
			device_type = "gsensor_para";
			gsensor_used = <0x0>;
			gsensor_twi_id = <0x2>;
			gsensor_twi_addr = <0x18>;
			gsensor_int1 = <0x38 0x0 0x9 0x6 0x1 0xffffffff 0xffffffff>;
			gsensor_int2;
		};

		gps_para {
			device_type = "gps_para";
		};

		wifi_para {
			device_type = "wifi_para";
			wifi_used = <0x0>;
			wifi_sdc_id = <0x1>;
			wifi_usbc_id = <0x1>;
			wifi_usbc_type = <0x1>;
			wifi_mod_sel = <0x3>;
			wifi_power = "axp22_aldo1";
		};

		gy_para {
			device_type = "gy_para";
			gy_used = <0x0>;
			gy_twi_id = <0x2>;
			gy_twi_addr = <0x6a>;
			gy_int1 = <0x38 0x0 0xa 0x6 0x1 0xffffffff 0xffffffff>;
			gy_int2;
		};

		ls_para {
			device_type = "ls_para";
			ls_used = <0x0>;
			ls_twi_id = <0x2>;
			ls_twi_addr = <0x23>;
			ls_int = <0x38 0x0 0xc 0x6 0x1 0xffffffff 0xffffffff>;
		};

		compass_para {
			device_type = "compass_para";
			compass_used = <0x0>;
			compass_twi_id = <0x2>;
			compass_twi_addr = <0xd>;
			compass_int = <0x38 0x0 0xb 0x6 0x1 0xffffffff 0xffffffff>;
		};

		bt_para {
			device_type = "bt_para";
			bt_used;
			bt_uart_id;
			bt_wakeup;
			bt_gpio;
			bt_rst;
		};

		audiospdif {
			device_type = "audiospdif";
			status = "disabled";
		};

		spdif_machine {
			device_type = "spdif_machine";
			status = "disabled";
		};

		audiohdmi {
			device_type = "audiohdmi";
			status = "disabled";
		};

		hdmi_machine {
			device_type = "hdmi_machine";
			status = "disabled";
		};

		pmu0 {
			device_type = "pmu0";
			status = "disabled";
			pmu_id = <0x6>;
			pmu_twi_addr = <0x34>;
			pmu_twi_id = <0x1>;
			pmu_irq_id = <0x0>;
			pmu_chg_ic_temp = <0x0>;
			pmu_battery_rdc = <0x64>;
			pmu_battery_cap = <0x0>;
			pmu_runtime_chgcur = <0x1c2>;
			pmu_suspend_chgcur = <0x5dc>;
			pmu_shutdown_chgcur = <0x5dc>;
			pmu_init_chgvol = <0x1068>;
			pmu_ac_vol = <0xfa0>;
			pmu_ac_cur = <0x0>;
			pmu_usbpc_vol = <0x1130>;
			pmu_usbpc_cur = <0x1f4>;
			pmu_battery_warning_level1 = <0xf>;
			pmu_battery_warning_level2 = <0x0>;
			pmu_chgled_func = <0x0>;
			pmu_chgled_type = <0x0>;
			pmu_bat_para1 = <0x0>;
			pmu_bat_para2 = <0x0>;
			pmu_bat_para3 = <0x0>;
			pmu_bat_para4 = <0x0>;
			pmu_bat_para5 = <0x0>;
			pmu_bat_para6 = <0x0>;
			pmu_bat_para7 = <0x0>;
			pmu_bat_para8 = <0x0>;
			pmu_bat_para9 = <0x5>;
			pmu_bat_para10 = <0x8>;
			pmu_bat_para11 = <0x9>;
			pmu_bat_para12 = <0xa>;
			pmu_bat_para13 = <0xd>;
			pmu_bat_para14 = <0x10>;
			pmu_bat_para15 = <0x14>;
			pmu_bat_para16 = <0x21>;
			pmu_bat_para17 = <0x29>;
			pmu_bat_para18 = <0x2e>;
			pmu_bat_para19 = <0x32>;
			pmu_bat_para20 = <0x35>;
			pmu_bat_para21 = <0x39>;
			pmu_bat_para22 = <0x3d>;
			pmu_bat_para23 = <0x43>;
			pmu_bat_para24 = <0x49>;
			pmu_bat_para25 = <0x4e>;
			pmu_bat_para26 = <0x54>;
			pmu_bat_para27 = <0x58>;
			pmu_bat_para28 = <0x5c>;
			pmu_bat_para29 = <0x5d>;
			pmu_bat_para30 = <0x5e>;
			pmu_bat_para31 = <0x5f>;
			pmu_bat_para32 = <0x64>;
			pmu_bat_temp_enable = <0x0>;
			pmu_bat_charge_ltf = <0x8d5>;
			pmu_bat_charge_htf = <0x184>;
			pmu_bat_shutdown_ltf = <0xc80>;
			pmu_bat_shutdown_htf = <0xed>;
			pmu_bat_temp_para1 = <0x1d2a>;
			pmu_bat_temp_para2 = <0x1180>;
			pmu_bat_temp_para3 = <0xdbe>;
			pmu_bat_temp_para4 = <0xae2>;
			pmu_bat_temp_para5 = <0x8af>;
			pmu_bat_temp_para6 = <0x6fc>;
			pmu_bat_temp_para7 = <0x5a8>;
			pmu_bat_temp_para8 = <0x3c9>;
			pmu_bat_temp_para9 = <0x298>;
			pmu_bat_temp_para10 = <0x1d2>;
			pmu_bat_temp_para11 = <0x189>;
			pmu_bat_temp_para12 = <0x14d>;
			pmu_bat_temp_para13 = <0x11b>;
			pmu_bat_temp_para14 = <0xf2>;
			pmu_bat_temp_para15 = <0xb3>;
			pmu_bat_temp_para16 = <0x86>;
			pmu_powkey_off_time = <0x1770>;
			pmu_powkey_off_func = <0x0>;
			pmu_powkey_off_en = <0x1>;
			pmu_powkey_long_time = <0x5dc>;
			pmu_powkey_on_time = <0x3e8>;
		};

		pmu0_regu {
			device_type = "pmu0_regu";
			regulator_count = <0x17>;
			regulator1 = "axp28_rtc";
			regulator2 = "axp28_aldo1";
			regulator3 = "axp28_aldo2";
			regulator4 = "axp28_aldo3";
			regulator5 = "axp28_dldo1";
			regulator6 = "axp28_dldo2";
			regulator7 = "axp28_dldo3";
			regulator8 = "axp28_dldo4";
			regulator9 = "axp28_eldo1";
			regulator0 = "axp28_eldo2";
			regulator11 = "axp28_eldo3";
			regulator12 = "axp28_fldo1";
			regulator13 = "axp28_fldo2";
			regulator14 = "axp28_dcdc1";
			regulator15 = "axp28_dcdc2";
			regulator16 = "axp28_dcdc3";
			regulator17 = "axp28_dcdc4";
			regulator18 = "axp28_dcdc5";
			regulator19 = "axp28_dcdc6";
			regulator20 = "axp28_dcdc7";
			regulator21 = "axp28_gpio0ldo";
			regulator22 = "axp28_gpio1ldo";
		};

		dvfs_table {
			device_type = "dvfs_table";
			max_freq = <0x47868c00>;
			min_freq = <0x1c9c3800>;
			LV_count = <0x8>;
			LV1_freq = <0x5b8d8000>;
			LV1_volt = <0x5dc>;
			LV2_freq = <0x501bd000>;
			LV2_volt = <0x5b4>;
			LV3_freq = <0x47868c00>;
			LV3_volt = <0x528>;
			LV4_freq = <0x3c14dc00>;
			LV4_volt = <0x4b0>;
			LV5_freq = <0x30a32c00>;
			LV5_volt = <0x44c>;
			LV6_freq = <0x269fb200>;
			LV6_volt = <0x410>;
			LV7_freq = <0x0>;
			LV7_volt = <0x410>;
			LV8_freq = <0x0>;
			LV8_volt = <0x410>;
		};

		Vdevice {
			device_type = "Vdevice";
			status = "disabled";
			pinctrl-0 = <0x5e>;
		};
	};

	aliases {
		serial0 = "/soc/uart@01c25000";
		serial1 = "/soc/uart@01c25400";
		serial2 = "/soc/uart@01c25800";
		twi0 = "/soc/twi@0x01c27000";
		twi1 = "/soc/twi@0x01c27400";
		twi2 = "/soc/twi@0x01c27800";
		spi0 = "/soc/spi@01c05000";
		spi1 = "/soc/spi@01c06000";
		mmc0 = "/soc/sdmmc@01c0f000";
		mmc1 = "/soc/sdmmc@01c10000";
		global_timer0 = "/soc/timer@1c20c00";
		csi_res0 = "/soc/csi_res@0x01cb0000";
		vfe0 = "/soc/vfe@0";
		disp = "/soc/disp@0x01e00000";
		lcd0 = "/soc/lcd0@01c0c000";
	};

	chosen {
		bootargs = "earlyprintk=sunxi-uart,0x01c25000 loglevel=8 initcall_debug=1 console=ttyS0 init=/init";
		linux,initrd-start = <0x0 0x0>;
		linux,initrd-end = <0x0 0x0>;
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,arm926ejs";
			reg = <0x0>;
		};
	};

	sram_ctrl {
		device_type = "sram_ctrl";
		compatible = "allwinner,sram_ctrl";
		reg = <0x0 0x1c00000 0x0 0x100>;
	};

	ion {
		compatible = "allwinner,sunxi-ion";

		system {
			type = <0x0>;
		};

		system_contig {
			type = <0x1>;
		};

		carveout {
			type = <0x2>;
			base = <0x81c00000>;
			size = <0x400000>;
		};

		cma {
			type = <0x4>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x2000000>;
	};

	interrupt-controller@01c20400 {
		compatible = "allwinner,suniv-intc";
		#interrupt-cells = <0x1>;
		#address-cells = <0x0>;
		device_type = "intc";
		interrupt-controller;
		reg = <0x0 0x1c20400 0x0 0x400>;
		linux,phandle = <0x1>;
		phandle = <0x1>;
	};

	watchdog@01c20ca0 {
		compatible = "allwinner,sun8i-wdt";
		reg = <0x0 0x1c20ca0 0x0 0x18>;
	};
};

	/*lvgl tick*/	
	Sys_Timer1_Init();
	/*lvgl 初始化*/
	lv_init();
	lv_port_disp_init();
	lv_port_indev_init();
	// lv_fs_if_init();
// #ifdef RTP_TOUCH_USR	
// 	touch_chCalibrate();/*触屏校正*/
// #endif	
	lv_demo_widgets();
	while(1)
	{ 
		lv_task_handler();	
		delay_us(10);
	}

LV_ATTRIBUTE_TIMER_HANDLER uint32_t lv_timer_handler(void)
{
    TIMER_TRACE("begin");

    /*Avoid concurrent running of the timer handler*/
    static bool already_running = false;
    if(already_running) return 1;
    already_running = true;

    if(lv_timer_run == false) {
        already_running = false; /*Release mutex*/
        TIMER_TRACE("already running, concurrent calls are not allow, returning");
        return 1;
    }

    static uint32_t idle_period_start = 0;
    static uint32_t busy_time         = 0;

    uint32_t handler_start = lv_tick_get();

    if(handler_start == 0) {
        static uint32_t run_cnt = 0;
        run_cnt ++;
        if(run_cnt > 100) {
            run_cnt = 0;
            LV_LOG_WARN("It seems lv_tick_inc() is not called.");
        }
    }
    /*Run all timer from the list*/
    lv_timer_t * next;
    do {
        timer_deleted             = false;
        timer_created             = false;
        LV_GC_ROOT(_lv_timer_act) = _lv_ll_get_head(&LV_GC_ROOT(_lv_timer_ll));
        while(LV_GC_ROOT(_lv_timer_act)) {
            /*The timer might be deleted if it runs only once ('repeat_count = 1')
             *So get next element until the current is surely valid*/
            sysprintf("1\n");
            next = _lv_ll_get_next(&LV_GC_ROOT(_lv_timer_ll), LV_GC_ROOT(_lv_timer_act));
            sysprintf("2\n");
/**
* 可疑点
*/
            if(lv_timer_exec(LV_GC_ROOT(_lv_timer_act))) {
                sysprintf("3\n");
                /*If a timer was created or deleted then this or the next item might be corrupted*/
                if(timer_created || timer_deleted) {
                    sysprintf("4\n");
                    TIMER_TRACE("Start from the first timer again because a timer was created or deleted");
                    break;
                }
            }
            sysprintf("5\n");
            LV_GC_ROOT(_lv_timer_act) = next; /*Load the next timer*/
        }
    } while(LV_GC_ROOT(_lv_timer_act));
    uint32_t time_till_next = LV_NO_TIMER_READY;
    next = _lv_ll_get_head(&LV_GC_ROOT(_lv_timer_ll));
    while(next) {
        if(!next->paused) {
            uint32_t delay = lv_timer_time_remaining(next);
            if(delay < time_till_next)
                time_till_next = delay;
        }

        next = _lv_ll_get_next(&LV_GC_ROOT(_lv_timer_ll), next); /*Find the next timer*/
    }

    busy_time += lv_tick_elaps(handler_start);
    uint32_t idle_period_time = lv_tick_elaps(idle_period_start);
    if(idle_period_time >= IDLE_MEAS_PERIOD) {
        idle_last         = (busy_time * 100) / idle_period_time;  /*Calculate the busy percentage*/
        idle_last         = idle_last > 100 ? 0 : 100 - idle_last; /*But we need idle time*/
        busy_time         = 0;
        idle_period_start = lv_tick_get();
    }

    already_running = false; /*Release the mutex*/

    TIMER_TRACE("finished (%d ms until the next timer call)", time_till_next);
    return time_till_next;
}

	/*GUI初始化*/
	lv_init();
	lv_port_disp_init();
	lv_port_indev_init();
	lv_fs_if_init();	
	while(1)
	{ 
	  lv_task_handler();	
	  rt_thread_mdelay(1);
	}	

[10:50:54.524]收←◆KQ@|@X`X@Ve4

void lv_fs_if_init(void)
{
	lv_port_fs_init();
}
void lv_port_fs_init(void)
{
   
    /*----------------------------------------------------
     * Initialize your storage device and File System
     * -------------------------------------------------*/
    fs_init();
    /*---------------------------------------------------
     * Register the file system interface in LVGL
     *--------------------------------------------------*/

    /*Add a simple drive to open images*/
    static lv_fs_drv_t fs_drv;
    lv_fs_drv_init(&fs_drv);

    /*Set up fields...*/
    fs_drv.letter = 'S';
    fs_drv.open_cb = fs_open;
    fs_drv.close_cb = fs_close;
    fs_drv.read_cb = fs_read;
    fs_drv.write_cb = fs_write;
    fs_drv.seek_cb = fs_seek;
    fs_drv.tell_cb = fs_tell;

    fs_drv.dir_close_cb = fs_dir_close;
    fs_drv.dir_open_cb = fs_dir_open;
    fs_drv.dir_read_cb = fs_dir_read;

    lv_fs_drv_register(&fs_drv);
}
static void fs_init(void)
{
    /*E.g. for FatFS initialize the SD card and FatFS itself*/

    /*You code here*/
       /*E.g. for FatFS initalize the SD card and FatFS itself*/
    /*You code here*/
    
    // FATFS * fs = (FATFS*)lv_mem_alloc(sizeof(FATFS));
    FATFS fs;
	FRESULT fres = FR_NOT_READY;


  	if (fres != FR_OK) {
    	fres = f_mount(&fs,"0:",1);
    	if (fres != FR_OK) 
        {
     		SD_Printf("SD Card mounted error. (%d)\n",fres);
    	} 
        else
        {
            SD_Printf("SD Card mounted successfully.\n");
        }
  	}
	// lv_mem_free(fs);
}

void Lvgl_start(void)  
{ 
int time1=0;
int time2=0;	
	GPIO_Congif(GPIOE,GPIO_Pin_6,GPIO_Mode_OUT,GPIO_PuPd_NOPULL);
	/*lvgl tick*/	
	Sys_Timer1_Init();
	/*lvgl 初始化*/
	lv_init();
	lv_port_disp_init();
	lv_port_indev_init();
	while(1)
	{ 
		lv_task_handler();	
		delay_us(10);
	}
}

testglib.o:testglib.c:(.text+0x1a0): first defined here
collect2: error: ld returned 1 exit status
Makefile:455: recipe for target 'testglib' failed
make[5]: *** [testglib] Error 1
make[5]: Leaving directory '/home/sam/09_A40I_Linux_SDK_20190711/AWW40I_DVK_LINUX/out/sun8iw11p1/linux/common/buildroot/build/host-pkg-config-0.25/glib-1.2.10'
Makefile:530: recipe for target 'all-recursive' failed
make[4]: *** [all-recursive] Error 1
make[4]: Leaving directory '/home/sam/09_A40I_Linux_SDK_20190711/AWW40I_DVK_LINUX/out/sun8iw11p1/linux/common/buildroot/build/host-pkg-config-0.25/glib-1.2.10'
Makefile:363: recipe for target 'all' failed
make[3]: *** [all] Error 2
make[3]: Leaving directory '/home/sam/09_A40I_Linux_SDK_20190711/AWW40I_DVK_LINUX/out/sun8iw11p1/linux/common/buildroot/build/host-pkg-config-0.25/glib-1.2.10'
Makefile:537: recipe for target 'all-recursive' failed
make[2]: *** [all-recursive] Error 1
make[2]: Leaving directory '/home/sam/09_A40I_Linux_SDK_20190711/AWW40I_DVK_LINUX/out/sun8iw11p1/linux/common/buildroot/build/host-pkg-config-0.25'
Makefile:310: recipe for target 'all' failed
make[1]: *** [all] Error 2
make[1]: Leaving directory '/home/sam/09_A40I_Linux_SDK_20190711/AWW40I_DVK_LINUX/out/sun8iw11p1/linux/common/buildroot/build/host-pkg-config-0.25'
package/Makefile.package.in:289: recipe for target '/home/sam/09_A40I_Linux_SDK_20190711/AWW40I_DVK_LINUX/out/sun8iw11p1/linux/common/buildroot/build/host-pkg-config-0.25/.stamp_built' failed
make: *** [/home/sam/09_A40I_Linux_SDK_20190711/AWW40I_DVK_LINUX/out/sun8iw11p1/linux/common/buildroot/build/host-pkg-config-0.25/.stamp_built] Error 2
make: Leaving directory '/home/sam/09_A40I_Linux_SDK_20190711/AWW40I_DVK_LINUX/buildroot'
ERROR: build buildroot Failed

[uart_para]
uart_debug_port = 1
uart_debug_tx   = port:PA3<5><1><default><default>
uart_debug_rx   = port:PA2<5><1><default><default>

[uart_para]
uart_debug_port = 0
uart_debug_tx   = port:PE1<5><1><default><default>
uart_debug_rx   = port:PE0<5><1><default><default>

        [*] MMU-based Paged Memory Management Support                                | |  
  | |        ARM system type (Allwinner Ltd. SUNXI family)  --->                          | |  
  | |        Select the architecture of SoC (Allwinner arm926ejs socs(sun3i))  ---> | |  
  | |        Allwinner development Board (EVB board)  --->                                  | |  
  | |        Select the wafer with arch sun3i (Allwinner sun3iw1 SOC)  --->            | |  
  | |        Select the Soc with wafer sun3iw1 (Allwinner sun3iw1p1 SoC)  --->      | |  
  | |        Select the target board with sun3iw1p1 (Allwinner sun3iw1p1 F1C200s)

kernel/power/scenelock_data.h:30:34: error: invalid application of 'sizeof' to incomplete type 'struct scene_extended_standby_t[]'
 int extended_standby_cnt = sizeof(extended_standby)/sizeof(extended_standby[0]);

#ifndef _LINUX_SCENELOCK_DATA_H
#define _LINUX_SCENELOCK_DATA_H

#include <linux/power/axp_depend.h>
#ifdef CONFIG_ARCH_SUN50IW1P1
#include "scenelock_data_sun50iw1p1.h"
#elif defined(CONFIG_ARCH_SUN50IW2P1)
#include "scenelock_data_sun50iw2p1.h"
#elif defined(CONFIG_ARCH_SUN50IW3P1)
#include "scenelock_data_sun50iw3p1.h"
#elif defined(CONFIG_ARCH_SUN50IW6P1)
#include "scenelock_data_sun50iw6p1.h"
#elif defined(CONFIG_ARCH_SUN8IW5P1)
#include "scenelock_data_sun8iw5p1.h"
#elif defined(CONFIG_ARCH_SUN8IW6P1)
#include "scenelock_data_sun8iw6p1.h"
#elif defined(CONFIG_ARCH_SUN8IW8P1)
#include "scenelock_data_sun8iw8p1.h"
#elif defined(CONFIG_ARCH_SUN8IW10P1)
#include "scenelock_data_sun8iw10p1.h"
#elif defined(CONFIG_ARCH_SUN8IW11P1)
#include "scenelock_data_sun8iw11p1.h"
#elif defined(CONFIG_ARCH_SUN8IW17P1)
#include "scenelock_data_sun8iw17p1.h"
#elif defined(CONFIG_ARCH_SUN9IW1P1)
#include "scenelock_data_sun9iw1p1.h"
#endif

int extended_standby_cnt = sizeof(extended_standby)/sizeof(extended_standby[0]);

#endif

CONFIG_ARCH_SUN3I=y
# CONFIG_FPGA_V4_PLATFORM is not set
# CONFIG_FPGA_V7_PLATFORM is not set
CONFIG_EVB_PLATFORM=y
CONFIG_ARCH_SUN3IW1=y
CONFIG_ARCH_SUN3IW1P1=y
# CONFIG_ARCH_SUN3IW1P1_C600 is not set
CONFIG_ARCH_SUN3IW1P1_F1C200s=y
# CONFIG_ARCH_SUN3IW1P1_R6 is not set
# CONFIG_SUNXI_ALARM is not set
# CONFIG_SUNXI_TRUSTZONE is not set
# CONFIG_HOMLET_PLATFORM is not set

.Start Shell from partion 'c'..................................................................................
Mount Parts Thread work end....
&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
&                                                                                                                   &
&                                                      FFBBEE                                                       &
&                          I BBBBBBBBBBBB            I BBBB                            MMI         BBLL             &
&                    BBBBB@STEVEN@BMMBBBBBB          BBBBI                           BBBBFF      BBBBFF             &
&                  BBBBBBBBMMBBBBBBMMEEBBLL        BBBBBB                          BBBBBB::    BBBBBB..             &
&                BBBBBBBBBB        LLBB.         BBBBBB                          BBBB  BB    EEBB  BB               &
&                BBBB..          BB            I BBBB.                           BBI FFLL    BB..FFFF               &
&              I BBFF                          BBBBLL                          BBBB  BB    BBBB  BB                 &
&              ::BBBBBB                      BBBBBB    BB          BBBBBBBB    BBLLBB::    BBLLBB::                 &
&                LLBBBBBBBBBB              FFBBBB  . BBBBBB    . BBBB  BBFF  BBBBBBEE    BBBBBBBB                   &
&                      BBBBBBEEBB          BBBB  LLBBBBBB      BBBB  EEBB    BBBBBB      BBBBBB                     &
&                              BBBB::    BBBB. EEBBI BB      BBBB  BBEE    . BBBB      . BBBB                       &
&                                BBBB    MMBBLLBB  BBLL    ..BBBBBB        I BB::      BBBB.       ..               &
&                              BBBBBB    BBEEBB::LLBB    BBFFBBEE      LLBBEEBB::    BBBBBB..    BB                 &
&          BB::          BBBBBBBBBBFF    BBBBFF  BBBBBBBB  I BBBB    BBBB  I BBBB::BB::FFBBBB..BB..                 &
&        BBBBBBBBMMBBBBBBBBMMMMBBBB      BBBB    BBBBBB      BBBBBBBBBB      BBBBBBI     BBBBBBI                    &
&        BBBB@V1.0@BBMMBBBBBBBB                                BBBB            BB          BB                       &
&            ::BBBBMMBB                                                                                             &
&                                                                                                                   &
&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
-----Please input cmd after "work_dir>:"-----------------------------------------------------------------------------
-----Input "help" command for more information!----------------------------------------------------------------------
-----Give your requirement or sugguestion to sunny for improvement---------------------------------------------------
---------------------------------------------------------------------------------------------------------------------

set iic clock fail
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
SDC 0 init...
SDC 0 err, cmd 8,  RTO
SDC 0 err, cmd 55,  RTO
SDC 0 err, cmd 1,  RTO
unknown card type
error occur when plugin card0
set iic clock fail
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
&&&&&&&&&&&&0x6972 addr error&&&&&&&&&&
&&&addr=0x6969637765....
*****0x6969637765 data fail....
set iic clock fail
&&&addr=0x6969637765....

/*
*********************************************************************************************************
*                                           BACK LIGHT ON
*
* Description: 
*
* Arguments  : 
*
* Returns    :
*
* Note       :
*********************************************************************************************************
*/
void LCD_bl_open(__u32 sel)
{
    LCD_BL_EN(sel, 1); 
    LCD_PWM_EN(sel, 1);
}

void LCD_bl_close(__u32 sel)
{
    LCD_BL_EN(sel, 0); 
    LCD_PWM_EN(sel, 0);
}

arch/suniv/standby.c: 13 warnings, 0 errors
"D:/Program Files/ARM/RVCT/Programs/4.0/400/win_32-pentium"/armlink --noremove --entry 0xffff8000 --scatter=./config/config.sct -o __image.axf mod_standby.o arch/suniv/standby_tmr.o arch/suniv/dram_sys.o arch/suniv/standby_sdcard.o arch/suniv/standby_eint.o arch/suniv/standby_usb.o arch/suniv/power_axp199.o arch/suniv/standby_int.o arch/suniv/standby_key.o arch/suniv/standby_twi.o arch/suniv/standby_uart.o arch/suniv/standby_clock.o arch/suniv/bsp_rk.o arch/suniv/standby_nmi.o arch/suniv/standby.o arch/suniv/standby_power.o arch/suniv/standby_matrixkey.o arch/suniv/power_axp189.o arch/suniv/standby_ir.o arch/suniv/usr_event/standby_usrevent.o ./../../libs/suniv/elibs.a
Error: L6220E: Load region LO_FIRST size (13656 bytes) exceeds limit (12288 byte
s).
Finished: 0 information, 0 warning and 1 error messages.
make[2]: *** [makefile:41：__image.axf] 错误 1
make[2]: 离开目录“/cygdrive/e/linux/MELIS100A/emod/mod_standby”
make[1]: *** [makefile:28：all] 错误 2
make[1]: 离开目录“/cygdrive/e/linux/MELIS100A/emod”
make: *** [makefile:24：all] 错误 2

;/*
;********************************************************************************************************
;*											        ePDK
;*						            the Easy Portable/Player Develop Kits
;*									           standby sample
;*
;*						        (c) Copyright 2006-2010, kevin.z China
;*											All	Rights Reserved
;*
;* File    : scatter.sct
;* By      : kevin.z
;* Version : V1.00
;********************************************************************************************************
;*/
LO_FIRST 0xffff8000 0x3600
{
    EXEC_MOD  0xffff8000
    {
        * ( ENTRY, +FIRST )
        * (+RO)
        * (+RW)
        * (+ZI)
	}
}

lcd/lcd_panel_cfg.c: 6 warnings, 0 errors
"D:/Program Files/ARM/RVCT/Programs/4.0/400/win_32-pentium"/armlink --noremove --entry 0xe0300000 --scatter=./config/config.sct -o __image.axf dev_display.o drv_display.o magic.o lcd/lcd_panel_cfg.o ./../../libs/suniv/bsp/bsp_de.a ./../../libs/suniv/bsp/bsp_lcd.a ./../../libs/suniv/bsp/osal_melis.a ./../../libs/suniv/elibs.a
Error: L6218E: Undefined symbol LCD_bl_close (referred from dev_display.o).
Error: L6218E: Undefined symbol LCD_bl_open (referred from dev_display.o).
Finished: 0 information, 0 warning and 2 error messages.
make[3]: *** [makefile:45：__image.axf] 错误 1

:START
    @echo *********************************************
    @echo *   select board                            *
    @echo *********************************************
    @echo  0: InnoLux_at043
    @echo  1: R61509_cpupanel_16bit
    @echo *********************************************
    
    set /p SEL=Please Select:
    if %SEL%==0     goto LCD0
    if %SEL%==1     goto LCD1
    goto ERROR

::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
:LCD0
    copy lcd_bak\InnoLux_at043.c lcd_panel_cfg.c
    goto conti
::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
:LCD1
    copy lcd_bak\R61509.c lcd_panel_cfg.c
    goto conti

:ERROR
    @echo sel error!!
    goto conti
    
:conti
    @echo *********************************************
    pause

/*
*********************************************************************************************************
*                                                    MELIS
*                                    the Easy Portable/Player Develop Kits
*                                                Display Module
*
*                                    (c) Copyright 2011-2014, Vito China
*                                             All Rights Reserved
*
* File    : ILI9327.c
* By      : Vito
* Version : v1.0
* Date    : 2011-4-27
* Descript: .
* Update  : date                auther      ver     notes
*           2011-4-27 14:07:21  Vito        1.0     Create this file.
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*                            sys_config.fex 配置示例
lcd_bl_en_used           = 0
lcd_bl_en                = 0

lcd_power_used           = 1
lcd_power                = port:PC04<1><1><1><0>

lcd_pwm_used             = 1
lcd_pwm                  = port:PA08<2><0><default><default>
*********************************************************************************************************
*/
#include "lcd_panel_cfg.h"

static void LCD_cfg_panel_info(__panel_para_t * info)
{
    memset(info,0,sizeof(__panel_para_t));

    //屏的基本信息
    info->lcd_x              = 400;
    info->lcd_y              = 240;
    info->lcd_dclk_freq      = 8;  //MHz
    info->lcd_pwm_freq       = 20;  //KHz
    info->lcd_srgb           = 0x00202020;
    info->lcd_swap           = 0;
                             
    //屏的接口配置信息       
    info->lcd_if             = 1;//0:HV , 1:8080 I/F, 2:TTL I/F, 3:LVDS
                             
    //屏的HV模块相关信息     
    info->lcd_hv_if          = 0;
    info->lcd_hv_hspw        = 0;
    info->lcd_hv_lde_iovalue = 0;
    info->lcd_hv_lde_used    = 0;
    info->lcd_hv_smode       = 0;
    info->lcd_hv_syuv_if     = 0;
    info->lcd_hv_vspw        = 0;
        
    //屏的HV配置信息
    info->lcd_hbp            = 3;
    info->lcd_ht             = 480;
    info->lcd_vbp            = 3;
    info->lcd_vt             = (2 * 450);

    //屏的IO配置信息
    info->lcd_io_cfg0        = 0x00000000;
    info->lcd_io_cfg1        = 0x00000000;
    info->lcd_io_strength    = 0;

    //TTL屏幕的配置信息
    info->lcd_ttl_ckvd       = 0;
    info->lcd_ttl_ckvh       = 0;
    info->lcd_ttl_ckvt       = 0;
    info->lcd_ttl_datainv_en = 0;
    info->lcd_ttl_datainv_sel= 0;
    info->lcd_ttl_datarate   = 0;
    info->lcd_ttl_oehd       = 0;
    info->lcd_ttl_oehh       = 0;
    info->lcd_ttl_oevd       = 0;
    info->lcd_ttl_oevh       = 0;
    info->lcd_ttl_oevt       = 0;
    info->lcd_ttl_revd       = 0;
    info->lcd_ttl_revsel     = 0;
    info->lcd_ttl_sthd       = 0;
    info->lcd_ttl_sthh       = 0;
    info->lcd_ttl_stvdl      = 0;
    info->lcd_ttl_stvdp      = 0;
    info->lcd_ttl_stvh       = 0; 

    //cpu屏幕的配置信息
    info->lcd_frm 			 = 2;//18bit:1;	//0: disable; 1: enable rgb666 dither; 2:enable rgb565 dither
    info->lcd_cpu_if     = 4;//18bit:0
}

void  Lcd_cpuisr_proc(void);

static void LCD_init_isr(__u32 sel)
{
	LCD_cpu_register_irq(sel, Lcd_cpuisr_proc);
}


static void LCD_exit_isr(__u32 sel)
{
	LCD_cpu_register_irq(sel, 0);
}

static __s32 LCD_open_flow(__u32 sel)
{
	LCD_OPEN_FUNC(sel, LCD_power_on	, 10); 	//打开LCD供电，并延时10ms
	LCD_OPEN_FUNC(sel, TCON_open	, 200); //打开LCD控制器，并延时200ms
	LCD_OPEN_FUNC(sel, LCD_open_cmd	, 200); 	//通过IO配置LCD模组为工作模式，并延时100ms
	LCD_OPEN_FUNC(sel, LCD_bl_open	, 0); 	//打开背光，并延时0ms
	LCD_OPEN_FUNC(sel, LCD_init_isr, 0); //初始化CPU PANEL 中断服务程序，并延时 0ms

	return 0;
}

static __s32 LCD_close_flow(__u32 sel)
{	
	LCD_CLOSE_FUNC(sel, LCD_exit_isr, 0); //关闭CPU PANEL中断服务程序,并延时0ms
	LCD_CLOSE_FUNC(sel, LCD_bl_close    , 0); 	//关闭背光，并延时0ms
	LCD_CLOSE_FUNC(sel, LCD_close_cmd   , 0); 	//通过IO配置LCD模组为掉电/休眠模式，并延时0ms
	LCD_CLOSE_FUNC(sel, TCON_close	    , 0); 	//关闭LCD 控制器，并延时0ms
	LCD_CLOSE_FUNC(sel, LCD_power_off   , 1700); //关闭LCD供电，并延时1700ms

	return 0;
}

/*
*********************************************************************************************************
*                                           POWER ON
*
* Description: 
*
* Arguments  : 
*
* Returns    : 
*
* Note       :
*********************************************************************************************************
*/
static void LCD_power_on(__u32 sel)
{
    LCD_POWER_EN(sel, 1);
}

static void LCD_power_off(__u32 sel)
{
    LCD_POWER_EN(sel, 0);
}

/*
*********************************************************************************************************
*                                           BACK LIGHT ON
*
* Description: 
*
* Arguments  : 
*
* Returns    :
*
* Note       :
*********************************************************************************************************
*/
static void LCD_bl_open(__u32 sel)
{
    LCD_BL_EN(sel, 1); 
    LCD_PWM_EN(sel, 1);
}

static void LCD_bl_close(__u32 sel)
{
    LCD_BL_EN(sel, 0); 
    LCD_PWM_EN(sel, 0);
}