WhyCan Forum(哇酷开发者社区)

 #define PRCM_CPU_PWROFF_REG			0x100
 #define PRCM_CPU_PWR_CLAMP_REG(cpu)		(((cpu) * 4) + 0x140)
 
+/*
+ * T113 is different from other SoCs.
+ */
+#define T113_CPUCFG_RST_CTRL_REG		0x0000
+#define T113_CPUCTRL_ENTRY_REG(cpu)		(0x5c0 + ((cpu) + 1) * 4)
+
 static void __iomem *cpucfg_membase;
 static void __iomem *prcm_membase;
 
@@ -194,3 +200,61 @@ static const struct smp_operations sun8i_smp_ops __initconst = {
 	.smp_boot_secondary	= sun8i_smp_boot_secondary,
 };
 CPU_METHOD_OF_DECLARE(sun8i_a23_smp, "allwinner,sun8i-a23", &sun8i_smp_ops);
+
+static void __init sun8i_t113_smp_prepare_cpus(unsigned int max_cpus)
+{
+	struct device_node *node;
+
+	node = of_find_compatible_node(NULL, NULL, "allwinner,sun8i-t113-cpucontrol");
+	if (!node) {
+		pr_err("Missing T113 CPU contrl node in the device tree\n");
+		return;
+	}
+
+	prcm_membase = of_iomap(node, 0);
+	of_node_put(node);
+	if (!prcm_membase) {
+		pr_err("Couldn't map T113 CPU contrl registers\n");
+		return;
+	}
+
+	node = of_find_compatible_node(NULL, NULL,
+				       "allwinner,sun8i-t113-cpuconfig");
+	if (!node) {
+		pr_err("Missing T113 CPU config node in the device tree\n");
+		return;
+	}
+
+	cpucfg_membase = of_iomap(node, 0);
+	of_node_put(node);
+	if (!cpucfg_membase)
+		pr_err("Couldn't map T113 CPU config registers\n");
+}
+
+static int sun8i_t113_smp_boot_secondary(unsigned int cpu,
+				    struct task_struct *idle)
+{
+	u32 reg;
+
+	if (!(prcm_membase && cpucfg_membase))
+		return -EFAULT;
+
+	spin_lock(&cpu_lock);
+
+	/* Set CPU boot address */
+	writel(__pa_symbol(secondary_startup), prcm_membase + T113_CPUCTRL_ENTRY_REG(cpu));
+
+	/* Deassert the CPU core reset */
+	reg = readl(cpucfg_membase + T113_CPUCFG_RST_CTRL_REG);
+	writel(reg | BIT(cpu), cpucfg_membase + T113_CPUCFG_RST_CTRL_REG);
+
+	spin_unlock(&cpu_lock);
+
+	return 0;
+}
+
+static const struct smp_operations sun8i_t113_smp_ops __initconst = {
+	.smp_prepare_cpus	= sun8i_t113_smp_prepare_cpus,
+	.smp_boot_secondary	= sun8i_t113_smp_boot_secondary,
+};
+CPU_METHOD_OF_DECLARE(sun8i_t113_smp, "allwinner,sun8i-t113", &sun8i_t113_smp_ops);

        cpus {
                enable-method = "allwinner,sun8i-t113";
                #address-cells = <1>;
                #size-cells = <0>;

                cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a7","arm,armv7";
                        reg = <0x0>;
                        clocks = <&ccu CLK_CPUX>;
                        clock-frequency = <1200000000>;
                        #cooling-cells = <2>;
                };

                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a7","arm,armv7";
                        reg = <0x1>;
                        clocks = <&ccu CLK_CPUX>;
                        clock-frequency = <1200000000>;
                        #cooling-cells = <2>;
                };
        };

        soc {
                cpuctrl: cpuctrl@7000000 {
                        compatible = "allwinner,sun8i-t113-cpucontrol";
                        reg = <0x07000000 0x1000>;
                };
                cpucfg: cpucfg@9010000 {
                        compatible = "allwinner,sun8i-t113-cpuconfig";
                        reg = <0x09010000 0x100>;
                };
        };