哇酷®开发者社区(WhyCan® Forum)

2 根据荔枝派教程搭建开发环境
链接:荔枝派nano的教程链接
2.1 安装交叉编译工具链
(1)新建一个文件夹存放f1c100s的开发工具
mkdir f1c100s
进入该文件夹
cd f1c100s
(2)获取交叉编译工具链
wget http://releases.linaro.org/components/toolchain/binaries/7.2-2017.11/arm-linux-gnueabi/gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabi.tar.xz
(3)解压
tar -vxJf gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabi.tar.xz
(4)安装
sudo cp -r ./gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabi /opt/
(5)修改环境变量
-->1.安装vim:
sudo apt-get install vim
-->2.使用vim编辑
sudo vim /etc/bash.bashrc
-->3.在文件末尾 添加以下内容:
PATH="$PATH:/opt/gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabi/bin"
-->4.使路径生效
source /etc/bash.bashrc
-->5.测试
arm-linux-gnueabi-gcc -v

最近编辑记录 LinjieGuo (2019-11-03 16:58:33)

4 编译linux内核
4.1 获取linux内核源码
(1)打开链接:https://github.com/Icenowy/linux.git
(2)选择分支:点击Branch->f1c100s-480272
(3)打包下载
(4)传到ubuntu中，解压
unzip f1c100s-480272lcd-test.zip
(5)下载别人配置好的配置文件
http://dl.sipeed.com/LICHEE/Nano/SDK/config
复制下载的文件到linux源码根目录，并改名字为".config"

(6)体验可视化配置
make ARCH=arm menuconfig
(7)编译
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- -j4
-----------------------------------------------
出现错误:
scripts/extract-cert.c:21:10: fatal error: openssl/bio.h: 没有那个文件或目录
安装工具:
sudo apt-get install libssl-dev
-----------------------------------------------
继续编译:
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- -j4
成功编译，生成的 zImage 在 arch ‣ arm ‣ boot 目录下

6 打包出烧写spi flash的bin文件
先将已经被解压过的文件，统统存放在一个文件夹里，防止干扰视线。
mkdir Pack
mv buildroot-2017.08.tar.gz Pack
mv f1c100s-480272lcd-test.zip Pack
mv gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabi.tar.xz Pack
mv uboot.tar Pack
如果想保持官方路线，将当前根据官方操作流程而产生的文件打包，备用
tar -cf UKB.tar buildroot-2017.08 gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabi linux-f1c100s-480272lcd-test u-boot
mv UKB.tar Pack
6.1 修改uboot以适配spi flashd
(1)修改源码
在uboot源码目录下 进入 ./include/configs/，修改 suniv.h

#define CONFIG_BOOTCOMMAND "sf probe 0:50000000; " \
"sf read 0x80C00000 0x100000 0x4000; " \
"sf read 0x80008000 0x110000 0x400000; " \
"bootz 0x80008000 - 0x80C00000"
(2)更改配置
回到 uboot 源码一级目录， 进入TUI配置
make ARCH=arm menuconfig
取消勾选 [] Enable a default value for bootcmd
勾选 [v] Enable boot arguments；
在下方一项中填入 bootargs 参数:
console=ttyS0,115200 panic=5 rootwait root=/dev/mtdblock3 rw rootfstype=jffs2

(3)回到根目录重新编译
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- -j4
6.2 修改dts以适配spi flash
(1)修改源码
修改内核源码目录下的 ./arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
将原来的&spi0{...}替换为:
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins_a>;
status = "okay";
spi-max-frequency = <50000000>;
flash: w25q128@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q128", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

partition@0 {
label = "u-boot";
reg = <0x000000 0x100000>;
read-only;
};

partition@100000 {
label = "dtb";
reg = <0x100000 0x10000>;
read-only;
};

partition@110000 {
label = "kernel";
reg = <0x110000 0x400000>;
read-only;
};

partition@510000 {
label = "rootfs";
reg = <0x510000 0xAF0000>;
};
};
};
};
(2)重新编译设备树
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- dtbs -j4

6.3 修改内核配置

(1)make ARCH=arm menuconfig
(2)勾选 File systems ‣ Miscellaneous filesystems ‣ Journalling Flash File System v2 (JFFS2) support
(3)修改源码下的 ./drivers/mtd/spi-nor.c
vi ./drivers/mtd/spi-nor/spi-nor.c
注释掉以下一行:
//{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
在这一行下面增加一项:
{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, 0) },
(4)重新编译内核
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- -j4

6.4 打包生成用于少些spiflash的bin文件
(1)在f1c100s目录下，新建文件夹rootfs
mkdir rootfs
(2)复制rootfs.tar到rootfs文件夹中
cp buildroot-2017.08/output/images/rootfs.tar rootfs/
(3)解压rootfs目录下的rootfs.tar
cd rootfs
sudo tar -xvf rootfs.tar
(4)删除rootfs.tar
sudo rm rootfs.tar
(5)回到f1c100s目录，编写打包命令
cd ..
vim BuildMyImage.sh
填写如下内容:
#!/bin/sh
dd if=/dev/zero of=f1c100s_spiflash_16M.bin bs=1M count=16 &&\
dd if=u-boot/u-boot-sunxi-with-spl.bin of=f1c100s_spiflash_16M.bin bs=1K conv=notrunc &&\
dd if=linux-f1c100s-480272lcd-test/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dtb of=f1c100s_spiflash_16M.bin bs=1K seek=1024 conv=notrunc &&\
dd if=linux-f1c100s-480272lcd-test/arch/arm/boot/zImage of=f1c100s_spiflash_16M.bin bs=1K seek=1088 conv=notrunc &&\
mkfs.jffs2 -s 0x100 -e 0x10000 --pad=0xAF0000 -d rootfs/ -o rootfs.jffs2 &&\
dd if=rootfs.jffs2 of=f1c100s_spiflash_16M.bin bs=1k seek=5184 conv=notrunc &&\
sync
(6)运行打包脚本
sudo sh BuildMyImage.sh
-----------------------------------------------
提示错误:
BuildMyImage.sh: 6: BuildMyImage.sh: mkfs.jffs2: not found
安装mtd-utils工具:
sudo apt-get install mtd-utils
安装过程中，有可能出现超时情况，多尝试几遍或者更换源试试。
-----------------------------------------------
继续运行打包脚本:
sudo sh BuildMyImage.sh

稍等片刻，打包便能完成。

打包完成后，在当前目录，生成一个名为f1c100s_spiflash_16M.bin的文件。

最近编辑记录 LinjieGuo (2019-11-04 00:55:16)

支持楼主！

好贴， 写得很详细， 适合入门。

linux 内核 make menuconfig 选项 CONFIG_MTD_BLOCK 这个勾选上了吗?

可以直接打开 .config 编辑

编译完毕，打包后烧写bin文件。非常遗憾，结果依旧！

观察.config里的配置项

文件中，可以看出，MTD_BLOCK已经配置为y，但依然没能成功启动。
我怀疑也许是根文件系统配置的问题。夜深了，明日继续。
算了，还是再搞搞把，这么早休息实在没劲，继续折腾。
观察启动log，发现，卡住的地方，有一条记录: #0: Loopback 1
再次进入配置界面:make ARCH=arm menuconfig
Device Drivers --->Block devices --->
[v]Loopback device support，勾选，看到其他有的选项，也勾上吧，相信也无妨，贴图:

保存配置，继续编译。
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- -j4
打包后烧录验证。

最近编辑记录 LinjieGuo (2019-11-04 23:44:30)

楼主加油，正在按前面的教程一步一步来！

可以看出我们没有设置密码，直接输入root即可登陆，回到根目录，可以看到熟悉的根目录文件夹，如下图:

最近编辑记录 LinjieGuo (2019-11-05 22:06:45)

@aaayao 这个文件下载失败: https://cdn.kernel.org/pub/linux/kernel/v4.x/linux-4.12.10.tar.xz

你可以手动下载拷贝到 dl/ 目录。

我这里下载非常的慢

看来真的要试试在VPS上搭开发环境了。

下载了linux-4.12.10.tar.xz，放到dl目录里，现在还一直在编译，不知道还要编译多久？

QT不是需要的，能不能简单说说只编译根文件系统，需要些什么配置？

(3) 测试程序
既然linux已经能跑起来了，我们编写一个hello.c，编译看能否执行。
cd ./rootfs
vi hello.c

#include <stdio.h>

int main(void)
{
printf("hello whycan!\r\n");
return 0;
}

gcc编译:gcc -o hello hello.c
ubuntu中执行:./hello
输出:hello whycan!

编译到目标板:arm-linux-gnueabi-gcc -o Boardhello hello.c

因为现在没又什么方便得调试工具，直接打包进根文件系统。
sudo sh BuildMyImage.sh
烧录到spiflash中。
执行程序Boardhello。提示失败，如下图:

感谢晕哥的指点，我们操作:
../buildroot-2017.08/output/host/bin/arm-linux-gcc -o Boardhello2 hello.c
依然是打包进根文件系统烧录到单板。
执行./Boardhello2程序，观察输出。

显然是成功了！

最近编辑记录 LinjieGuo (2019-11-06 20:30:58)

听说搬瓦工今年双十一没有促销了，真是遗憾，我去年双十一买的vps还有几天就到期了，找了好几天也没找到续费菜单。刚刚给客服发了一个Ticket看看能不能以去年的优惠价续费。

原理如此，多谢提醒。

可以用GitHub Action编译，然后下载最终的固件，超级爽，还不要钱

楼主，你好：
按照你的连接下载的内核源码目录里没有 ./arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts 这个文件啊？

我这个suniv-f1c100s-licheepi-nano.dts没有找到&spi0{...}段落，应该在那个位置加上去呢？

// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
 * Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
 */

/dts-v1/;
#include "suniv-f1c100s.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Lichee Pi Nano";
	compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	panel: panel {
		compatible = "qiaodian,qd43003c0-40", "simple-panel";
		#address-cells = <1>;
		#size-cells = <0>;
		enable-gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>;
		power-supply = <&reg_vcc3v3>;

 		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

 			panel_input: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&tcon0_out_lcd>;
			};
		};
	};

	reg_vcc3v3: vcc3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&be0 {
	status = "okay";
};

&de {
	status = "okay";
};

&tcon0 {
	pinctrl-names = "default";
	pinctrl-0 = <&lcd_rgb666_pins>;
	status = "okay";
};

&tcon0_out {
	tcon0_out_lcd: endpoint@0 {
		reg = <0>;
		remote-endpoint = <&panel_input>;
	};
};

&mmc0 {
	vmmc-supply = <&reg_vcc3v3>;
	bus-width = <4>;
	broken-cd;
	status = "okay";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pe_pins>;
	status = "okay";
};

&otg_sram {
	status = "okay";
};

&usb_otg {
	dr_mode = "otg";
	status = "okay";
};

&usbphy {
	usb0_id_det-gpio = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
	status = "okay";
};

加在下面这个位置，但是编译出错了。

// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
 * Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
 */

/dts-v1/;
#include "suniv-f1c100s.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Lichee Pi Nano";
	compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	panel: panel {
		compatible = "qiaodian,qd43003c0-40", "simple-panel";
		#address-cells = <1>;
		#size-cells = <0>;
		enable-gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>;
		power-supply = <&reg_vcc3v3>;

 		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

 			panel_input: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&tcon0_out_lcd>;
			};
		};
	};

	reg_vcc3v3: vcc3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&be0 {
	status = "okay";
};

&de {
	status = "okay";
};

&tcon0 {
	pinctrl-names = "default";
	pinctrl-0 = <&lcd_rgb666_pins>;
	status = "okay";
};

&tcon0_out {
	tcon0_out_lcd: endpoint@0 {
		reg = <0>;
		remote-endpoint = <&panel_input>;
	};
};

&mmc0 {
	vmmc-supply = <&reg_vcc3v3>;
	bus-width = <4>;
	broken-cd;
	status = "okay";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pe_pins>;
	status = "okay";
};

&otg_sram {
	status = "okay";
};

&usb_otg {
	dr_mode = "otg";
	status = "okay";
};

&spi0 {
    pinctrl-names = "default";
    pinctrl-0 = <&spi0_pins_a>;
    status = "okay";
    spi-max-frequency = <50000000>;
    flash: w25q128@0 {
        #address-cells = <1>;
        #size-cells = <1>;
        compatible = "winbond,w25q128", "jedec,spi-nor";
        reg = <0>;   
        spi-max-frequency = <50000000>;
        partitions {
            compatible = "fixed-partitions";
            #address-cells = <1>;
            #size-cells = <1>;

            partition@0 {
                label = "u-boot";
                reg = <0x000000 0x100000>;
                read-only;
            };

            partition@100000 {
                label = "dtb";
                reg = <0x100000 0x10000>;
                read-only;
            };

            partition@110000 {
                label = "kernel";
                reg = <0x110000 0x400000>;
                read-only;
            };

            partition@510000 {
                label = "rootfs";
                reg = <0x510000 0xAF0000>;
            };
        };
    };
};   

&usbphy {
	usb0_id_det-gpio = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
	status = "okay";
};

检查 "suniv-f1c100s.dtsi" 等包含文件里面有没有关于 spi0 的定义.

谢谢晕哥提醒，原来的这个内核在suniv-f1c100s.dtsi里没有发现SPI0的定义，增加定义后代码如下：

// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
 * Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
 * Copyright 2018 Mesih Kilinc <mesihkilinc@gmail.com>
 */

#include <dt-bindings/clock/suniv-ccu-f1c100s.h>
#include <dt-bindings/reset/suniv-ccu-f1c100s.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&intc>;

	clocks {
		osc24M: clk-24M {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
			clock-output-names = "osc24M";
		};

		osc32k: clk-32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
			clock-output-names = "osc32k";
		};
	};

	cpus {
		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};
	
	de: display-engine {
		compatible = "allwinner,suniv-f1c100s-display-engine";
		allwinner,pipelines = <&fe0>;
		status = "disabled";
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		sram-controller@1c00000 {
			compatible = "allwinner,suniv-f1c100s-system-control",
				     "allwinner,sun4i-a10-system-control";
			reg = <0x01c00000 0x30>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			sram_d: sram@10000 {
				compatible = "mmio-sram";
				reg = <0x00010000 0x1000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x00010000 0x1000>;

				otg_sram: sram-section@0 {
					compatible = "allwinner,suniv-f1c100s-sram-d",
						     "allwinner,sun4i-a10-sram-d";
					reg = <0x0000 0x1000>;
					status = "disabled";
				};
			};
		};

		spi0: spi@1c05000 {
			compatible = "allwinner,suniv-spi",
				     "allwinner,sun8i-h3-spi";
			reg = <0x01c05000 0x1000>;
			interrupts = <10>;
			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_BUS_SPI0>;
			clock-names = "ahb", "mod";
			resets = <&ccu RST_BUS_SPI0>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		spi1: spi@1c06000 {
			compatible = "allwinner,suniv-spi",
				     "allwinner,sun8i-h3-spi";
			reg = <0x01c06000 0x1000>;
			interrupts = <11>;
			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_BUS_SPI1>;
			clock-names = "ahb", "mod";
			resets = <&ccu RST_BUS_SPI1>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};
		tcon0: lcd-controller@1c0c000 {
			compatible = "allwinner,suniv-f1c100s-tcon";
			reg = <0x01c0c000 0x1000>;
			interrupts = <29>;
			clocks = <&ccu CLK_BUS_LCD>,
				 <&ccu CLK_TCON>;
			clock-names = "ahb",
				      "tcon-ch0";
			clock-output-names = "tcon-pixel-clock";
			resets = <&ccu RST_BUS_LCD>;
			reset-names = "lcd";
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				tcon0_in: port@0 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;

					tcon0_in_be0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&be0_out_tcon0>;
					};
				};

				tcon0_out: port@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;
				};
			};
		};

		ccu: clock@1c20000 {
			compatible = "allwinner,suniv-f1c100s-ccu";
			reg = <0x01c20000 0x400>;
			clocks = <&osc24M>, <&osc32k>;
			clock-names = "hosc", "losc";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		intc: interrupt-controller@1c20400 {
			compatible = "allwinner,suniv-f1c100s-ic";
			reg = <0x01c20400 0x400>;
			interrupt-controller;
			#interrupt-cells = <1>;
		};

		pio: pinctrl@1c20800 {
			compatible = "allwinner,suniv-f1c100s-pinctrl";
			reg = <0x01c20800 0x400>;
			interrupts = <38>, <39>, <40>;
			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			interrupt-controller;
			#interrupt-cells = <3>;
			#gpio-cells = <3>;

			uart0_pe_pins: uart0-pe-pins {
				pins = "PE0", "PE1";
				function = "uart0";
			};
			
			lcd_rgb666_pins: lcd-rgb666-pins {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4",
				       "PD5", "PD6", "PD7", "PD8", "PD9",
				       "PD10", "PD11", "PD12", "PD13", "PD14",
				       "PD15", "PD16", "PD17", "PD18", "PD19",
				       "PD20", "PD21";
				function = "lcd";
			};
			
			mmc0_pins: mmc0-pins {
				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				function = "mmc0";
			};
		};

		timer@1c20c00 {
			compatible = "allwinner,suniv-f1c100s-timer";
			reg = <0x01c20c00 0x90>;
			interrupts = <13>;
			clocks = <&osc24M>;
		};

		mmc0: mmc@1c0f000 {
			compatible = "allwinner,suniv-f1c100s-mmc",
				     "allwinner,sun7i-a20-mmc";
			reg = <0x01c0f000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC0>,
				 <&ccu CLK_MMC0>,
				 <&ccu CLK_MMC0_OUTPUT>,
				 <&ccu CLK_MMC0_SAMPLE>;
			clock-names = "ahb",
					      "mmc",
					      "output",
				    	  "sample";
			resets = <&ccu RST_BUS_MMC0>;
			reset-names = "ahb";
			interrupts = <23>;
			pinctrl-names = "default";
			pinctrl-0 = <&mmc0_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		wdt: watchdog@1c20ca0 {
			compatible = "allwinner,suniv-f1c100s-wdt",
				     "allwinner,sun4i-a10-wdt";
			reg = <0x01c20ca0 0x20>;
		};

		uart0: serial@1c25000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c25000 0x400>;
			interrupts = <1>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART0>;
			resets = <&ccu RST_BUS_UART0>;
			status = "disabled";
		};

		uart1: serial@1c25400 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c25400 0x400>;
			interrupts = <2>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART1>;
			resets = <&ccu RST_BUS_UART1>;
			status = "disabled";
		};

		uart2: serial@1c25800 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c25800 0x400>;
			interrupts = <3>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART2>;
			resets = <&ccu RST_BUS_UART2>;
			status = "disabled";
		};
		usb_otg: usb@1c13000 {
			compatible = "allwinner,suniv-musb";
			reg = <0x01c13000 0x0400>;
			clocks = <&ccu CLK_BUS_OTG>;
			resets = <&ccu RST_BUS_OTG>;
			interrupts = <26>;
			interrupt-names = "mc";
			phys = <&usbphy 0>;
			phy-names = "usb";
			extcon = <&usbphy 0>;
			allwinner,sram = <&otg_sram 1>;
			status = "disabled";
		};

		usbphy: phy@1c13400 {
			compatible = "allwinner,suniv-usb-phy";
			reg = <0x01c13400 0x10>;
			reg-names = "phy_ctrl";
			clocks = <&ccu CLK_USB_PHY0>;
			clock-names = "usb0_phy";
			resets = <&ccu RST_USB_PHY0>;
			reset-names = "usb0_reset";
			#phy-cells = <1>;
			status = "disabled";
		};
		fe0: display-frontend@1e00000 {
			compatible = "allwinner,suniv-f1c100s-display-frontend";
			reg = <0x01e00000 0x20000>;
			interrupts = <30>;
			clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>,
				 <&ccu CLK_DRAM_DE_FE>;
			clock-names = "ahb", "mod",
				      "ram";
			resets = <&ccu RST_BUS_DE_FE>;
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				fe0_out: port@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					fe0_out_be0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&be0_in_fe0>;
					};
				};
			};
		};

		be0: display-backend@1e60000 {
			compatible = "allwinner,suniv-f1c100s-display-backend";
			reg = <0x01e60000 0x10000>;
			reg-names = "be";
			interrupts = <31>;
			clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
				 <&ccu CLK_DRAM_DE_BE>;
			clock-names = "ahb", "mod",
				      "ram";
			resets = <&ccu RST_BUS_DE_BE>;
			reset-names = "be";
			assigned-clocks = <&ccu CLK_DE_BE>;
			assigned-clock-rates = <300000000>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				be0_in: port@0 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;

					be0_in_fe0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&fe0_out_be0>;
					};
				};

				be0_out: port@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					be0_out_tcon0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&tcon0_in_be0>;
					};
				};
			};
		};
	};
};

但是编译还是出错：

yaoming@yaoming-VirtualBox:~/f1c100s/linux$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- dtbs -j4
  DTC     arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dtb
arch/arm/boot/dts/suniv-f1c100s.dtsi:74.21-85.5: ERROR (phandle_references): /soc/spi@1c05000: Reference to non-existent node or label "spi0_pins_a"

  also defined at arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts:92.7-132.3
ERROR: Input tree has errors, aborting (use -f to force output)
make[2]: *** [arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dtb] 错误 2
make[1]: *** [dtbs] 错误 2
make: *** [sub-make] 错误 2

谢谢提醒，补上了引脚定义，编译通过了

spi0_pins_a: spi0-pins-pc {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
};

链接：https://pan.baidu.com/s/1j7KIMbqPl8o1zI-VtAu2KQ 提取码：zopc

Zadig显示的USB ID是对的，驱动也装上了

@aaayao 换win7 电脑试一试

如果能正常启动，你这个速度已经超过99%的电脑了

楼主，请问是用25Q128吗？也是用那个16M的烧录程序吗？

这个接USB HUB之后可以读写了，但是写入之后读出来，还是全0? 难道要换个W25Q256吗？

可以烧, 你是不是 spi flash 引脚一直都下拉了?进入FEL 就不能下拉.

8 编译裸机程序
获取大神网友(达克罗德)的项目:
帖子: https://whycan.cn/t_1457.html

8.1 获取裸机工程包
下载: /files/members/729/minimal_f1c100s_framebuffer.zip
上传到ubuntu的f1c100s目录下。
8.2 解压
unzip minimal_f1c100s_framebuffer.zip
8.3 编译
cd minimal_f1c100s
make
产生以下log:
-------------------------------------------------------
book@book-virtual-machine:~/f1c100s/minimal_f1c100s$ make
mkdir -p build/
mkdir -p build/arch/arm32/lib/
mkdir -p build/driver/
mkdir -p build/lib/
mkdir -p build/machine/
CC main.c
arm-eabi-gcc -Imachine/include -Iarch/arm32/include -Idriver/include -Ilib -march=armv5te -mtune=arm926ej-s -mfloat-abi=soft -marm -mno-thumb-interwork -g -ggdb -Wall -O3 -ffreestanding -std=gnu99 -D__ARM32_ARCH__=5 -D__ARM926EJS__ -c -MD -o build/main.o main.c
make: arm-eabi-gcc: Command not found
Makefile:104: recipe for target 'build/main.o' failed
make: *** [build/main.o] Error 127
book@book-virtual-machine:~/f1c100s/minimal_f1c100s$
-------------------------------------------------------
处理方法
(1)安装编译工具
sudo apt-get install gcc-arm-none-eabi
(2)修改Makefile
vi Makefile
修改"CROSS_COMPILE = arm-enbi-" --> "CROSS_COMPILE ?= arm-enbi-"
(3) 再次编译
CROSS_COMPILE=arm-none-eabi- make
看起来编译出bin文件了，但是仍然有提示错误。
-------------------------------------------------------
copy from build/firmware.elf' [elf32-littlearm] to build/firmware.bin' [binary]
Make header information for brom booting
make: execvp: tools/mksunxi/mksunxi: 权限不够
Makefile:73: recipe for target 'build/firmware.bin' failed
make: *** [build/firmware.bin] Error 127
-------------------------------------------------------
既然权限不够，就给他权限:
cd tools/mksunxi
sudo chmod 777 mksunxi
继续编译:
CROSS_COMPILE=arm-none-eabi- make
-------------------------------------------------------
book@book-virtual-machine:~/f1c100s/minimal_f1c100s$ CROSS_COMPILE=arm-none-eabi- make
arm-none-eabi-objcopy -v -O binary build/firmware.elf build/firmware.bin
copy from build/firmware.elf' [elf32-littlearm] to build/firmware.bin' [binary]
Make header information for brom booting
bootloader size= 1800
The bootloader head has been fixed
-------------------------------------------------------
8.4 烧写验证

我这里用的是winband 25Q128JV50，容量为16MB，应该跟flash无关，淘宝随便买两片，容量一样即可。

我的也是在淘宝是购买的，型号和楼主的一样。
楼主你这个能正常启动的NANO板子，只插上USB到电脑，电脑会识别成FEL模式吗？不短接FLASH引脚的情况下。

整到无办法了，能读写，但是读出来全是0。

现在只能试试在LINUX下面烧写。

最近编辑记录 aaayao (2019-11-11 15:10:38)

楼主，你的是NANO板子吗？FLASH是买回来就焊好的吗？

我这个是买回来要自己焊的FLASH，不知道硬件上会不会有问题？

晕哥，刚刚拍了一套，等收到看看是不是硬件的问题了。

能重新打包一个放上来吗，完整能路起来的

可以的，我晚点就打包整个虚拟机上来，要过2天，到时候我上传到百度云吧。

原来的板子果然是有问题，现在新的板子可以读写，终于能见到串口启到到U-BOOT了，但是卡在最前面。

换回W25Q128，启动终于成成了！

配置好的VM虚拟机Ubuntu系统 链接：https://pan.baidu.com/s/17vk0_QWRNRuxwi5EZ_P-Xg 提取码：54pb

我已经按照LinjieGuo的挖坑步骤 走到烧录这一步了，已经生成f1c100s_spiflash_16M.bin 但是卡壳在如何通过sunxi-fel 烧录了。恳请大家指点帮忙

最近编辑记录 ned (2019-11-19 16:09:51)

测试了 ./sunxi-fel -p spiflash-info指令：

好像是有返回的

嗯嗯 感谢晕哥！刚刚我也使用这个指令烧录成功了！复位看一下控制台 哈哈

嗯，LCD已经驱动了。

你的 bootargs 是什么? root=???

uboot启动时，输入print命令查看打印：

Hit any key to stop autoboot: 0
=>
=>
=>
=>
=> printf
Unknown command 'printf' - try 'help'
=> print
arch=arm
baudrate=115200
board=sunxi
board_name=sunxi
boot_a_script=load ${devtype} ${devnum}:${distro_bootpart} ${scriptaddr} ${prefix}${script}; source ${scriptaddr}
boot_efi_binary=if fdt addr ${fdt_addr_r}; then bootefi bootmgr ${fdt_addr_r};else bootefi bootmgr ${fdtcontroladdr};fi;load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} efi/boot/bootarm.efi; if fdt addr ${fdt_addr_r}; then bootefi ${kernel_addr_r} ${fdt_addr_r};else bootefi ${kernel_addr_r} ${fdtcontroladdr};fi
boot_extlinux=sysboot ${devtype} ${devnum}:${distro_bootpart} any ${scriptaddr} ${prefix}extlinux/extlinux.conf
boot_net_usb_start=usb start
boot_prefixes=/ /boot/
boot_script_dhcp=boot.scr.uimg
boot_scripts=boot.scr.uimg boot.scr
boot_targets=fel mmc0 usb0 pxe dhcp
bootcmd=sf probe 0 50000000; sf read 0x80C00000 0x100000 0x4000; sf read 0x80008000 0x110000 0x400000; bootz 0x80008000 - 0x80C00000
bootcmd_dhcp=run boot_net_usb_start; if dhcp ${scriptaddr} ${boot_script_dhcp}; then source ${scriptaddr}; fi;setenv efi_fdtfile ${fdtfile}; if test -z "${fdtfile}" -a -n "${soc}"; then setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; fi; setenv efi_old_vci ${bootp_vci};setenv efi_old_arch ${bootp_arch};setenv bootp_vci PXEClient:Arch:00010:UNDI:003000;setenv bootp_arch 0xa;if dhcp ${kernel_addr_r}; then tftpboot ${fdt_addr_r} dtb/${efi_fdtfile};if fdt addr ${fdt_addr_r}; then bootefi ${kernel_addr_r} ${fdt_addr_r}; else bootefi ${kernel_addr_r} ${fdtcontroladdr};fi;fi;setenv bootp_vci ${efi_old_vci};setenv bootp_arch ${efi_old_arch};setenv efi_fdtfile;setenv efi_old_arch;setenv efi_old_vci;
bootcmd_fel=if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then echo '(FEL boot)'; source ${fel_scriptaddr}; fi
bootcmd_mmc0=setenv devnum 0; run mmc_boot
bootcmd_pxe=run boot_net_usb_start; dhcp; if pxe get; then pxe boot; fi
bootcmd_usb0=setenv devnum 0; run usb_boot
bootdelay=2
bootm_size=0x1700000
console=ttyS0,115200
cpu=arm926ejs
dfu_alt_info_ram=kernel ram 0x80500000 0x1000000;fdt ram 0x80C00000 0x100000;ramdisk ram 0x80D50000 0x4000000
distro_bootcmd=for target in ${boot_targets}; do run bootcmd_${target}; done
efi_dtb_prefixes=/ /dtb/ /dtb/current/
fdt_addr_r=0x80C00000
fdtcontroladdr=83e6ada8
fdtfile=suniv-f1c100s-licheepi-nano.dtb
fel_booted=1
kernel_addr_r=0x80500000
load_efi_dtb=load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} ${prefix}${efi_fdtfile}
mmc_boot=if mmc dev ${devnum}; then setenv devtype mmc; run scan_dev_for_boot_part; fi
partitions=name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};name=loader2,size=984k,uuid=${uuid_gpt_loader2};name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};name=system,size=-,uuid=${uuid_gpt_system};
preboot=usb start
pxefile_addr_r=0x80D00000
ramdisk_addr_r=0x80D50000
scan_dev_for_boot=echo Scanning ${devtype} ${devnum}:${distro_bootpart}...; for prefix in ${boot_prefixes}; do run scan_dev_for_extlinux; run scan_dev_for_scripts; done;run scan_dev_for_efi;
scan_dev_for_boot_part=part list ${devtype} ${devnum} -bootable devplist; env exists devplist || setenv devplist 1; for distro_bootpart in ${devplist}; do if fstype ${devtype} ${devnum}:${distro_bootpart} bootfstype; then run scan_dev_for_boot; fi; done
scan_dev_for_efi=setenv efi_fdtfile ${fdtfile}; if test -z "${fdtfile}" -a -n "${soc}"; then setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; fi; for prefix in ${efi_dtb_prefixes}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${efi_fdtfile}; then run load_efi_dtb; fi;done;if test -e ${devtype} ${devnum}:${distro_bootpart} efi/boot/bootarm.efi; then echo Found EFI removable media binary efi/boot/bootarm.efi; run boot_efi_binary; echo EFI LOAD FAILED: continuing...; fi; setenv efi_fdtfile
scan_dev_for_extlinux=if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}extlinux/extlinux.conf; then echo Found ${prefix}extlinux/extlinux.conf; run boot_extlinux; echo SCRIPT FAILED: continuing...; fi
scan_dev_for_scripts=for script in ${boot_scripts}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${script}; then echo Found U-Boot script ${prefix}${script}; run boot_a_script; echo SCRIPT FAILED: continuing...; fi; done
scriptaddr=0x80C50000
soc=sunxi
stderr=serial@1c25000
stdin=serial@1c25000
stdout=serial@1c25000
usb_boot=usb start; if usb dev ${devnum}; then setenv devtype usb; run scan_dev_for_boot_part; fi
uuid_gpt_esp=c12a7328-f81f-11d2-ba4b-00a0c93ec93b
uuid_gpt_system=69dad710-2ce4-4e3c-b16c-21a1d49abed3

Environment size: 4560/32764 bytes
=>

全部重新来一次，又可以启动了，之前那个错误应该是JFFS2文件系统加载失败。

这次是把内核换成5.2，修改还是成功的

linux里面的 dts 还要改一次, 关于 lcd 部分的.

https://whycan.cn/t_3281.html#p28440

有这个功能， 但是会比较难用, 首先点 订阅该主题

然后就在你的订阅夹里面: https://whycan.cn/search.php?action=show_subscriptions&user_id=338

根文件系统出错了，init进程执行出错。

果然是根文件系统的选项有关。

是有线以太网?

这个要取决你是开发的时候临时传文件， 还是产品需要联网，

如果临时传文件可以用 adbd 方式解决，

如果产品需要联网， 不建议用 f1c100s,

加了网卡之后， 价格与 V3s 相差无几。

wifi 不差钱可以用台湾正基的 AP62xx 模组， 软硬件稳定性都比较好。

AP62XX 在很早已经 Linux 自带驱动了。配置一下即可。

不好意思，那时候还不知道怎么上图，/捂脸

非常感谢楼主，可是这个ubuntu密码多少呀？快哭了

稍等，我看看。密码可能被我改成linjie了。你输入"linjie"，然后回车看看。

最近编辑记录 LinjieGuo (2020-01-02 14:49:00)

嗯嗯，实在不好意思，因为帖子发出来一阵子之后，无法修改了。

你这话说得，谢谢大佬了

adb真香: https://whycan.cn/t_3206.html

baidu站内搜: https://www.baidu.com/s?wd=adb%20site%3Awhycan.cn

$ ls -lh output/images/
total 95M
-rw-r--r-- 1 ted ted 95M 1月 6 02:41 rootfs.tar

大神指点一下，为什么我编出来的根文件系统有 95MB？
我是想烧录到16MB spiflash，解压出来发现 gdb 和 mplayer 占了几十M；
.config文件

最近编辑记录 xiao.huang (2020-01-06 03:03:12)

可能我在写帖子时，忽略了一些东西取消了某些选项，晚点传配置文件上来

这个就是 buildroot 下的 .config 了

感谢@LinjieGuo
下载最新的 buildroot-2019.02.8，然后重新按上述配置就没有问题，rootfs 编出来 2MB，已经能启动到 shell 了；
接下来在想 f1c200s 能做什么呢

感觉F1C100S 的 SPI FLASH 要搞出来，坑还真不少。 谢谢提供那么详细的记录，给我们有好的参考。

很完整详细，谢谢！

首先谢谢大佬的分享。本人萌新刚刚接触这个行业，按照楼主大佬的操作步骤走到创建分支的一步了，但是输入git branch -a的时候显示不出分支，然后输入git checkout nano-v2018.01的时候出现error: pathspec 'nano-v2018.01' did not match any file(s) known to git，本人用的是f1c100s直接连上屏幕。

好贴， 写得很详细， 适合入门。

再执行: git pull origin nano-v2018.01

估计是widora 那个加速器不支持拉取分支。

感谢大神分享，入坑F1C指南

恐怕让您失望了，我也不知道这是什么情况！/无奈

你去打开Makefile文件,看看1148行驶什么内容呢

感谢LinjieGuo分享，我是一个超级新手，以前全在windows上开发没怎么接触linux，最近画了个F1c200s想跟下linux，刚好过来跟楼主学一学。弄了两天终于把U-boot、linux-f1c100s-480272lcd-test和buildroot-2017.08三个编译完成。我PCB板上用的是32M的（w25q32），想问一下是不是把suniv-f1c100s-licheepi-nano.dts里配置为w25q32重新编译就可以？

麻烦请问，更新了dts之后，使用make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- dtbs -j4
始终无法在arch/arm/boot/dts/下生成suniv-f1c100s-licheepi-nano.dts

为了保证dts是新生成的，我将旧的suniv-f1c100s-licheepi-nano.dts删除了，使用make命令再也无法生成dts了。
折腾了两天了，感谢大神帮助。

感谢。这个是我现在运行的截屏和测试结果。

这个是我现在正在使用的dts文件：
suniv.zip

这个是我按照楼主做的16MB镜像启动的串口界面，在修改dtb的时候出现错误。

最近编辑记录 willX (2020-03-25 22:20:22)

多谢晕哥，我用的是widora的tiny200板。
通过不断的重测，原来是kernel下的.config文件闹出的问题，而且还有一个，我自作主张把ARCH和CROSS_COMPILE
放到编译系统的环境变量里了，我发现这样经常出问题。
反而是老老实实的写make命令，make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- -j4这样，倒是一点毛病没有了。
不知道是不是我的Ubuntu环境问题，又或者是我在使用menuconfig时有差异。

总之，板子现在已经跑起来了，非常感谢晕哥和楼主的大力支持。严格按照楼主操作是可以编译出能用的镜像来的。非常赞！

这个是我的串口日志：
none.txt

这个是我在用的镜像：16MB
f1c100s_spiflash_16M.zip

最近编辑记录 willX (2020-03-27 00:50:06)

a) 打开 ~/buildroot/buildroot-2017.08/.config 文件， 把里面的 QT/MPLAYER 等相关行删掉，

b) make menuconfig 里面把 Qt/mplayer 相关软件包删除

上面两步操作等效。

然后按这个操作重新做一次即可: https://whycan.cn/t_3781.html#p36600

兄弟，你这ID很狂啊

按照操作短接了1 4脚 怎么找不到设备呀 上电的时候看设备管理器也不会刷新 是不是硬件有问题

我短接了14脚上电后在zadig上面检测到的是未知USB设备（设备描述符请求失败） 大哥你知道这是什么原因不

谢谢楼主分享 我去试试

按照步骤试了 还是不行

这是win10 吗，感觉你好像也选错usb设备了。

我也想玩F1C100S了，正在找相关原理图看看怎么设计，支持楼主