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#1 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2024-03-28 17:40:13
juicevm的源代码真的没时间整理了。不嫌乱的话可以投票是否开源。
新项目，不过也是不怎么更新，但是开源： https://juicescript.com/
#3 Re: Cortex M0/M3/M4/M7 » 自制pico，rp2040烧录固件后么有正常启动 » 2023-11-06 11:53:43
擦除flash的固件： https://wws.lanzoui.com/ibwcRuo4hqb
ref: https://zhuanlan.zhihu.com/p/415306379
侵权的话叫晕哥来删。逃~
#5 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 单片机有8个信号输入，想通过上位机配置这8个信号与、或操作，该如何实现？ » 2023-10-20 17:12:07
啥也不想说，直接看代码
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
// str: x1&&(x2||x3)&&(x4||x5)
// planA
// ra0 = X3 || X2
// ra1 = ra0 && x1
// ra0 = x4 || x5
// ra1 = ra0 && ra1
// planB
// ra0 = X3 || X2
// ra1 = x4 || x5
// ra0 = ra0 && ra1
// ra0 = ra0 && x1
/*
x1&&(x2||(x3&&x4))&&(x5||x6)
ra1= x3 && x4
ra0=ra1 || x2
ra1= x5 || x6
ra0=ra1 && ra0
ra0=ra0 && x1
X1
X2
X3
POP -> X3
POP -> X2
X1
ra0
X5
POP -> X5
X1
ra0
I_LOAD X1
I_PUSH
I_LOAD X2
I_PUSH
I_LOAD X3
I_PUSH
I_LOAD X4
I_AND1
ra1 = x3 && x4
I_OR1
ra0 = ra1 || x2
I_PUSH
I_LOAD X5
I_PUSH
I_LOAD X6
I_OR1
ra1 = X5 || x6
I_AND1
ra0 = ra1 && ra0
I_AND1
ra0=ra0 && X1
I_PUSH
*/
#define is_letter(c) ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z'))
#define is_num(c) (c >= '0' && c <= '9')
#define is_id(c) (is_letter(c) || )
enum{
STA_IDLE,
STA_ID,
STA_AND,
STA_OR,
STA_LPAR,
STA_RPAR,
STA_EOL,
}sta;
enum{
I_PUSH,
// I_POP,
I_ENTER,
I_EXIT,
I_LOAD_A0,
I_LOAD_A1,
I_AND1_A0,
I_AND1_A1,
I_OR1_A0,
I_OR1_A1,
I_AND2_RA0_X_X,
I_AND2_RA0_RA0_X,
I_AND2_RA0_RA1_X,
I_AND2_RA0_RA1_RA0,
I_AND2_RA0_RA0_RA1,
// I_AND2_RA0_RA1_RA1,
I_AND2_RA1_X_X,
I_AND2_RA1_RA0_X,
I_AND2_RA1_RA1_X,
I_AND2_RA1_RA1_RA0,
// I_AND2_RA1_RA0_RA1,
I_OR2_RA0_X_X,
I_OR2_RA0_RA0_X,
I_OR2_RA0_RA1_X,
I_OR2_RA0_RA1_RA0,
I_OR2_RA0_RA0_RA1,
// I_OR2_RA0_RA1_RA1,
I_OR2_RA1_X_X,
I_OR2_RA1_RA0_X,
I_OR2_RA1_RA1_X,
I_OR2_RA1_RA1_RA0,
I_OR2_RA1_RA0_RA1,
// I_OR2_RA1_RA1_RA1,
I_UIMP, // end
};
struct {
int t;
int i;
} lex_list[1024];
union{
uint32_t code;
struct{
unsigned char op;
unsigned char a0;
unsigned char a1;
}i;
}code_list[100];
union{
uint32_t code;
struct{
unsigned char op;
unsigned char a0;
unsigned char a1;
}i;
}opt_code_list[100];
int lex_list_i;
int code_list_i;
int opt_code_list_i;
int g_parse_i;
static void parse(void);
static void opt(int lev,int ra_i,int init);
static void prt(int lev,int ra_i);
static int vm(void);
int main(int argc,const char** argv){
int c;
uint32_t id;
int res = 0;
int size = 1024;
char* buff = (char*)malloc(size);
int tmp_c_i = 0;
lex_list_i = 0;
code_list_i = 0;
sta = STA_IDLE;
if(NULL == fgets(buff,size,stdin)){
return 0;
}
// sprintf(buff,"x1&&(x2||(x3&&x4))&&(x5||x6)\n");
printf("str: %s\n",buff);
// buff[strlen(buff)] = '\n';
while(tmp_c_i <= strlen(buff)){
c = buff[tmp_c_i];
tmp_c_i++;
// printf("c: %c(0x%x) sta: %d\n",c,c,sta);
// printf("c: %c(0x%x) sta: %d\n",c,c,sta);
retry:
if(c == '\r' || c == ' ' || c == '\t'){continue;}
switch(sta){
case STA_IDLE:
id = 0;
// if(is_letter(c)){
if(c == 'x'){
// id = c;
sta = STA_ID;
// }else if(is_num(c)){
// id = c;
// sta = STA_ID;
}else if(c == '&'){
sta = STA_AND;
}else if(c == '|'){
sta = STA_OR;
}else if(c == '('){
lex_list[lex_list_i].t = STA_LPAR;
lex_list[lex_list_i].i = 0;
lex_list_i++;
}else if(c == ')'){
lex_list[lex_list_i].t = STA_RPAR;
lex_list[lex_list_i].i = 0;
lex_list_i++;
}else if(c == '\n'){
goto input_ok;
}else{
// error
}
break;
case STA_ID:
// if(is_id(c)){
if(is_num(c)){
id = id * 10 + c - '0';
}else{
printf("sta: STA_ID lex_list_i: %d id: %d\n",lex_list_i,id);
lex_list[lex_list_i].t = STA_ID;
lex_list[lex_list_i].i = id;
lex_list_i++;
sta = STA_IDLE;
goto retry;
}
break;
case STA_AND:
if(c == '&'){
printf("sta: STA_AND\n");
lex_list[lex_list_i].t = STA_AND;
lex_list[lex_list_i].i = 0;
lex_list_i++;
sta = STA_IDLE;
}else{
// error
}
break;
case STA_OR:
if(c == '|'){
// printf("sta: STA_OR\n");
lex_list[lex_list_i].t = STA_OR;
lex_list[lex_list_i].i = 0;
lex_list_i++;
sta = STA_IDLE;
}else{
// error
}
break;
default:
break;
}
// refresh();
}
input_ok:
free(buff);
printf("parse lex_list_i:%d\n",lex_list_i);
g_parse_i = 0;
if(lex_list_i <= 0){
// error
return -1;
}
lex_list[lex_list_i].t = STA_EOL;
lex_list[lex_list_i].i = 0;
lex_list_i++;
printf("=parse==================================================================================\n");
parse();
printf("=prt==================================================================================\n");
prt(0,0);
// return 0;
printf("opt code_list_i:%d\n",code_list_i);
printf("=opt==================================================================================\n");
opt(0,0,1);
opt_code_list[opt_code_list_i].i.op = I_UIMP;
printf("set opt_code_list[%d] to I_UIMP\n",opt_code_list_i);
opt_code_list_i++;
printf("=vm==================================================================================\n");
res = vm();
printf("return %d\n",res);
// while(1);
return 0;
}
static void parse(void){
static int s_lpar_cnt = 0;
// printf("parse g_parse_i:%d lex_list[g_parse_i].t:%d lex_list_i: %d code_list_i:%d\n",g_parse_i,lex_list[g_parse_i].t,lex_list_i,code_list_i);
// refresh();
if(g_parse_i > lex_list_i){
return;
}
if(lex_list[g_parse_i].t == STA_EOL){
// printf("parse g_parse_i:%d lex_list[g_parse_i].t == STA_EOL code_list_i:%d\n",g_parse_i,code_list_i);
return;
}
if(lex_list[g_parse_i].t == STA_ID){
// printf("parse g_parse_i:%d lex_list[g_parse_i].t == STA_ID code_list_i:%d lex_list[g_parse_i].i:%d\n",g_parse_i,code_list_i,lex_list[g_parse_i].i);
// refresh();
code_list[code_list_i].i.op = I_LOAD_A0;
code_list[code_list_i].i.a0 = lex_list[g_parse_i].i;
code_list_i++;
g_parse_i++;
}else if(lex_list[g_parse_i].t == STA_AND){
// printf("parse g_parse_i:%d lex_list[g_parse_i].t == STA_AND code_list_i:%d\n",g_parse_i,code_list_i);
// refresh();
code_list[code_list_i].i.op = I_PUSH;
code_list_i++;
g_parse_i++;
parse();
// printf("parse g_parse_i:%d lex_list[g_parse_i].t == I_AND1 code_list_i:%d\n",g_parse_i,code_list_i);
code_list[code_list_i].i.op = I_AND1_A0;
code_list_i++;
}else if(lex_list[g_parse_i].t == STA_OR){
// printf("parse g_parse_i:%d lex_list[g_parse_i].t == STA_OR\n",g_parse_i);
// refresh();
code_list[code_list_i].i.op = I_PUSH;
code_list_i++;
g_parse_i++;
parse();
code_list[code_list_i].i.op = I_OR1_A0;
code_list_i++;
}else if(lex_list[g_parse_i].t == STA_LPAR){
// printf("parse g_parse_i:%d lex_list[g_parse_i].t == STA_LPAR\n",g_parse_i);
// refresh();
// code_list[code_list_i].i.op = I_PUSH;
// code_list_i++;
code_list[code_list_i].i.op = I_ENTER;
code_list_i++;
g_parse_i++;
s_lpar_cnt++;
parse();
if(lex_list[g_parse_i].t != STA_RPAR){
// error
}
code_list[code_list_i].i.op = I_EXIT;
code_list_i++;
return;
}else if(lex_list[g_parse_i].t == STA_RPAR){
// printf("parse g_parse_i:%d lex_list[g_parse_i].t == STA_RPAR\n",g_parse_i);
// refresh();
if(s_lpar_cnt == 0){
// error
}
s_lpar_cnt--;
// code_list[code_list_i].i.op = I_POP;
// code_list_i++;
g_parse_i++;
return;
}else{
// error
}
parse();
}
static void prt(int lev,int ra_i){
static int pc = 0;
while(1){
// printf("opt pc:%d code_list[pc].i.op: %d code_list_i: %d\n",pc,code_list[pc].i.op,code_list_i);
// refresh();
if(pc > code_list_i){
return;
}
switch(code_list[pc].i.op){
case I_PUSH:
printf("I_PUSH\n");
break;
// case I_ENTER:
// printf("I_ENTER\n");
// break;
// case I_EXIT:
// printf("I_EXIT\n");
// // return;
// break;
case I_LOAD_A0:
printf("I_LOAD X%d\n",code_list[pc].i.a0);
break;
case I_AND1_A0:
printf("I_AND1\n");
break;
case I_OR1_A0:
printf("I_OR1\n");
break;
// case I_AND2:
// break;
// case I_OR2:
// break;
case I_UIMP:
return;
break;
default:
break;
}
pc++;
}
}
static void opt(int lev,int ra_i,int init){
static int pc = 0;
static struct{
unsigned char is_ra;
unsigned char a0;
} stack[100],cur_ra={1,0};
static int ra0_isused=0;
static int ra1_isused=0;
static int stack_pos_start = (sizeof(stack)/sizeof(stack[0]));
static int stack_pos_i = (sizeof(stack)/sizeof(stack[0]));
if(init){
ra0_isused=0;
ra1_isused=0;
stack_pos_start = (sizeof(stack)/sizeof(stack[0]));
stack_pos_i = (sizeof(stack)/sizeof(stack[0]));
cur_ra.is_ra = 1;
cur_ra.a0 = 0;
opt_code_list_i = 0;
}
// cur_ra.is_ra = 1;
while(1){
// printf("opt ra0_isused: %d ra1_isused: %d stack_pos_start: %d stack_pos_i: %d\n",ra0_isused,ra1_isused,stack_pos_start,stack_pos_i);
// printf("opt pc:%d code_list[pc].i.op: %d code_list_i: %d\n",pc,code_list[pc].i.op,code_list_i);
if(pc > code_list_i){
return;
}
switch(code_list[pc].i.op){
case I_PUSH:
// printf("I_PUSH is_ra: %d a0: %d\n",cur_ra.is_ra,cur_ra.a0);
stack[stack_pos_i].is_ra = cur_ra.is_ra;
stack[stack_pos_i].a0 = cur_ra.a0;
stack_pos_i--;
break;
case I_ENTER:
// printf("I_ENTER ra0_isused: %d ra1_isused: %d\n",ra0_isused,ra1_isused);
pc++;
if(ra0_isused == 0){
ra0_isused=1;
ra1_isused=0;
opt(lev+1,0,0);
}else if(ra0_isused == 1){
ra0_isused=1;
ra1_isused=1;
opt(lev+1,1,0);
}else if(ra1_isused == 1){
printf("ra1_isused == 1\n");exit(-1);
}else{
printf("ra0_isused: %d ra1_isused: %d\n",ra0_isused,ra1_isused);exit(-1);
}
break;
case I_EXIT:
// printf("I_EXIT\n");
// stack_pos_i++;
// printf("I_EXIT is_ra:%d a0:%d\n",stack[stack_pos_i].is_ra,stack[stack_pos_i].a0);
// cur_ra.is_ra = stack[stack_pos_i].is_ra;
// cur_ra.a0 = stack[stack_pos_i].a0;
return;
break;
case I_LOAD_A0:
// printf("I_LOAD X%d\n",code_list[pc].i.a0);
cur_ra.is_ra = 0;
cur_ra.a0 = code_list[pc].i.a0;
break;
case I_AND1_A0:
stack_pos_i++;
// printf("I_AND1 cur_ra.is_ra: %d cur_ra.a0: %d stack_pos_i: %d stack[stack_pos_i].is_ra: %d\n",cur_ra.is_ra,cur_ra.a0,stack_pos_i,stack[stack_pos_i].is_ra);
if(cur_ra.is_ra == 0 && stack[stack_pos_i].is_ra == 0){
// a0 && a1
if(ra_i == 0){
opt_code_list[opt_code_list_i].i.op = I_AND2_RA0_X_X;
opt_code_list[opt_code_list_i].i.a0 = cur_ra.a0;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra0 = X%d && X%d\n",cur_ra.a0,stack[stack_pos_i].a0);
} else if(ra_i == 1){
opt_code_list[opt_code_list_i].i.op = I_AND2_RA1_X_X;
opt_code_list[opt_code_list_i].i.a0 = cur_ra.a0;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra1 = X%d && X%d\n",cur_ra.a0,stack[stack_pos_i].a0);
}
opt_code_list_i++;
}else if(cur_ra.is_ra == 1 && stack[stack_pos_i].is_ra == 0){
if(ra_i == 0){
if(cur_ra.a0 == 0){
opt_code_list[opt_code_list_i].i.op = I_AND2_RA0_RA0_X;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra0 = ra0 && X%d\n",stack[stack_pos_i].a0);
}else if(cur_ra.a0 == 1){
opt_code_list[opt_code_list_i].i.op = I_AND2_RA0_RA1_X;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra0 = ra1 && X%d\n",stack[stack_pos_i].a0);
}
} else if(ra_i == 1){
if(cur_ra.a0 == 0){
opt_code_list[opt_code_list_i].i.op = I_AND2_RA1_RA0_X;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra1 = ra0 && X%d\n",stack[stack_pos_i].a0);
}else if(cur_ra.a0 == 1){
opt_code_list[opt_code_list_i].i.op = I_AND2_RA1_RA1_X;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra1 = ra1 && X%d\n",stack[stack_pos_i].a0);
}
}
opt_code_list_i++;
}else if(cur_ra.is_ra == 1 && stack[stack_pos_i].is_ra == 1){
if(ra_i == 0){
if(cur_ra.a0 == 0){
if(stack[stack_pos_i].a0 == 0){
// opt_code_list[opt_code_list_i].i.op = I_AND2_RA0_RA0_RA0;
printf("ra0 = ra0 && ra0\n");exit(-1);
}else if(stack[stack_pos_i].a0 == 1){
opt_code_list[opt_code_list_i].i.op = I_AND2_RA0_RA0_RA1;
}
printf("ra0 = ra0 && ra%d\n",stack[stack_pos_i].a0);
}else if(cur_ra.a0 == 1){
if(stack[stack_pos_i].a0 == 1){
// opt_code_list[opt_code_list_i].i.op = I_AND2_RA0_RA0_RA0;
printf("ra0 = ra1 && ra1\n");exit(-1);
}else if(stack[stack_pos_i].a0 == 0){
opt_code_list[opt_code_list_i].i.op = I_AND2_RA0_RA1_RA0;
}
printf("ra0 = ra1 && ra%d\n",stack[stack_pos_i].a0);
}
opt_code_list_i++;
} else if(ra_i == 1){
if(cur_ra.a0 == 0){
opt_code_list[opt_code_list_i].i.op = I_AND2_RA1_RA0_X;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra1 = ra0 && X%d\n",stack[stack_pos_i].a0);
}else if(cur_ra.a0 == 1){
opt_code_list[opt_code_list_i].i.op = I_AND2_RA1_RA1_X;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra1 = ra1 && X%d\n",stack[stack_pos_i].a0);
}
opt_code_list_i++;
}
}
cur_ra.is_ra = 1;
cur_ra.a0 = ra_i;
break;
case I_OR1_A0:
stack_pos_i++;
// printf("I_OR1 cur_ra.is_ra: %d cur_ra.a0: %d stack_pos_i: %d stack[stack_pos_i].is_ra: %d\n",cur_ra.is_ra,cur_ra.a0,stack_pos_i,stack[stack_pos_i].is_ra);
if(cur_ra.is_ra == 0 && stack[stack_pos_i].is_ra == 0){
// a0 || a1
if(ra_i == 0){
opt_code_list[opt_code_list_i].i.op = I_OR2_RA0_X_X;
opt_code_list[opt_code_list_i].i.a0 = cur_ra.a0;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra0 = X%d || X%d\n",cur_ra.a0,stack[stack_pos_i].a0);
} else if(ra_i == 1){
opt_code_list[opt_code_list_i].i.op = I_OR2_RA1_X_X;
opt_code_list[opt_code_list_i].i.a0 = cur_ra.a0;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra1 = X%d || X%d\n",cur_ra.a0,stack[stack_pos_i].a0);
}
opt_code_list_i++;
}else if(cur_ra.is_ra == 1 && stack[stack_pos_i].is_ra == 0){
if(ra_i == 0){
if(cur_ra.a0 == 0){
opt_code_list[opt_code_list_i].i.op = I_OR2_RA0_RA0_X;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra0 = ra0 || X%d\n",stack[stack_pos_i].a0);
}else if(cur_ra.a0 == 1){
opt_code_list[opt_code_list_i].i.op = I_OR2_RA0_RA1_X;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra0 = ra1 || X%d\n",stack[stack_pos_i].a0);
}
opt_code_list_i++;
} else if(ra_i == 1){
if(cur_ra.a0 == 0){
opt_code_list[opt_code_list_i].i.op = I_OR2_RA1_RA0_X;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra1 = ra0 || X%d\n",stack[stack_pos_i].a0);
}else if(cur_ra.a0 == 1){
opt_code_list[opt_code_list_i].i.op = I_OR2_RA1_RA1_X;
opt_code_list[opt_code_list_i].i.a1 = stack[stack_pos_i].a0;
printf("ra1 = ra1 || X%d\n",stack[stack_pos_i].a0);
}
opt_code_list_i++;
}
}else if(cur_ra.is_ra == 1 && stack[stack_pos_i].is_ra == 1){
if(ra_i == 0){
if(cur_ra.a0 == 0){
if(stack[stack_pos_i].a0 == 0){
// opt_code_list[opt_code_list_i].i.op = I_OR2_RA0_RA0_RA0;
printf("ra0 = ra0 || ra0\n");exit(-1);
}else if(stack[stack_pos_i].a0 == 1){
opt_code_list[opt_code_list_i].i.op = I_OR2_RA0_RA0_RA1;
}
printf("ra0 = ra0 || ra%d\n",stack[stack_pos_i].a0);
}else if(cur_ra.a0 == 1){
if(stack[stack_pos_i].a0 == 1){
// opt_code_list[opt_code_list_i].i.op = I_OR2_RA0_RA1_RA1;
printf("ra0 = ra1 || ra1\n");exit(-1);
}else if(stack[stack_pos_i].a0 == 0){
opt_code_list[opt_code_list_i].i.op = I_OR2_RA0_RA1_RA0;
}
printf("ra0 = ra1 || ra%d\n",stack[stack_pos_i].a0);
}
opt_code_list_i++;
} else if(ra_i == 1){
if(cur_ra.a0 == 0){
if(stack[stack_pos_i].a0 == 0){
// opt_code_list[opt_code_list_i].i.op = I_OR2_RA1_RA0_RA0;
printf("ra1 = ra0 || ra0\n");exit(-1);
}else if(stack[stack_pos_i].a0 == 1){
opt_code_list[opt_code_list_i].i.op = I_OR2_RA1_RA0_RA1;
}
printf("ra1 = ra0 || ra%d\n",stack[stack_pos_i].a0);
}else if(cur_ra.a0 == 1){
if(stack[stack_pos_i].a0 == 1){
// opt_code_list[opt_code_list_i].i.op = I_OR2_RA1_RA0_RA0;
printf("ra1 = ra1 || ra1\n");exit(-1);
}else if(stack[stack_pos_i].a0 == 0){
opt_code_list[opt_code_list_i].i.op = I_OR2_RA1_RA1_RA0;
}
printf("ra1 = ra1 || ra%d\n",stack[stack_pos_i].a0);
}
opt_code_list_i++;
}
}
cur_ra.is_ra = 1;
cur_ra.a0 = ra_i;
break;
case I_UIMP:
return;
break;
default:
break;
}
pc++;
}
}
// 只有vm需要存放在单片机里，只需要把opt_code_list数组从上位机传输到单片机里，vm函数只依赖opt_code_list数组。
static int vm(void){
int pc = 0;
int ra0 = 0;
int ra1 = 0;
static int x[6];
int run = 1;
x[0] = 0;
x[1] = 0;
x[2] = 2;
x[3] = 3;
x[4] = 4;
x[5] = 5;
x[6] = 6;
while(run){
printf("pc: %d ->",pc);
switch(opt_code_list[pc].i.op){
case I_PUSH:
case I_ENTER:
case I_EXIT:
case I_LOAD_A0:
case I_LOAD_A1:
case I_AND1_A0:
case I_AND1_A1:
case I_OR1_A0:
case I_OR1_A1:
printf("vm error\n");exit(-1);
break;
case I_AND2_RA0_X_X:
printf("RA0 = X%d && X%d\n",opt_code_list[pc].i.a0,opt_code_list[pc].i.a1);
ra0 = x[opt_code_list[pc].i.a0] && x[opt_code_list[pc].i.a1];
break;
case I_AND2_RA0_RA0_X:
printf("RA0 = RA0 && X%d\n",opt_code_list[pc].i.a1);
ra0 = ra0 && x[opt_code_list[pc].i.a1];
break;
case I_AND2_RA0_RA1_X:
printf("RA0 = RA1 && X%d\n",opt_code_list[pc].i.a1);
ra0 = ra1 && x[opt_code_list[pc].i.a1];
break;
case I_AND2_RA0_RA1_RA0:
printf("RA0 = RA1 && RA0\n");
ra0 = ra1 && ra0;
break;
case I_AND2_RA0_RA0_RA1:
printf("RA0 = RA0 && RA1\n");
ra0 = ra0 && ra1;
break;
case I_AND2_RA1_X_X:
printf("RA1 = X%d && X%d\n",opt_code_list[pc].i.a0,opt_code_list[pc].i.a1);
ra1 = x[opt_code_list[pc].i.a0] && x[opt_code_list[pc].i.a1];
break;
case I_AND2_RA1_RA0_X:
printf("RA1 = RA0 && X%d\n",opt_code_list[pc].i.a1);
ra1 = ra0 && x[opt_code_list[pc].i.a1];
break;
case I_AND2_RA1_RA1_X:
printf("RA1 = RA1 && X%d\n",opt_code_list[pc].i.a1);
ra1 = ra1 && x[opt_code_list[pc].i.a1];
break;
case I_AND2_RA1_RA1_RA0:
printf("RA1 = RA1 && RA0\n");
ra1 = ra1 && ra0;
break;
case I_OR2_RA0_X_X:
printf("RA0 = X%d || X%d\n",opt_code_list[pc].i.a0,opt_code_list[pc].i.a1);
ra0 = x[opt_code_list[pc].i.a0] || x[opt_code_list[pc].i.a1];
break;
case I_OR2_RA0_RA0_X:
printf("RA0 = RA0 || X%d\n",opt_code_list[pc].i.a1);
ra0 = ra0 || x[opt_code_list[pc].i.a1];
break;
case I_OR2_RA0_RA1_X:
printf("RA0 = RA1 || X%d\n",opt_code_list[pc].i.a1);
ra0 = ra1 || x[opt_code_list[pc].i.a1];
break;
case I_OR2_RA0_RA1_RA0:
printf("RA0 = RA1 || RA0\n");
ra0 = ra1 || ra0;
break;
case I_OR2_RA0_RA0_RA1:
printf("RA0 = RA0 || RA1\n");
ra0 = ra0 || ra1;
break;
case I_OR2_RA1_X_X:
printf("RA1 = X%d || X%d\n",opt_code_list[pc].i.a0,opt_code_list[pc].i.a1);
ra1 = x[opt_code_list[pc].i.a0] || x[opt_code_list[pc].i.a1];
break;
case I_OR2_RA1_RA0_X:
printf("RA1 = RA0 || X%d\n",opt_code_list[pc].i.a1);
ra1 = ra0 || x[opt_code_list[pc].i.a1];
break;
case I_OR2_RA1_RA1_X:
printf("RA1 = RA1 || X%d\n",opt_code_list[pc].i.a1);
ra1 = ra1 || x[opt_code_list[pc].i.a1];
break;
case I_OR2_RA1_RA1_RA0:
printf("RA1 = RA1 || RA0\n");
ra1 = ra1 || ra0;
break;
case I_OR2_RA1_RA0_RA1:
printf("RA1 = RA0 || RA1\n");
ra1 = ra0 || ra1;
break;
case I_UIMP:
printf("I_UIMP\n");
run = 0;
break;
default:
break;
}
pc++;
}
printf("RA0: %d RA1: %d\n",ra0,ra1);
return ra0;
}#8 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2022-07-13 09:14:31
#10 硬件设计 KiCAD/Protel/DXP/PADS/ORCAD/EAGLE » 【微小小小小小小小"处理"器】超级超级超级小的一个处理器（瞎写的）开源，有电脑就可以仿真 » 2022-05-09 14:31:28
- xiaohui
- 回复： 2
JUICE LC3
Author: Li.XiongHui(juicemail@163.com)
1. clone this project
git clone https://gitee.com/xunxiaohuii/juice_lc-3
or
git clone https://github.com/xiaoxiaohuixxh/juice_lc-32. download and compile verilator simulator
2.1 download verilator source code , install the tools of dependence for compile verilator
# Prerequisites:
sudo apt-get install git perl python3 make autoconf g++ flex bison ccache
sudo apt-get install libgoogle-perftools-dev numactl perl-doc
sudo apt-get install libfl2 # Ubuntu only (ignore if gives error)
sudo apt-get install libfl-dev # Ubuntu only (ignore if gives error)
sudo apt-get install zlibc zlib1g zlib1g-dev # Ubuntu only (ignore if gives error)
cd juice_lc-3/juicelc3/tools
git clone https://github.com/verilator/verilator # Only first time
cd verilator
git pull # Make sure git repository is up-to-date
git tag # See what versions exist
git checkout aa86c777f4787db7d10fbbbb5019ed4d20a7fcfb # switch to v4.220 version2.2 compile the verilator source code
unset VERILATOR_ROOT # For bash
autoconf # Create ./configure script
./configure # Configure and create Makefile
make -j `nproc` # Build Verilator itself (if error, try just 'make')
./bin/verilator --versionthe version for my verilator is
Verilator 4.221 devel rev v4.220-35-g2b91d7643. design compile juicelc3 soc demo
pwd is xxx/juice_lc-3/juicelc3/tools/verilator
switch to juicelc3 soc demo directory
cd ../../sim/verilator/jlc3_soc
chmod +x ../../../tools/LC-3_Assembler/nglc3asmrun design compile
make run # will be automaticlly run dc,compile asm code and run demo➜ jlc3_soc git:(master) ✗ make run
../../../tools/LC-3_Assembler/nglc3asm ./rom/lc3.asm
Assembling "./rom/lc3.asm"
First Pass
----------
First Pass successful
Symbol table written to file "./rom/lc3.sym"
Second Pass
-----------
Second Pass successful
Binary file written to file "./rom/lc3.bin"
Hexadecimal file written to file "./rom/lc3_hex.bin"
echo '\n' >> ./rom/lc3.bin
verilator +incdir+../../../rtl/peripherals +incdir+../../../rtl/core/ --top-module jlc3_soc --trace -Wall -Wno-LATCH -Wno-EOFNEWLINE --cc jlc3_soc.v mem_ctrl.v ../../../rtl/core/pc.v ../../../rtl/core/id.v ../../../rtl/core/alu.v ../../../rtl/core/regs.v ../../../rtl/core/ctrl.v ../../../rtl/core/mux_1to2_16b.v ../../../rtl/core/mux_2to1_16b.v ../../../rtl/core/mux_3to1_16b.v ../../../rtl/peripherals/simple_uart_send.v --exe main.cpp
make -C obj_dir -f Vjlc3_soc.mk Vjlc3_soc
make[1]: Entering directory '/home/juice/prj/juice_lc-3/juicelc3/sim/verilator/jlc3_soc/obj_dir'
ccache g++ -I. -MMD -I/home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/include -I/home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/include/vltstd -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=1 -DVM_TRACE_FST=0 -faligned-new -fcf-protection=none -Wno-bool-operation -Wno-sign-compare -Wno-uninitialized -Wno-unused-but-set-variable -Wno-unused-parameter -Wno-unused-variable -Wno-shadow -std=gnu++14 -Os -c -o main.o ../main.cpp
ccache g++ -I. -MMD -I/home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/include -I/home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/include/vltstd -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=1 -DVM_TRACE_FST=0 -faligned-new -fcf-protection=none -Wno-bool-operation -Wno-sign-compare -Wno-uninitialized -Wno-unused-but-set-variable -Wno-unused-parameter -Wno-unused-variable -Wno-shadow -std=gnu++14 -Os -c -o verilated.o /home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/include/verilated.cpp
ccache g++ -I. -MMD -I/home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/include -I/home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/include/vltstd -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=1 -DVM_TRACE_FST=0 -faligned-new -fcf-protection=none -Wno-bool-operation -Wno-sign-compare -Wno-uninitialized -Wno-unused-but-set-variable -Wno-unused-parameter -Wno-unused-variable -Wno-shadow -std=gnu++14 -Os -c -o verilated_vcd_c.o /home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/include/verilated_vcd_c.cpp
/usr/bin/perl /home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vjlc3_soc.cpp Vjlc3_soc___024root__DepSet_h4f076a71__0.cpp Vjlc3_soc__Trace__0.cpp Vjlc3_soc__ConstPool_0.cpp Vjlc3_soc___024root__Slow.cpp Vjlc3_soc___024root__DepSet_h4f076a71__0__Slow.cpp Vjlc3_soc__Syms.cpp Vjlc3_soc__Trace__0__Slow.cpp > Vjlc3_soc__ALL.cpp
ccache g++ -I. -MMD -I/home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/include -I/home/juice/prj/lc3_verilog/juicelc3/sim/verilator/sim/verilator/include/vltstd -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=1 -DVM_TRACE_FST=0 -faligned-new -fcf-protection=none -Wno-bool-operation -Wno-sign-compare -Wno-uninitialized -Wno-unused-but-set-variable -Wno-unused-parameter -Wno-unused-variable -Wno-shadow -std=gnu++14 -Os -c -o Vjlc3_soc__ALL.o Vjlc3_soc__ALL.cpp
echo "" > Vjlc3_soc__ALL.verilator_deplist.tmp
Archive ar -rcs Vjlc3_soc__ALL.a Vjlc3_soc__ALL.o
g++ main.o verilated.o verilated_vcd_c.o Vjlc3_soc__ALL.a -o Vjlc3_soc
rm Vjlc3_soc__ALL.verilator_deplist.tmp
make[1]: Leaving directory '/home/juice/prj/juice_lc-3/juicelc3/sim/verilator/jlc3_soc/obj_dir'
./obj_dir/Vjlc3_soc
Enabling waves...
uart0 write 0041 A
uart0 write 0031 1
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0032 2
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0033 3
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0034 4
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0035 5
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0036 6
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0037 7
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0038 8
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0041 A
uart0 write 0031 1
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0032 2
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0033 3
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0034 4
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0035 5
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0036 6
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0037 7
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0038 8
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 uart0_seaddr 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0041 A
uart0 write 0031 1
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0032 2
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0033 3
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0034 4
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0035 5
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0036 6
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
uart0 read stac 1
uart0 read stac 1
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 read stac 0
uart0 write 0037 7
uart0 uart0_seaddr 0
uart0 uart0_seaddr 1
uart0 uart0_seaddr 0
---test jlc3_soc pass-----------------------------------------thx for try!!! --- Li.XiongHui(juicemail@163.com)
#13 技术人生/软件使用技巧/破解经验/技术吐槽/灌水 » 【C18官方标准文档】Programming languages — C, Fourth Edition (ISO/IEC 9899:201 » 2022-05-09 10:28:15
- xiaohui
- 回复： 0
RT:非草案
International Standard: Information technology — Programming languages — C, Fourth Edition (ISO/IEC 9899:2018)
晕佬帮忙换下板块吧，不知道要丢哪里去了。。。
magnet:?xt=urn:btih:EB010AED0E34B3D31399D790128350BF98B6F8D5&tr=http%3A%2F%2Fbt2.t-ru.org%2Fann%3Fmagnet&dn=International%20Standard%3A%20Information%20technology%20%E2%80%94%20Programming%20languages%20%E2%80%94%20C%2C%20Fourth%20Edition%20(ISO%2FIEC%209899%3A2018)%20%5B2018%2C%20PDF%2C%20ENG%5D
防止版权问题，请用磁力链！！！
#14 技术人生/软件使用技巧/破解经验/技术吐槽/灌水 » [C11官方标准手册]Programming languages - C (INCITS/ISO/IEC 9899:2011[2012]) » 2022-05-09 10:26:53
- xiaohui
- 回复： 0
RT:非草案
American National Standard: Information Technology - Programming languages - C (INCITS/ISO/IEC 9899:2011[2012])
晕佬帮忙换下板块吧，不知道要丢哪里去了。。。
magnet:?xt=urn:btih:0B90C82939E98D39C66F15532331721A285D1A4D&tr=http%3A%2F%2Fbt4.t-ru.org%2Fann%3Fmagnet&dn=INCITS%2FISO%2FIEC%20-%20Programming%20languages%20-%20C%20(INCITS%2FISO%2FIEC%209899%3A2011%5B2012%5D)%20%5B2011%2F2012%2C%20PDF%2C%20ENG%5D
防止版权问题，请用磁力链！！！
#15 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-11-30 14:50:44
分享：不依赖时钟和os调度的uip例子
https://github.com/juiceRv/uip_test_for_juicevm
#18 RISC-V » [开源]kendry k210 开发板 » 2021-11-13 17:48:22
- xiaohui
- 回复： 2
#19 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-11-10 15:23:03
2021-11-12更新：
1.在linux平台和window下支持模拟显示器。
juice_vm_release_9bf0c4eb2.zip
加速后的效果
/*
*
* Automatically generated file; DO NOT EDIT.
* JuiceVm Compile Menu
*
*/
#define CONFIG_HAVE_FB_SDL_SUPPORT 1
#define CONFIG_FB_SDL_HEIGHT 480
#define CONFIG_FB_SDL_WIDTH 600/*
* Copyright (c) 2006-2021, JuiceVm Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021/04/22 Juice the first version
*/
#ifndef RV_MTVEC_MAP_INCLUDE
#define RV_MTVEC_MAP_INCLUDE
#include "rv_config.h"
#include <generated/autoconf.h>
#define JUICEVM_RELASE_VERSION 90
// #define mtvec_base_addr 0x5400 // 0x5400=21*1024 BYTE = 21KB
// #define mktime_irq_offet 0x2
#if (defined(JUICEVM_RELASE_VERSION) && (JUICEVM_RELASE_VERSION == 90))
#define rv_sim_pdev_base_addr (0x1000)
#else
#define rv_sim_pdev_base_addr (RV_CPU_SIM_RAM_START_ADDR+RV_CPU_SIM_RAM_SIZE)
#endif
#define rv_sim_pdev_uart0_base_addr (rv_sim_pdev_base_addr)
#define pdev_uart0_write_addr (rv_sim_pdev_uart0_base_addr)
#define pdev_uart0_read_addr (rv_sim_pdev_uart0_base_addr+1)
#define pdev_uart0_free_state 0x00
#define pdev_uart0_readbusy_state 0x01
#define pdev_uart0_state_addr (rv_sim_pdev_uart0_base_addr+2)
#define rv_sim_pdev_mtime_base_addr (rv_sim_pdev_base_addr+3)
#define pdev_mtime_mtime_addr (rv_sim_pdev_mtime_base_addr)
#define pdev_mtime_mtimecmp_addr (rv_sim_pdev_mtime_base_addr+4)
#if (defined(JUICEVM_RELASE_VERSION) && (JUICEVM_RELASE_VERSION == 90))
#define rv_sim_pdev_clint_base_addr (pdev_mtime_mtimecmp_addr+4)
#define rv_sim_pdev_clint_msip_addr (rv_sim_pdev_clint_base_addr) // machine mode software intterupt pending
#define rv_sim_pdev_clint_mtimecmp_addr (rv_sim_pdev_clint_base_addr+0x4000)
#define rv_sim_pdev_clint_mtime_addr (rv_sim_pdev_clint_base_addr+0xBFF8)
#define rv_sim_pdev_clint_max_addr (rv_sim_pdev_clint_mtime_addr)
#define rv_sim_pdev_clint_next_addr (rv_sim_pdev_clint_max_addr+4)
#endif
#ifdef UNIX_COMPILER
#if !defined(ESPIDF)
#define peripheral_device_netcard0 1
#endif // !defined(ESPIDF)
#endif // UNIX_COMPILER
// #if (peripheral_device_netcard0 == 1)
#if (defined(JUICEVM_RELASE_VERSION) && (JUICEVM_RELASE_VERSION == 90))
#define pdev_netcard0_base_addr (rv_sim_pdev_clint_next_addr)
#define pdev_netcard0_write_addr (pdev_netcard0_base_addr)
#define pdev_netcard0_write_end_addr (pdev_netcard0_base_addr+1500)
#define pdev_netcard0_write_cnt_H_addr (pdev_netcard0_write_end_addr+1)
#define pdev_netcard0_write_cnt_L_addr (pdev_netcard0_write_cnt_H_addr+2)
#define pdev_netcard0_write_start_addr (pdev_netcard0_write_cnt_L_addr+2)
#define pdev_netcard0_read_addr (pdev_netcard0_write_start_addr+1)
#define pdev_netcard0_read_end_addr (pdev_netcard0_read_addr+1500)
#define pdev_netcard0_readbuf_cnt_H_addr (pdev_netcard0_read_end_addr+1)
#define pdev_netcard0_readbuf_cnt_L_addr (pdev_netcard0_readbuf_cnt_H_addr+1)
#define pdev_netcard0_state_addr (pdev_netcard0_readbuf_cnt_L_addr+2)
#define pdev_netcard0_max_addr (pdev_netcard0_state_addr)
#define pdev_netcard0_next_addr (pdev_netcard0_state_addr+1)
#define pdev_netcard0_free_state 0x00
#define pdev_netcard0_readbusy_state 0x01
#else
#error("not support netcard yet");
#endif
// #endif // (peripheral_device_netcard0 == 1)
// #if (defined(CONFIG_HAVE_FB_SDL_SUPPORT))
#if (defined(JUICEVM_RELASE_VERSION) && (JUICEVM_RELASE_VERSION == 90))
#define pdev_fb0_base_addr (pdev_netcard0_next_addr)
#define pdev_fb0_write_x_H_addr (pdev_fb0_base_addr+1)
#define pdev_fb0_write_x_L_addr (pdev_fb0_base_addr+2)
#define pdev_fb0_write_y_H_addr (pdev_fb0_base_addr+3)
#define pdev_fb0_write_y_L_addr (pdev_fb0_base_addr+4)
#define pdev_fb0_write_r_addr (pdev_fb0_write_y_L_addr+1)
#define pdev_fb0_write_g_addr (pdev_fb0_write_y_L_addr+2)
#define pdev_fb0_write_b_addr (pdev_fb0_write_y_L_addr+3)
#define pdev_fb0_write_set_addr (pdev_fb0_write_y_L_addr+4)
#define pdev_fb0_write_render_addr (pdev_fb0_write_y_L_addr+5)
#define pdev_fb0_max_addr (pdev_fb0_write_render_addr)
#define pdev_fb0_next_addr (pdev_fb0_write_render_addr+1)
#else
#error("not support fb0 yet");
#endif
// #endif // (defined(CONFIG_HAVE_FB_SDL_SUPPORT))
#define uart0_irq_flag 1
#define uart0_irq_ecode 24
#define RV_exception_Instruction_address_misaligned_IFLAG 0
#define RV_exception_Instruction_address_misaligned_ECODE 0
#define RV_exception_Instruction_access_fault_IFLAG 0
#define RV_exception_Instruction_access_fault_ECODE 1
#define RV_exception_Illegal_Instruction_IFLAG 0
#define RV_exception_Illegal_Instruction_ECODE 2
#define RV_exception_Breakpoint_IFLAG 0
#define RV_exception_Breakpoint_ECODE 3
#define RV_exception_LoadAddress_Misaligned_IFLAG 0
#define RV_exception_LoadAddress_Misaligned_ECODE 4
#define RV_exception_Load_access_fault_IFLAG 0
#define RV_exception_Load_access_fault_ECODE 5
#define RV_exception_Store_or_AMO_Address_Misaligned_IFLAG 0
#define RV_exception_Store_or_AMO_Address_Misaligned_ECODE 6
#define RV_exception_Store_or_AMO_access_fault_IFLAG 0
#define RV_exception_Store_or_AMO_access_fault_ECODE 7
#define RV_exception_Environment_call_from_Umode_IFLAG 0
#define RV_exception_Environment_call_from_Umode_ECODE 8
#define RV_exception_Environment_call_from_Smode_IFLAG 0
#define RV_exception_Environment_call_from_Smode_ECODE 9
// https://zhuanlan.zhihu.com/p/164394603
#define RV_exception_Environment_Call_FromMachine_IFLAG 0
#define RV_exception_Environment_Call_FromMachine_ECODE 11
#define RV_exception_Environment_Call_FromUser_IFLAG 0
#define RV_exception_Environment_Call_FromUser_ECODE 8
#define RV_exception_Environment_Call_FromSupervisor_IFLAG 0
#define RV_exception_Environment_Call_FromSupervisor_ECODE 9
#define RV_exception_FloatingPoint_Disabled_IFLAG
#define RV_exception_FloatingPoint_Disabled_ECODE
#define RV_exception_Instruction_page_fault_IFLAG 0
#define RV_exception_Instruction_page_fault_ECODE 12
#define RV_exception_Load_page_fault_IFLAG 0
#define RV_exception_Load_page_fault_ECODE 13
#define RV_exception_Store_or_AMO_page_fault_IFLAG 0
#define RV_exception_Store_or_AMO_page_fault_ECODE 15
// Interrupt Exception Code Description
// 1 0 Reserved
// 1 1 Supervisor software interrupt not support
// 1 2 Reserved
// 1 3 Machine software interrupt not support
// 1 4 Reserved
// 1 5 Supervisor timer interrupt not support
// 1 6 Reserved
// 1 7 Machine timer interrupt support
// 1 8 Reserved
// 1 9 Supervisor external interrupt not support
// 1 10 Reserved
// 1 11 Machine external interrupt not support
// 1 12 Reserved
// 1 13 Reserved
// 1 14 Reserved
// 1 15 Reserved
// // 1 ≥16 Designated for platform use
// 0 0 Instruction address misaligned not support
// 0 1 Instruction access fault not support
// 0 2 Illegal instruction support
// 0 3 Breakpoint support
// 0 4 Load address misaligned support
// 0 5 Load access fault not support
// 0 6 Store/AMO address misaligned support
// 0 7 Store/AMO access fault not support
// 0 8 Environment call from U-mode not support
// 0 9 Environment call from S-mode not support
// 0 10 Reserved
// 0 11 Environment call from M-mode support
// 0 12 Instruction page fault not support
// 0 13 Load page fault not support
// 0 14 Reserved
// 0 15 Store/AMO page fault not support
// 0 16-23 Reserved
// // 0 24–31 Designated for custom use
// 0 32-47 Reserved
// // 0 48–63 Designated for custom use
// 0 ≥64 Reserved
// #define mtime_irq_flag 1
// #define mtime_irq_ecode 7
#define RV_Supervisor_software_interrupt_IFLAG 1
#define RV_Supervisor_software_interrupt_ECODE 1
#define RV_Machine_software_interrupt_IFLAG 1
#define RV_Machine_software_interrupt_ECODE 3
#define RV_User_timer_interrupt_IFLAG 1
#define RV_User_timer_interrupt_ECODE 4
#define RV_Supervisor_timer_interrupt_IFLAG 1
#define RV_Supervisor_timer_interrupt_ECODE 5
#define RV_Machine_timer_interrupt_IFLAG 1
#define RV_Machine_timer_interrupt_ECODE 7
#define RV_Supervisor_external_interrupt_IFLAG 1
#define RV_Supervisor_external_interrupt_ECODE 9
#define RV_Machine_external_interrupt_IFLAG 1
#define RV_Machine_external_interrupt_ECODE 10
#endif // RV_MTVEC_MAP_INCLUDE#20 Re: 全志 SOC » 试试用F1C100s来3D绘图 » 2021-11-01 12:50:52
[开源]tinygl的sdl后端，跨平台opengl的子集tinygl运行
https://whycan.com/t_7321.html
#21 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-11-01 12:49:35
xiaotianhu 说：
大佬，什么时候会开源啊。非常好奇想学习一下的说
他的外设和组件已经在逐步开源了呢。
gdb组件开源：
https://github.com/juiceRv/gdb_stub_for_juicevm
fb组件开源：
https://github.com/juiceRv/tinygl_sdl_test
暂时不开源虚拟机的cpu部分。
cpu部分以为耦合性比较强，正在拆分成多级流水线的实现方式，使用内置的调度器进行并行处理。所以暂时没有开源时间公布。
#22 计算机图形/GUI/RTOS/FileSystem/OpenGL/DirectX/SDL2 » [开源]tinygl的sdl后端，跨平台opengl的子集tinygl运行 » 2021-11-01 12:31:06
- xiaohui
- 回复： 2
RT.
github: https://github.com/juicerv/tinygl_sdl_test
#23 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-10-25 12:07:22
uip_test:
uip_test.zip
/*
* Copyright (c) 2006-2021, JuiceVm Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021/04/22 Juice the first version
*/
#ifndef RV_MTVEC_MAP_INCLUDE
#define RV_MTVEC_MAP_INCLUDE
#include "rv_config.h"
#define JUICEVM_RELASE_VERSION 90
// #define mtvec_base_addr 0x5400 // 0x5400=21*1024 BYTE = 21KB
// #define mktime_irq_offet 0x2
#define RAM_SIZE_KB (1024)
#define RAM_SIZE_MB (1024*RAM_SIZE_KB)
#define RAM_SIZE_GB (1024*RAM_SIZE_MB)
#define RV_CPU_SIM_RAM_START_ADDR ((_cur_rv_uint)(0x80000000))
#define RV_CPU_SIM_RAM_SIZE ((_cur_rv_uint)(256 * RAM_SIZE_MB))
#if (defined(JUICEVM_RELASE_VERSION) && (JUICEVM_RELASE_VERSION == 90))
#define rv_sim_pdev_base_addr (0x1000)
#else
#define rv_sim_pdev_base_addr (RV_CPU_SIM_RAM_START_ADDR+RV_CPU_SIM_RAM_SIZE)
#endif
#define rv_sim_pdev_uart0_base_addr (rv_sim_pdev_base_addr)
#define pdev_uart0_write_addr (rv_sim_pdev_uart0_base_addr)
#define pdev_uart0_read_addr (rv_sim_pdev_uart0_base_addr+1)
#define pdev_uart0_free_state 0x00
#define pdev_uart0_readbusy_state 0x01
#define pdev_uart0_state_addr (rv_sim_pdev_uart0_base_addr+2)
#define rv_sim_pdev_mtime_base_addr (rv_sim_pdev_base_addr+3)
#define pdev_mtime_mtime_addr (rv_sim_pdev_mtime_base_addr)
#define pdev_mtime_mtimecmp_addr (rv_sim_pdev_mtime_base_addr+4)
#if (defined(JUICEVM_RELASE_VERSION) && (JUICEVM_RELASE_VERSION == 90))
#define rv_sim_pdev_clint_base_addr (pdev_mtime_mtimecmp_addr+4)
#define rv_sim_pdev_clint_msip_addr (rv_sim_pdev_clint_base_addr) // machine mode software intterupt pending
#define rv_sim_pdev_clint_mtimecmp_addr (rv_sim_pdev_clint_base_addr+0x4000)
#define rv_sim_pdev_clint_mtime_addr (rv_sim_pdev_clint_base_addr+0xBFF8)
#define rv_sim_pdev_clint_max_addr (rv_sim_pdev_clint_mtime_addr)
#define rv_sim_pdev_clint_next_addr (rv_sim_pdev_clint_max_addr+4)
#endif
#ifdef UNIX_COMPILER
#if !defined(ESPIDF)
#define peripheral_device_netcard0 1
#endif // !defined(ESPIDF)
#endif // UNIX_COMPILER
#if (peripheral_device_netcard0 == 1)
#if (defined(JUICEVM_RELASE_VERSION) && (JUICEVM_RELASE_VERSION == 90))
#define pdev_netcard0_base_addr (rv_sim_pdev_clint_next_addr)
#define pdev_netcard0_write_addr (pdev_netcard0_base_addr)
#define pdev_netcard0_write_end_addr (pdev_netcard0_base_addr+1500)
#define pdev_netcard0_write_cnt_H_addr (pdev_netcard0_write_end_addr+1)
#define pdev_netcard0_write_cnt_L_addr (pdev_netcard0_write_cnt_H_addr+2)
#define pdev_netcard0_write_start_addr (pdev_netcard0_write_cnt_L_addr+2)
#define pdev_netcard0_read_addr (pdev_netcard0_write_start_addr+1)
#define pdev_netcard0_read_end_addr (pdev_netcard0_read_addr+1500)
#define pdev_netcard0_readbuf_cnt_H_addr (pdev_netcard0_read_end_addr+1)
#define pdev_netcard0_readbuf_cnt_L_addr (pdev_netcard0_readbuf_cnt_H_addr+1)
#define pdev_netcard0_state_addr (pdev_netcard0_readbuf_cnt_L_addr+2)
#define pdev_netcard0_max_addr (pdev_netcard0_state_addr)
#define pdev_netcard0_next_addr (pdev_netcard0_state_addr+1)
#define pdev_netcard0_free_state 0x00
#define pdev_netcard0_readbusy_state 0x01
#else
#error("not support netcard yet");
#endif
#endif // (peripheral_device_netcard0 == 1)
#define uart0_irq_flag 1
#define uart0_irq_ecode 24
#define RV_exception_Instruction_address_misaligned_IFLAG 0
#define RV_exception_Instruction_address_misaligned_ECODE 0
#define RV_exception_Instruction_access_fault_IFLAG 0
#define RV_exception_Instruction_access_fault_ECODE 1
#define RV_exception_Illegal_Instruction_IFLAG 0
#define RV_exception_Illegal_Instruction_ECODE 2
#define RV_exception_Breakpoint_IFLAG 0
#define RV_exception_Breakpoint_ECODE 3
#define RV_exception_LoadAddress_Misaligned_IFLAG 0
#define RV_exception_LoadAddress_Misaligned_ECODE 4
#define RV_exception_Load_access_fault_IFLAG 0
#define RV_exception_Load_access_fault_ECODE 5
#define RV_exception_Store_or_AMO_Address_Misaligned_IFLAG 0
#define RV_exception_Store_or_AMO_Address_Misaligned_ECODE 6
#define RV_exception_Store_or_AMO_access_fault_IFLAG 0
#define RV_exception_Store_or_AMO_access_fault_ECODE 7
#define RV_exception_Environment_call_from_Umode_IFLAG 0
#define RV_exception_Environment_call_from_Umode_ECODE 8
#define RV_exception_Environment_call_from_Smode_IFLAG 0
#define RV_exception_Environment_call_from_Smode_ECODE 9
// https://zhuanlan.zhihu.com/p/164394603
#define RV_exception_Environment_Call_FromMachine_IFLAG 0
#define RV_exception_Environment_Call_FromMachine_ECODE 11
#define RV_exception_Environment_Call_FromUser_IFLAG 0
#define RV_exception_Environment_Call_FromUser_ECODE 8
#define RV_exception_Environment_Call_FromSupervisor_IFLAG 0
#define RV_exception_Environment_Call_FromSupervisor_ECODE 9
#define RV_exception_FloatingPoint_Disabled_IFLAG
#define RV_exception_FloatingPoint_Disabled_ECODE
#define RV_exception_Instruction_page_fault_IFLAG 0
#define RV_exception_Instruction_page_fault_ECODE 12
#define RV_exception_Load_page_fault_IFLAG 0
#define RV_exception_Load_page_fault_ECODE 13
#define RV_exception_Store_or_AMO_page_fault_IFLAG 0
#define RV_exception_Store_or_AMO_page_fault_ECODE 15
// Interrupt Exception Code Description
// 1 0 Reserved
// 1 1 Supervisor software interrupt not support
// 1 2 Reserved
// 1 3 Machine software interrupt not support
// 1 4 Reserved
// 1 5 Supervisor timer interrupt not support
// 1 6 Reserved
// 1 7 Machine timer interrupt support
// 1 8 Reserved
// 1 9 Supervisor external interrupt not support
// 1 10 Reserved
// 1 11 Machine external interrupt not support
// 1 12 Reserved
// 1 13 Reserved
// 1 14 Reserved
// 1 15 Reserved
// // 1 ≥16 Designated for platform use
// 0 0 Instruction address misaligned not support
// 0 1 Instruction access fault not support
// 0 2 Illegal instruction support
// 0 3 Breakpoint support
// 0 4 Load address misaligned support
// 0 5 Load access fault not support
// 0 6 Store/AMO address misaligned support
// 0 7 Store/AMO access fault not support
// 0 8 Environment call from U-mode not support
// 0 9 Environment call from S-mode not support
// 0 10 Reserved
// 0 11 Environment call from M-mode support
// 0 12 Instruction page fault not support
// 0 13 Load page fault not support
// 0 14 Reserved
// 0 15 Store/AMO page fault not support
// 0 16-23 Reserved
// // 0 24–31 Designated for custom use
// 0 32-47 Reserved
// // 0 48–63 Designated for custom use
// 0 ≥64 Reserved
// #define mtime_irq_flag 1
// #define mtime_irq_ecode 7
#define RV_Supervisor_software_interrupt_IFLAG 1
#define RV_Supervisor_software_interrupt_ECODE 1
#define RV_Machine_software_interrupt_IFLAG 1
#define RV_Machine_software_interrupt_ECODE 3
#define RV_User_timer_interrupt_IFLAG 1
#define RV_User_timer_interrupt_ECODE 4
#define RV_Supervisor_timer_interrupt_IFLAG 1
#define RV_Supervisor_timer_interrupt_ECODE 5
#define RV_Machine_timer_interrupt_IFLAG 1
#define RV_Machine_timer_interrupt_ECODE 7
#define RV_Supervisor_external_interrupt_IFLAG 1
#define RV_Supervisor_external_interrupt_ECODE 9
#define RV_Machine_external_interrupt_IFLAG 1
#define RV_Machine_external_interrupt_ECODE 10
#endif // RV_MTVEC_MAP_INCLUDE#24 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-10-25 12:01:54
2021-10-24更新：
1.修复指令bug并通过risc-v官方指令集测试。
2.成功启动busybox。
3.在linux平台下支持模拟网卡。
juice_vm_release_f6bb27902.zip
linux运行固件：
fw_payload.zip
#25 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-09-16 13:25:26
20210916更新：
https://github.com/juiceRv/JuiceVm/blob/master/juice_vm_release_for_Linux_and_mingw64_laster.zip
feat(allwinner-d1): add allwinner d1 support
#26 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-09-02 19:59:47
#27 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-09-02 19:59:08
顺便给大家献上risc-v32下的测试代码：
rv32_test_c_env.zip
为了大家需要打字才可以运行，编译代码如下：
wget https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.3.0-2.1/xpack-riscv-none-embed-gcc-8.3.0-2.1-linux-x64.tar.gz
tar vxf xpack-riscv-none-embed-gcc-8.3.0-2.1-linux-x64.tar.gz
unzip rv32_test_c_env.zip
cd rv32_test_c_env
make CROSS_COMPILE=../xpack-riscv-none-embed-gcc-8.3.0-2.1/bin/riscv-none-embed-
./juicevm_rv32_for_Linux.out -a -g ./c_env_test.bin
运行效果：
global_vm_log_init juicevm_rv_output_mode_sel: 0 JUICE_VM_LOG_MAX_NUM:6000
_ _ __ ____ __
| |_ _(_) ___ __\ \ / | \/ |
_ | | | | | |/ __/ _ \ \ / /| |\/| |
| |_| | |_| | | (_| __/\ V / | | | |
\___/ \__,_|_|\___\___| \_/ |_| |_|
email: juicemail@163.com
version:f73bcb1c f73bcb1c Thu, 2 Sep 2021 19:39:22 +0800 xiaohui Merge branch 'master' of e.coding.net:xiaoxiaohuixxh/risc-v_vm/risc-v_sim
firm_addr:../../rv32_test/c_env/c_env_test.bin
fd = 3
file_size = 16928
[rv64_sim][dev][mem]main.c(280):RV_CPU_SIM_RAM_START_ADDR 7fbec83cce0b
[rv64_sim][dev][mem]main.c(284):RV_CPU_SIM_RAM_SIZE 8388608 Bytes 8.000000 MiB
interrupt_vertor_register_mag_init
rv_csr_register_init
csr_addr_misa 40140101
csr_addr_mvendorid 00000000
csr_addr_marchid 00000000
csr_addr_mimpid 00000000
csr_addr_mhartid 00000000
rv_peripheral_device_init
[rv64_sim][dev][mmu]rv_pdev.c(605):rv_peripheral_device_mmu_init,Sv39 mode support only
[rv64_sim][dev][mtime]rv_pdev.c(247):rv_peripheral_device_mtime_init
[rv64_sim][dev][mtime]rv_pdev.c(272):pdev_mtime_irq_info 0x7fffd20ac734 80800003 80800007
[rv64_sim][proc][err]rv.c[interrupt_vertor_register32](825){pc:0000000000000000}:interrupt_vertor_register err->irq info err irq_v 1 addr_min 4
[rv64_sim][dev][mtime]rv_pdev.c(283):pdev_mtime_irq_info_on_umode (nil) 80800003 80800007
[rv64_sim][dev][uart0]rv_pdev.c(32):rv_peripheral_device_uart0_init
[rv64_sim][dev][uart0]rv_pdev.c(48):pdev_uart0_irq_info 0x7fffd20ac724
[rv64_sim][dev][uart0]rv_pdev.c(49):pdev_uart0_write_addr 80800000
[rv64_sim][dev][uart0]rv_pdev.c(50):pdev_uart0_state_addr 80800002
[rv64_sim][dev][fb0]framebuffer.c(24):rv_peripheral_device_fb0_init
rv sim start...
loading...
RV_CPU_SIM_RAM_START_ADDR 80000000
rv_cpu->reg.pc 80000000
instr 80000000 100117
cpu run...
ab
hello world1
#28 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-09-02 19:53:28
20210902更新：
可能有小伙伴以为juicevm不更新了，打算做成TLS的，这次更新时间长是因为我把代码框架重构了，为后面的多核和多架构支持做好了准备。
这次更新除了框架重构外还添加了risc-v32 ima的支持(在rv32下暂不支持任何MMU,但是已经在TODO里啦，只要是RV32支持的将全都有)，还即将支持用设备树来实现动态的寄存器地址和外设配置呢。下面我们下载下最新的支持体验下吧！！！
这次上传只打包了linux下的版本，window和macos的在路上了。
juice_vm_release_for_Linux_f73bcb1c.zip
#29 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-09-02 19:47:43
#30 Re: Cortex M0/M3/M4/M7 » 2.通过LWIP协议栈使用学习http,tcp,网卡之间的关系. » 2021-08-12 01:24:21
多年前写的一个超精简的协议栈： https://github.com/xiaoxiaohuixxh/McuInternet
#31 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-08-10 14:51:19
#32 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-08-10 12:22:35
#34 Re: RISC-V » juiceVm risc-v虚拟机在esp32上运行linux kernel » 2021-08-07 14:12:01
kekemuyu 说：
同样是WROVER-B，cpu ram init到99.60%的时候，速度突然变慢，而且卡在了下图：
https://whycan.com/files/members/1315/Screenshot121824.png
这里是在解压，压缩率有点高，解压有点慢。
#35 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-08-05 13:36:35
#36 Re: RISC-V » juiceVm risc-v虚拟机在esp32上运行linux kernel » 2021-08-02 19:14:26
@findie
上传esp32 WROVER-B支持的固件
juicevm-risc-v_vm-for-esp32_wrover_20210812.zip
启动日志
ets Jun 8 2016 00:22:57
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:3676
ho 0 tail 12 room 4
load:0x40078000,len:12276
load:0x40080400,len:3000
entry 0x400805e8
Thisjuicevm_uart_inited
psram size 8MiB
Himem has 4456448 B of memory, 4456448 B of which is free. Testing the free memory...
Himem has 4MiB of memory, 4MiB of which is free. Testing the free memory...
esp_himem_reserved_area_size is 262144MiB of memory
heap_caps_get_free_size: 3930007
heap_caps_get_free_size + memfree: 8386455
heap_caps_get_largest_free_block: 2097152
esp_get_minimum_free_heap_size: 4181999
tmp_addr 0 low_mem_p 3f80086c
tmp_addr 1 low_mem_p 3f808870
tmp_addr 2 low_mem_p 3f810874
tmp_addr 3 low_mem_p 3f818878
tmp_addr 4 low_mem_p 3f82087c
tmp_addr 5 low_mem_p 3f828880
tmp_addr 6 low_mem_p 3f830884
tmp_addr 7 low_mem_p 3f838888
tmp_addr 8 low_mem_p 3f84088c
tmp_addr 9 low_mem_p 3f848890
tmp_addr 10 low_mem_p 3f850894
tmp_addr 11 low_mem_p 3f858898
tmp_addr 12 low_mem_p 3f86089c
tmp_addr 13 low_mem_p 3f8688a0
tmp_addr 14 low_mem_p 3f8708a4
tmp_addr 15 low_mem_p 3f8788a8
tmp_addr 16 low_mem_p 3f8808ac
tmp_addr 17 low_mem_p 3f8888b0
tmp_addr 18 low_mem_p 3f8908b4
tmp_addr 19 low_mem_p 3f8988b8
tmp_addr 20 low_mem_p 3f8a08bc
tmp_addr 21 low_mem_p 3f8a88c0
tmp_addr 22 low_mem_p 3f8b08c4
tmp_addr 23 low_mem_p 3f8b88c8
tmp_addr 24 low_mem_p 3f8c08cc
tmp_addr 25 low_mem_p 3f8c88d0
tmp_addr 26 low_mem_p 3f8d08d4
tmp_addr 27 low_mem_p 3f8d88d8
tmp_addr 28 low_mem_p 3f8e08dc
tmp_addr 29 low_mem_p 3f8e88e0
tmp_addr 30 low_mem_p 3f8f08e4
tmp_addr 31 low_mem_p 3f8f88e8
tmp_addr 32 low_mem_p 3f9008ec
tmp_addr 33 low_mem_p 3f9088f0
tmp_addr 34 low_mem_p 3f9108f4
tmp_addr 35 low_mem_p 3f9188f8
tmp_addr 36 low_mem_p 3f9208fc
tmp_addr 37 low_mem_p 3f928900
tmp_addr 38 low_mem_p 3f930904
tmp_addr 39 low_mem_p 3f938908
tmp_addr 40 low_mem_p 3f94090c
tmp_addr 41 low_mem_p 3f948910
tmp_addr 42 low_mem_p 3f950914
tmp_addr 43 low_mem_p 3f958918
tmp_addr 44 low_mem_p 3f96091c
tmp_addr 45 low_mem_p 3f968920
tmp_addr 46 low_mem_p 3f970924
tmp_addr 47 low_mem_p 3f978928
tmp_addr 48 low_mem_p 3f98092c
tmp_addr 49 low_mem_p 3f988930
tmp_addr 50 low_mem_p 3f990934
tmp_addr 51 low_mem_p 3f998938
tmp_addr 52 low_mem_p 3f9a093c
tmp_addr 53 low_mem_p 3f9a8940
tmp_addr 55 low_mem_p 3f9b8948
tmp_addr 56 low_mem_p 3f9c094c
tmp_addr 57 low_mem_p 3f9c8950
tmp_addr 58 low_mem_p 3f9d0954
tmp_addr 59 low_mem_p 3f9d8958
tmp_addr 60 low_mem_p 3f9e095c
tmp_addr 61 low_mem_p 3f9e8960
tmp_addr 62 low_mem_p 3f9f0964
tmp_addr 63 low_mem_p 3f9f8968
tmp_addr 64 low_mem_p 3fa0096c
tmp_addr 65 low_mem_p 3fa08970
tmp_addr 66 low_mem_p 3fa10974
tmp_addr 67 low_mem_p 3fa18978
tmp_addr 68 low_mem_p 3fa2097c
tmp_addr 69 low_mem_p 3fa28980
tmp_addr 70 low_mem_p 3fa30984
tmp_addr 71 low_mem_p 3fa38988
tmp_addr 72 low_mem_p 3fa4098c
tmp_addr 73 low_mem_p 3fa48990
tmp_addr 74 low_mem_p 3fa50994
tmp_addr 75 low_mem_p 3fa58998
tmp_addr 76 low_mem_p 3fa6099c
tmp_addr 77 low_mem_p 3fa689a0
tmp_addr 78 low_mem_p 3fa709a4
tmp_addr 79 low_mem_p 3fa789a8
tmp_addr 80 low_mem_p 3fa809ac
tmp_addr 81 low_mem_p 3fa889b0
tmp_addr 82 low_mem_p 3fa909b4
tmp_addr 83 low_mem_p 3fa989b8
tmp_addr 84 low_mem_p 3faa09bc
tmp_addr 85 low_mem_p 3faa89c0
tmp_addr 86 low_mem_p 3fab09c4
tmp_addr 87 low_mem_p 3fab89c8
tmp_addr 88 low_mem_p 3fac09cc
tmp_addr 89 low_mem_p 3fac89d0
tmp_addr 90 low_mem_p 3fad09d4
tmp_addr 91 low_mem_p 3fad89d8
tmp_addr 92 low_mem_p 3fae09dc
tmp_addr 93 low_mem_p 3fae89e0
tmp_addr 94 low_mem_p 3faf09e4
tmp_addr 95 low_mem_p 3faf89e8
tmp_addr 96 low_mem_p 3fb009ec
tmp_addr 97 low_mem_p 3fb089f0
tmp_addr 98 low_mem_p 3fb109f4
tmp_addr 99 low_mem_p 3fb189f8
tmp_addr 100 low_mem_p 3fb209fc
tmp_addr 101 low_mem_p 3fb28a00
tmp_addr 102 low_mem_p 3fb30a04
tmp_addr 103 low_mem_p 3fb38a08
tmp_addr 104 low_mem_p 3fb40a0c
tmp_addr 105 low_mem_p 3fb48a10
tmp_addr 106 low_mem_p 3fb50a14
tmp_addr 107 low_mem_p 3fb58a18
tmp_addr 108 low_mem_p 3fb60a1c
tmp_addr 109 low_mem_p 3fb68a20
tmp_addr 110 low_mem_p 3fb70a24
tmp_addr 111 low_mem_p 3fb78a28
tmp_addr 112 low_mem_p 3fb80a2c
tmp_addr 113 low_mem_p 3fb88a30
tmp_addr 114 low_mem_p 3fb90a34
tmp_addr 115 low_mem_p 3fb98a38
tmp_addr 116 low_mem_p 3fba0a3c
tmp_addr 117 low_mem_p 3fba8a40
tmp_addr 118 low_mem_p 3fbb0a44
tmp_addr 119 low_mem_p 3ffc1080
low_mem_size 3932160 low_mem_p 3f80086c
hi_mem_size + low_mem_size 8388608
Done!
Done!
juicevm booting...
g_juicevm_bin_bufData[0] b0
g_juicevm_bin_bufData[1] 73
g_juicevm_bin_bufData[2] 50
juicevm booting...
cpu ram init 48519/8388608 Bytes 0.58%
...
cpu ram init 8388487/8388608 Bytes 100.00%
cpu ram init 8388607/8388608 Bytes 100.00%
juicevm decompress...
juicevm decompress g_juicevm_bin_bufSize 25119 Bytes BINARY_OUTPUT_LEN 45176 Bytes
lz4 decompress 0/25119 Bytes 0.00%
lz4 decompress 4801/25119 Bytes 19.11%
lz4 decompress 11789/25119 Bytes 46.93%
lz4 decompress 15262/25119 Bytes 60.76%
lz4 decompress 18424/25119 Bytes 73.35%
lz4 decompress 21379/25119 Bytes 85.11%
lz4 decompress 24130/25119 Bytes 96.06%
[0;33m _ _ __ ____ __
[0m[0;33m | |_ _(_) ___ __\ \ / | \/ |
[0m[0;33m _ | | | | | |/ __/ _ \ \ / /| |\/| |
[0m[0;33m | |_| | |_| | | (_| __/\ V / | | | |
[0m[0;33m \___/ \__,_|_|\___\___| \_/ |_| |_|
[0m[0;33m email: juicemail@163.com
[0mversion: unknow
interrupt_vertor_register_mag_init
rv_csr_register_init
csr_addr_misa 0000000000000000
csr_addr_mvendorid 000000003ffca248
csr_addr_marchid 000000003ffca248
csr_addr_mimpid 000000003ffca248
csr_addr_mhartid 000000003ffca248
rv_peripheral_device_init
[rv64_sim][dev][mmu]/mnt/ssd_prj/risc-v_sim/sim/rv.c(6599):rv_peripheral_device_mmu_init,Sv39 mode support only
[rv64_sim][dev][mtime]/mnt/ssd_prj/risc-v_sim/sim/rv.c(6253):rv_peripheral_device_mtime_init
[rv64_sim][dev][mtime]/mnt/ssd_prj/risc-v_sim/sim/rv.c(6272):pdev_mtime_irq_info 0x3ffbb678 80800003 80800007
[rv64_sim][dev][mtime]/mnt/ssd_prj/risc-v_sim/sim/rv.c(6283):pdev_mtime_irq_info_on_umode 0x0 80800003 80800007
[rv64_sim][dev][uart0]/mnt/ssd_prj/risc-v_sim/sim/rv.c(6046):rv_peripheral_device_uart0_init
[rv64_sim][dev][uart0]/mnt/ssd_prj/risc-v_sim/sim/rv.c(6062):pdev_uart0_irq_info 0x3ffbb658
rv sim start...
loading...
RV_CPU_SIM_RAM_START_ADDR 0
rv_cpu.reg.pc 80000000
nstr 80000000 30305073
cpu run...
heap: [0x8000cba8 - 0x80800000]
\ | /
- RT - Thread Operating System
/ | \ 4.0.4 build Jul 12 2021
2006 - 2021 Copyright by rt-thread team
Hello RT-Thread!
Hello RT-Thread! test_i = 0
Hello RT-Thread! test_i = 1
Hello RT-Thread! test_i = 2
Hello RT-Thread! test_i = 3
Hello RT-Thread! test_i = 4
Hello RT-Thread! test_i = 5
Hello RT-Thread! test_i = 6
Hello RT-Thread! test_i = 7
Hello RT-Thread! test_i = 8
Hello RT-Thread! test_i = 9
Hello RT-Thread! test_i = 10
Hello RT-Thread! test_i = 11
Hello RT-Thread! test_i = 12
Hello RT-Thread! test_i = 13
Hello RT-Thread! test_i = 14
Hello RT-Thread! test_i = 15
Hello RT-Thread! test_i = 16
Hello RT-Thread! test_i = 17
Hello RT-Thread! test_i = 18
Hello RT-Thread! test_i = 19
Hello RT-Thread! test_i = 20
Hello RT-Thread! test_i = 21
Hello RT-Thread! test_i = 22
Hello RT-Thread! test_i = 23
Hello RT-Thread! test_i = 24
Hello RT-Thread! test_i = 25
Hello RT-Thread! test_i = 26
Hello RT-Thread! test_i = 27
Hello RT-Thr#37 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-07-26 12:17:10
开源juicevm的gdb stub组件：https://github.com/juiceRv/gdb_stub_for_juicevm
#38 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-07-25 22:28:07
#40 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-07-19 19:28:58
#42 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-07-19 19:26:22
#45 Re: RISC-V » juiceVm risc-v虚拟机在esp32上运行linux kernel » 2021-07-17 15:55:58
#define JUICEVM_PSRAM_DMA_CHAN 2
#define JUICEVM_PSRAM_PIN_NUM_MISO 7
#define JUICEVM_PSRAM_PIN_NUM_MOSI 8
#define JUICEVM_PSRAM_PIN_NUM_CLK 17
#define JUICEVM_PSRAM_PIN_NUM_CS 16
#48 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-07-16 16:03:53
20210716更新：
esp32上运行juicevm。听说esp32和linux kernel更配哦
https://whycan.com/t_6899.html
#49 RISC-V » juiceVm risc-v虚拟机在esp32上运行linux kernel » 2021-07-16 16:02:45
- xiaohui
- 回复： 23
RT.
有图有真相，固件在文章末尾
运行环境：
esp32 devkit v1开发板：
外置 2MB flash.
外接 spi psram 8MB:
psram spi interface info:
CS:4,CLK:5,MOSI:18,MISO:19
固件下载信息：
Compressed 1583728 bytes to 1294532...
Wrote 1583728 bytes (1294532 compressed) at 0x00001000 in 33.1 seconds (effective 382.7 kbit/s)...
#50 Re: RISC-V » RISC-V代码密度相比Cortex-M差距明显 » 2021-07-16 15:38:27
#51 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-07-16 14:34:36
20210716更新：
请移步到https://whycan.com/t_6881.html
#52 Re: RISC-V » 用汇编学习risc-v指令集，并在线仿真，点亮led » 2021-07-16 14:32:36
#55 Re: RISC-V » esp32上运行juicevm psram可选 » 2021-07-14 18:16:02
#57 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-06-22 14:02:46
#58 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-06-10 16:08:36
#59 Re: 好钜润半导体(TIKY) » TKM32F499开坑 » 2021-05-31 14:48:07
#60 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-05-31 12:03:22
#61 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-05-27 02:22:14
更新私有软件源：
echo "deb http://xiaohui.mongoyun.com:3333/ trusty main" | sudo tee -a /etc/apt/sources.list
wget -O - http://xiaohui.mongoyun.com:3333/key/deb.gpg.key | sudo apt-key add -
sudo apt update
sudo apt install juicevm
#62 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-05-26 14:49:28
分享下软件的参数说明：
t: enable test mode
进入固件测试模式
当出现下面的状态会结束运行并且打印出通过还是失败的字样
x3_gp寄存器的值为1 和 x17_a7寄存器的值为93时，进入了ecall异常就会触发。x10_a0 寄存器的值为 0时打印pass字样，否则打印fail字样
-------------------------------------------------------------------------------
T: enable trap debug mode
使能异常调试模式，出现异常时会打印当前异常的调试信息
-------------------------------------------------------------------------------
d: enable debug mode
打开虚拟机内所有的调试选项，输出最详细的调试信息，包括指令译码，处理执行，当前寄存器列表，csr列表等
-------------------------------------------------------------------------------
c: print cst operation msg
打开虚拟机的csr寄存器读写调试信息。读写csr寄存器的时候都会打印对应的csr寄存器的值
-------------------------------------------------------------------------------
a: diable all debug msg
关闭所有调试选项，译码调试默认打开
-------------------------------------------------------------------------------
x: enable test mode for exception
打开异常测试模式，当出现异常时结束运行
-------------------------------------------------------------------------------
g: enable better readability printing
使用可读性更好的方式打印信息
-------------------------------------------------------------------------------
e: disable all error msg
关闭所有的错误信息打印
-------------------------------------------------------------------------------
i: enable all instr debug msg
打开所有指令调试信息打印
-------------------------------------------------------------------------------
m: enable mmu debug msg
打开mmu的遍历调试信息
-------------------------------------------------------------------------------
p: print mmu page 8 byte data
hexdump打印mmu页表里的8字节数据
-------------------------------------------------------------------------------
P: print mmu page 4K Byte data
hexdump打印mmu页表里的4K字节数据
-------------------------------------------------------------------------------
s: uart addr not use mmu translation
启用mmu翻译时，忽略uart的外设地址，在启用了mmu的时候也可以直接通过uart原始物理地址来操作uart外设
-------------------------------------------------------------------------------
S: switch mode debug info
打开切换mode时的调试信息，m-mode,s-mode和u-mode切换的时候都会打印调试信息
-------------------------------------------------------------------------------
M: disable mmu err msg
关闭mmu缺页异常，访问异常，加载异常的错误信息
-------------------------------------------------------------------------------
r: enable trap debug msg
打印更详细的进入中断的调试信息
-------------------------------------------------------------------------------
A: enable addr translation debug print
打印地址转换的调试打印
-------------------------------------------------------------------------------
L(n): output_mode_sel n = 0 -> stdout
1 -> log_buf UNIX SYS ONLY(buf_size:(2900))
2 -> none
选择虚拟机输出的方式，1，直接标准输出。2，使用一个buf先缓存，退出的时候再输出bug大小2900Byte。3，不输出。
-------------------------------------------------------------------------------
l: enable endless loop check (RV_ENDLESS_LOOP_CHECK_EXIT_CNT:(3))
启用死循环监测机制，当有连续3次出现同样的指令执行流程(包括寄存器和csr寄存器的值都没有改变),结束虚拟机的运行。可以搭配-L参数使用，方便调试固件。一般assert都是直接死循环。
-------------------------------------------------------------------------------
#64 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-05-25 13:39:45
opensbi和kernel的代码已发布到github！！！
https://github.com/juiceRv/kernel_juicevm_port
kernel的配置文件在arch/riscv/configs/juicevm_defconfig,make ARCH=riscv juicevm_defconfig
需要修改下arch/riscv/configs/juicevm_defconfig里的CONFIG_INITRAMFS_SOURCE="/mnt/ssd_prj/risc-v_sim/sim/test/opensbi/opensbi-master/rootfs"
修改为opensbi里的路径
opensbi仓库
https://github.com/juiceRv/opensbi_juicevm_port
toolchains
https://github.com/juiceRv/gcc-gnu-toolchains-for-juicevm
#65 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-05-25 00:42:04
20210524进展公布，发布包发布juice_vm_release_for_Linux_c21682d3.zip：
1，修复了mtime在m-mode,s-mode和u-mode下的中断处理漏洞。
2，修复了ecall在s-mode下的漏洞。
3，修复了在s-mode和u-mode下进入异常模式，更新csr寄存器的漏洞。
4，移植了linux。
juice_vm成功运行kernel主线5.0.0。
juice_vm成功运行kernel主线5.0.0。
juice_vm成功运行kernel主线5.0.0。
#66 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-05-24 18:43:18
.png)
#67 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-05-08 15:59:40
20210508更新：
1，上传一个ubuntu20.04上可以正常运行的发布包,感谢@XBOOT大佬的反馈。
2，添加了div指令支持。
3，修复了divuw，divw，remu，remw，amomin.w，amoswap.w的指令错误。
juice_vm_for_Linux_b58244f3.zip
#68 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-05-08 10:55:19
kekemuyu 说：
bellard的riscv&x86模拟器
https://bellard.org/tinyemu/
谢谢大佬分享，一直也有关注这个天才大佬的项目。
#69 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-05-07 18:44:21
global_vm_log_init output_mode_sel: 0 JUICE_VM_LOG_MAX_NUM:2900
gg ,ggg, gg ,a8a, ,gggg, ,ggggggg, ,ggg, ,g,ggg, ,ggg,_,ggg,
dP8dP Y8a 88 ,8 8, ,88 Y8b,dP Y8dP Y8a ,8dP Y8dP Y88P Y8b
dP YYb, `88 88 d8 8b d8 `Yd8' a YYb, `88 d8Yb, `88' `88' `88
,8 `8` 88 88 88 88d8' 8b d88 Y8P'` 88 88 ` 88 88 88
I8 Yb 88 88 88 8,8I Y88P`8baaaa 88 88 88 88 88
`8b, `8, 88 88 Y8 8I8' ,d8P I8 8I 88 88 88
` Y88888 88 88 `8, ,8d8 d8 `8, ,8' 88 88 88
Y8 88 888888 8,8 Y8, Y8, Y8, ,8P 88 88 88
,88,Y8b,____,d88`8b, ,d8b,`Yba,,_____`Yba,,_____, Yb,_,dP 88 88 Y8,
,ad88888 Y888888P Y8 Y88P Y8 ` Y8888888 ` Y8888888 Y8P 88 88 `Y8
,dP ' Yb
,8' I8
,8' I8
I8, ,8'
`Y8,___,d8'
Y888P
email: juicemail@163.com
version:f259ffe5 f259ffe5 Fri, 7 May 2021 16:31:18 +0800 xiaoxiaohuixxh feat(vm): pass ui ua si test but lrsc and scr test
firm_addr:build/platform/juice/juiceRv/firmware/fw_payload.bin
fd = 3
file_size = 6169144
interrupt_vertor_register_mag_init
rv_csr_register_init
csr_addr_misa 8000000000040101
csr_addr_mvendorid 0000000000000000
csr_addr_marchid 0000000000000000
csr_addr_mimpid 0000000000000000
csr_addr_mhartid 0000000000000000
rv_peripheral_device_init
[rv64_sim][dev][mmu]rv.c(6114):rv_peripheral_device_mmu_init,Sv39 mode support only
[rv64_sim][dev][mtime]rv.c(5773):rv_peripheral_device_mtime_init
[rv64_sim][dev][mtime]rv.c(5792):pdev_mtime_irq_info 0x55f859de9110 92c00003 92c00007
[rv64_sim][proc][err]rv.c[interrupt_vertor_register](1910){pc:0000000000000000}:interrupt_vertor_register err->irq info err irq_v 1 addr_min 4
[rv64_sim][dev][mtime]rv.c(5803):pdev_mtime_irq_info_on_umode (nil) 92c00003 92c00007
[rv64_sim][dev][uart0]rv.c(5580):rv_peripheral_device_uart0_init
[rv64_sim][dev][uart0]rv.c(5596):pdev_uart0_irq_info 0x55f859de90f0
rv sim start...loading
cpu run...
[juiceRv]set_rv_scr csr_addr 0000000000000180(csr_addr_satp) new_v 0000000000000000
get_MODE_xsatp(get_rv_csr(csr_addr_satp)) 0
OpenSBI v0.9
____ _____ ____ _____
/ __ \ / ____| _ \_ _|
| | | |_ __ ___ _ __ | (___ | |_) || |
| | | | '_ \ / _ \ '_ \ \___ \| _ < | |
| |__| | |_) | __/ | | |____) | |_) || |_
\____/| .__/ \___|_| |_|_____/|____/_____|
| |
|_|
Platform Name : juice-JuiceRv
Platform Features : timer,mfdeleg
Platform HART Count : 1
Firmware Base : 0x80000000
Firmware Size : 80 KB
Runtime SBI Version : 0.3
Domain0 Name : root
Domain0 Boot HART : 0
Domain0 HARTs : 0*
Domain0 Region00 : 0x0000000080000000-0x000000008001ffff ()
Domain0 Region01 : 0x0000000000000000-0xffffffffffffffff (R,W,X)
Domain0 Next Address : 0x0000000080200000
Domain0 Next Arg1 : 0x0000000082200000
Domain0 Next Mode : S-mode
Domain0 SysReset : yes
Boot HART ID : 0
Boot HART Domain : root
Boot HART ISA : rv64ias
Boot HART Features : scounteren,mcounteren,time
Boot HART PMP Count : 64
Boot HART PMP Granularity : 4
Boot HART PMP Address Bits: 54
Boot HART MHPM Count : 29
Boot HART MHPM Count : 29
Boot HART MIDELEG : 0x0000000000000222
Boot HART MEDELEG : 0x000000000000b109
[juiceRv]set_rv_scr csr_addr 0000000000000105(csr_addr_stvec) new_v 0000000080200000
[juiceRv]set_rv_scr csr_addr 0000000000000180(csr_addr_satp) new_v 0000000000000000
get_MODE_xsatp(get_rv_csr(csr_addr_satp)) 0
H
D
C
B
M
S
R
R1[juiceRv]set_rv_scr csr_addr 0000000000000105(csr_addr_stvec) new_v ffffffff800003a4
23[juiceRv]set_rv_scr csr_addr 0000000000000180(csr_addr_satp) new_v 800000000008021c
get_MODE_xsatp(get_rv_csr(csr_addr_satp)) 8
[rv64_sim][dev][mmu][err]rv.c(6220):V:0 R:0 W:0
[rv64_sim][dev][mmu][err]rv.c(6221):如果pte.v = 0，或者pte.r = 0且pte.w = 1，则停止并引发与原始访问类型相对应的页面错误异常。
[rv64_sim][dev][mmu][err]rv.c(6305):rv_peripheral_device_mmu_translation pc:0000000080200394 va 0000000080200394 pa 0000000000000000
[rv64_sim][proc][err]rv.c[RISCVTrap](1404){pc:0000000080200394}:RV_exception_Instruction_page_fault va 0000000080200394
[rv64_sim][dev][mmu][err]rv.c(6317):this addr not found
5
[juiceRv]set_rv_scr csr_addr 0000000000000105(csr_addr_stvec) new_v ffffffff800003f0
6[juiceRv]set_rv_scr csr_addr 0000000000000180(csr_addr_satp) new_v 80000000000805a7
get_MODE_xsatp(get_rv_csr(csr_addr_satp)) 8
I
Parse_dtb
start_kernel
[ 0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
[ 0.000000] memblock_add enter
[ 0.000000] No DTB passed to the kernel
[ 0.000000] func start_kernel ( 647 )
[ 0.000000] func start_kernel ( 651 )
[ 0.000000] func start_kernel ( 653 )
[ 0.000000] func start_kernel ( 656 )
[ 0.000000] func start_kernel ( 659 )
[ 0.000000] func start_kernel ( 661 )
[ 0.000000] func start_kernel ( 668 )
[ 0.000000] func start_kernel ( 670 )
[ 0.000000] Linux version 5.0.0-g1e922e1de (xiaohui@DESKTOP-7HFR7VO) (gcc version 7.5.0 (Ubuntu 7.5.0-3ubuntu1~18.04)) #51 Mon Mar 29 01:40:29 CST 2021
[ 0.000000] func start_kernel ( 672 )
[ 0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
[ 0.000000] printk: bootconsole [sbi0] enabled
[ 0.000000]
[ 0.000000] reg->base: 80200000 reg->size: e00000
[ 0.000000]
[ 0.000000] mem_size: 0000000000e00000
[ 0.000000]
[ 0.000000] memblock_end_of_DRAM end addr: ffffffff800e269c
[ 0.000000] initrd not found or empty - disabling initrd
[ 0.000000]
[ 0.000000] memblock_dump_all end addr: ffffffff800217bc
[ 0.000000] Zone ranges:
[ 0.000000] DMA32 [mem 0x0000000080200000-0x0000000080ffffff]
[ 0.000000] Normal empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000080200000-0x0000000080ffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x0000000080ffffff]
[ 0.000000] On node 0 totalpages: 3584
[ 0.000000] memblock_alloc_try_nid_nopanic: 229376 bytes align=0x40 nid=0 from=0x0000000000000000 max_addr=0x0000000000000000 alloc_node_mem_map.constprop.34+0x70/0xc0
[ 0.000000] DMA32 zone: 49 pages used for memmap
[ 0.000000] DMA32 zone: 0 pages reserved
[ 0.000000] DMA32 zone: 3584 pages, LIFO batch:0
[ 0.000000] memblock_alloc_try_nid_nopanic: 8 bytes align=0x40 nid=0 from=0x0000000000000000 max_addr=0x0000000000000000 setup_usemap.isra.8+0x5c/0x78
[ 0.000000] memblock_alloc_try_nid: 2740 bytes align=0x8 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 early_init_dt_alloc_memory_arch+0x20/0x30
[ 0.000000] memblock_alloc_try_nid_nopanic: 67108864 bytes align=0x1000 nid=-1 from=0x0000000000000000 max_addr=0x00000000ffffffff swiotlb_init+0x64/0xd8
[ 0.000000] software IO TLB: Cannot allocate buffer
[ 0.000000] elf_hwcap is 0x1101
[ 0.000000] func start_kernel ( 696 )
[ 0.000000] func start_kernel ( 702 )
[ 0.000000] func start_kernel ( 704 )
[ 0.000000] func start_kernel ( 706 )
[ 0.000000] func start_kernel ( 708 )
[ 0.000000] memblock_alloc_try_nid: 67 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 start_kernel+0x1fc/0xcc8
[ 0.000000] memblock_alloc_try_nid: 67 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 start_kernel+0x228/0xcc8
[ 0.000000] memblock_alloc_try_nid: 67 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 start_kernel+0x250/0xcc8
[ 0.000000] func start_kernel ( 710 )
[ 0.000000] func start_kernel ( 712 )
[ 0.000000] memblock_alloc_try_nid_nopanic: 4096 bytes align=0x1000 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 pcpu_alloc_alloc_info+0x68/0xc4
[ 0.000000] memblock_alloc_try_nid_nopanic: 32768 bytes align=0x1000 nid=-1 from=0x0000000080200000 max_addr=0x0000000000000000 setup_per_cpu_areas+0x48/0xb8
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 pcpu_setup_first_chunk+0x394/0x78c
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 pcpu_setup_first_chunk+0x3b4/0x78c
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 pcpu_setup_first_chunk+0x3d0/0x78c
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 pcpu_setup_first_chunk+0x3ec/0x78c
rs1 >= 0 && rs2 >= 0rs1 >= 0 && rs2 >= 0rs1 >= 0 && rs2 >= 0[ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[ 0.000000] pcpu-alloc: [0] 0
[ 0.000000] memblock_alloc_try_nid: 240 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 pcpu_setup_first_chunk+0x69c/0x78c
[ 0.000000] memblock_alloc_try_nid: 105 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 pcpu_alloc_first_chunk+0x98/0x314
[ 0.000000] memblock_alloc_try_nid: 1024 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 pcpu_alloc_first_chunk+0xd8/0x314
[ 0.000000] memblock_alloc_try_nid: 1032 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 pcpu_alloc_first_chunk+0x100/0x314
[ 0.000000] memblock_alloc_try_nid: 160 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 pcpu_alloc_first_chunk+0x124/0x314
rs1 <= 0 && rs2 >= 0rs1 >= 0 && rs2 >= 0[ 0.000000] memblock_free: [0x0000000080fc6000-0x0000000080fc6fff] pcpu_free_alloc_info+0x24/0x34
[ 0.000000] func start_kernel ( 714 )
[ 0.000000] func start_kernel ( 716 )
[ 0.000000] func start_kernel ( 718 )
[ 0.000000] Built 1 zonelists, mobility grouping off. Total pages: 3535
[ 0.000000] func start_kernel ( 721 )
[ 0.000000] func start_kernel ( 723 )
[ 0.000000] Kernel command line: console=hvc0 earlycon=sbi console=hvc0 earlycon=sbi memblock=debug
[ 0.000000] func start_kernel ( 726 )
[ 0.000000] func start_kernel ( 728 )
[ 0.000000] func start_kernel ( 733 )
[ 0.000000] func start_kernel ( 737 )
[ 0.000000] func start_kernel ( 740 )
[ 0.000000] func start_kernel ( 747 )
[ 0.000000] memblock_alloc_try_nid_nopanic: 16384 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 alloc_large_system_hash+0x2c4/0x4c0
[ 0.000000] Dentry cache hash table entries: 2048 (order: 2, 16384 bytes)
[ 0.000000] memblock_alloc_try_nid_nopanic: 8192 bytes align=0x40 nid=-1 from=0x0000000000000000 max_addr=0x0000000000000000 alloc_large_system_hash+0x2c4/0x4c0
[ 0.000000] Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
[ 0.000000] func start_kernel ( 749 )
[ 0.000000] Sorting __ex_table...
[ 0.000000] func start_kernel ( 751 )
[juiceRv]set_rv_scr csr_addr 0000000000000105(csr_addr_stvec) new_v ffffffff80020e54
[ 0.000000] func start_kernel ( 753 )
[ 0.000000] func mm_init ( 621 )
[ 0.000000] Memory: 10068K/14336K available (2794K kernel code, 181K rwdata, 620K rodata, 128K init, 240K bss, 4268K reserved, 0K cma-reserved)
[ 0.000000] func mm_init ( 623 )
[rv64_sim][dev][mmu][err]rv.c(6220):V:0 R:0 W:0
[rv64_sim][dev][mmu][err]rv.c(6221):如果pte.v = 0，或者pte.r = 0且pte.w = 1，则停止并引发与原始访问类型相对应的页面错误异常。
[rv64_sim][dev][mmu][err]rv.c(6305):rv_peripheral_device_mmu_translation pc:ffffffff800b3004 va 000000017fc861df pa 0000000080579c10
[rv64_sim][proc][err]rv.c[RISCVTrap](1456){pc:ffffffff800b3004}:RV_exception_Load_page_fault va 000000017fc861df
[rv64_sim][dev][mmu][err]rv.c(6317):this addr not found
[ 0.000000] Unable to handle kernel paging request at virtual address 000000017fc861df
[ 0.000000] Oops [#1]
[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.0.0-g1e922e1de #51
[ 0.000000] sepc: ffffffff800b3004 ra : ffffffff800b3004 sp : ffffffff80379c20
[ 0.000000] gp : ffffffff803a3178 tp : ffffffff80382418 t0 : 0000000000008000
[ 0.000000] t1 : 0000000000000000 t2 : 0000000000000000 s0 : 000000017fc862ef
[ 0.000000] s1 : ffffffff80391468 a0 : 0000000000000000 a1 : ffffffff80de4008
[ 0.000000] a2 : 0000000000000001 a3 : 0000000000000000 a4 : 0000000000000000
[ 0.000000] a5 : ffffffffffffff01 a6 : 00000000000000ff a7 : 0000000000000000
[ 0.000000] s2 : 0000000000000000 s3 : 0000000000000000 s4 : ffffffff80391458
[ 0.000000] s5 : ffffffff8039fdf0 s6 : 000000007fc60188 s7 : 0000000000000001
[ 0.000000] s8 : 0000000000000001 s9 : 0000000000000000 s10: 0000000000000088
[ 0.000000] s11: 00000000003fffff t3 : ffffffff8039fe78 t4 : 0000000000000001
[ 0.000000] t5 : ffffffff8039fe78 t6 : c000000000000000
[ 0.000000] sstatus: 0000000000000000 sbadaddr: 000000017fc861df scause: 000000000000000d
[ 0.000000] random: get_random_bytes called from print_oops_end_marker+0x58/0x7c with crng_init=0
[ 0.000000] ---[ end trace c955a8d686188788 ]---
[ 0.000000] Kernel panic - not syncing: Attempted to kill the idle task!
[ 0.000000] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---
oops! stop!!!
------------------------global_vm_log_output global_vm_log_pos:0------------------------最新进度，linux kernel还是没跑起来
#70 Re: 全志 SOC » 全志D1-H/D1s RISC-V(基于平头哥C906) 哪吒开发板超全资料合集 » 2021-05-06 11:44:31
准备编译环境
sudo apt-get update
sudo apt-get install build-essential subversion git-core libncurses5-dev zlib1g-dev gawk flex quilt libssl-dev xsltproc libxml-parser-perl mercurial bzr ecj cvs unzip lib32z1 lib32z1-dev lib32stdc++6 libstdc++6 -y
sudo apt-get install libc6:i386 libstdc++6:i386 lib32ncurses5 lib32z1#71 技术人生/软件使用技巧/破解经验/技术吐槽/灌水 » 新发现一个github的国内加速镜像 » 2021-05-06 10:37:40
- xiaohui
- 回复： 3
先把 https://link.csdn.net/?target=https%3A%2F%2Fgithub.com%2FAAA%2FBBB
例如我们要访问的是 https://github.com/RT-Thread/rt-thread
那就把AAA修改成RT-Thread，BBB修改成rt-thread
https://link.csdn.net/?target=https%3A%2F%2Fgithub.com%2FRT-Thread%2Frt-thread
然后点击Github加速
#72 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-04-27 14:03:35
20210427更新：
提交了RT-Thread 的适配 到官方仓库：详情请点击https://github.com/RT-Thread/rt-thread/tree/master/bsp/juicevm
#73 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-04-27 13:56:43
#74 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-04-23 18:00:01
juice_vm_release_for_Linux_57ba985a.zip
20210424更新:
1. 已完成rt-thread移植。
2.新增-L参数用于指定打印日志方式。
3.新增-l参数用于在出现死循环的时候结束运行。
4.新增-r参数用于开启trap调试打印
5.更新了Alive logo。
6.新增-T参数用于执行过程输出反汇编调试打印。
7.新增m模块支持。
8.新增s-mode支持(u-mode支持中）。
#75 Re: Qt/MSVC/MINGW/C++/MFC/GTK+/Delphi/BCB » 请问一个windows祖传项目，只要include winsock2.h就会出现 GetSystemTime / HANDLE 链接出错 » 2021-03-24 14:48:02
#76 Re: Qt/MSVC/MINGW/C++/MFC/GTK+/Delphi/BCB » 请问一个windows祖传项目，只要include winsock2.h就会出现 GetSystemTime / HANDLE 链接出错 » 2021-03-24 14:46:50
#77 Re: Qt/MSVC/MINGW/C++/MFC/GTK+/Delphi/BCB » 请问一个windows祖传项目，只要include winsock2.h就会出现 GetSystemTime / HANDLE 链接出错 » 2021-03-24 14:29:05
#78 Re: 华芯微特 » SWM320成功移植micropython » 2021-03-22 14:47:16
#79 Re: RISC-V » 给risc-v标准内核适配freertos-kernel » 2021-03-06 18:38:46
20210306更新:https://whycan.com/t_5844.html#p60439
#80 Re: RISC-V » 关于risc-v的mtime的简单描述 » 2021-03-06 18:38:09
20210306更新:https://whycan.com/t_5844.html#p60439
#81 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-03-06 18:08:16
#82 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-03-06 17:52:58
juice_vm_release_for_Win64_f041c8a2.zip
202210306更新:
1. 已经支持了c语言编程。
2. 已完成freertos移植。
3. 已完成mebedtls移植。
4. 已完成mmu sv39测试。
5. 已完成mtimer测试。
6. 已完成opensbi移植。
添加了-m参数用于开启mmu调试信息
1113e998 add sfence.vma instr
f118d476 add print instr support
1e3e7204 add AMOSWAP.D LR.D and SC.D instr support
686741ea add AMOSWAP.D LR.D and SC.D instr support
f2f699c0 add -i arg to enable instr print support
113f66da add misa csr support
19cf60d1 fix divu err
ad512e54 add divu remw and remu instr
9abc0566 fix mem overflow
0ceb663e fix divw instr and add REMW instr
10a2ea78 fix divw instr
9c93c4ce add amoswap.w , mul and divw instr
df10ad45 change the fireware start addr to 0x80000000
d31b4ac1 add amoadd.w inst#83 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 捡了个便宜的高级ZYNQ XC7Z010 开发板玩玩 » 2021-01-25 13:48:57
lignin 说：
[FAILED] Failed to start Raise network interfaces.
网络出现问题了，这个要怎么办呢U-Boot 2019.01-07011-g5ff8217-dirty (Mar 31 2019 - 08:09:08 +0800) CPU: Zynq 7z010 Silicon: v3.1 Model: Zynq MicroZED Board I2C: ready DRAM: ECC disabled 256 MiB Watchdog: Started NAND: 128 MiB MMC: mmc@e0100000: 0 In: serial@e0001000 Out: serial@e0001000 Err: serial@e0001000 Net: ZYNQ GEM: e000b000, phyaddr 0, interface mii PHY is not detected GEM PHY init failed eth-1: ethernet@e000b000ZYNQ GEM: e000c000, phyaddr 1, interface rmii mdio_register: non unique device name 'eth0' , eth-1: ethernet@e000c000 384 bytes read in 13 ms (28.3 KiB/s) Importing environment from SD ... Hit any key to stop autoboot: 0 !!! !!! Booting cmd is deprecated (will be removed in 2020). !!! Please move to distro bootcmd. !!! Device: mmc@e0100000 Manufacturer ID: fe OEM: 3432 Name: SD16G Bus Speed: 50000000 Mode : SD High Speed (50MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 29.1 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes 384 bytes read in 10 ms (37.1 KiB/s) Loaded environment from uEnv.txt Importing environment from SD ... Running uenvcmd ... 2083852 bytes read in 140 ms (14.2 MiB/s) design filename = "design_1_wrapper;UserID=0XFFFFFFFF;Version=2018.3" part number = "7z010clg400" date = "2019/03/31" time = "07:11:02" bytes in bitstream = 2083740 zynq_align_dma_buffer: Align buffer at 100070 to fff80(swap 1) 4487928 bytes read in 273 ms (15.7 MiB/s) 14305 bytes read in 21 ms (665 KiB/s) ## Booting kernel from Legacy Image at 02080000 ... Image Name: Linux-4.4.30-xillinux-2.0 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 4487864 Bytes = 4.3 MiB Load Address: 00008000 Entry Point: 00008000 Verifying Checksum ... OK ## Flattened Device Tree blob at 02000000 Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Device Tree to 0eb10000, end 0eb167e0 ... OK Starting kernel ... Uncompressing Linux... done, booting the kernel. [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.30-xillinux-2.0 (eli@ocho.localdomain) (gcc version 4.7.3 (Sourcery CodeBench Lite 2013.05-40) ) #1 SMP PREEMPT Tue Dec 5 11:54:25 IST 2017 () [ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Machine model: Zynq ebit board [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.30-xillinux-2.0 (eli@ocho.localdomain) (gcc version 4.7.3 (Sourcery CodeBench Lite 2013.05-40) ) #1 SMP PREEMPT Tue Dec 5 11:54:25 IST 2017 () [ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Machine model: Zynq ebit board [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] bootconsole [uart0] enabled [ 0.000000] bootconsole [uart0] enabled [ 0.000000] cma: Reserved 16 MiB at 0x0f000000 [ 0.000000] cma: Reserved 16 MiB at 0x0f000000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] On node 0 totalpages: 65536 [ 0.000000] On node 0 totalpages: 65536 [ 0.000000] free_area_init_node: node 0, pgdat c08c6880, node_mem_map cedaf000 [ 0.000000] free_area_init_node: node 0, pgdat c08c6880, node_mem_map cedaf000 [ 0.000000] Normal zone: 576 pages used for memmap [ 0.000000] Normal zone: 576 pages used for memmap [ 0.000000] Normal zone: 0 pages reserved [ 0.000000] Normal zone: 0 pages reserved [ 0.000000] Normal zone: 65536 pages, LIFO batch:15 [ 0.000000] Normal zone: 65536 pages, LIFO batch:15 [ 0.000000] PERCPU: Embedded 12 pages/cpu @ced8b000 s18880 r8192 d22080 u49152 [ 0.000000] PERCPU: Embedded 12 pages/cpu @ced8b000 s18880 r8192 d22080 u49152 [ 0.000000] pcpu-alloc: s18880 r8192 d22080 u49152 alloc=12*4096[ 0.000000] pcpu-alloc: s18880 r8192 d22080 u49152 alloc=12*4096 [ 0.000000] pcpu-alloc: [ 0.000000] pcpu-alloc: [0] [0] 0 0 [0] [0] 1 1 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 64960 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 64960 [ 0.000000] Kernel command line: console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk earlycon loglevel=8 rootfstype=ext4 rootwait [ 0.000000] Kernel command line: console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk earlycon loglevel=8 rootfstype=ext4 rootwait [ 0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes) [ 0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes) [ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) [ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) [ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) [ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) [ 0.000000] Memory: 233572K/262144K available (6155K kernel code, 294K rwdata, 2192K rodata, 312K init, 472K bss, 12188K reserved, 16384K cma-reserved, 0K highmem) [ 0.000000] Memory: 233572K/262144K available (6155K kernel code, 294K rwdata, 2192K rodata, 312K init, 472K bss, 12188K reserved, 16384K cma-reserved, 0K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xd0800000 - 0xff800000 ( 752 MB) [ 0.000000] lowmem : 0xc0000000 - 0xd0000000 ( 256 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc082f0c4 (8349 kB) [ 0.000000] .init : 0xc0830000 - 0xc087e000 ( 312 kB) [ 0.000000] .data : 0xc087e000 - 0xc08c7840 ( 295 kB) [ 0.000000] .bss : 0xc08c7840 - 0xc093da38 ( 473 kB) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xd0800000 - 0xff800000 ( 752 MB) [ 0.000000] lowmem : 0xc0000000 - 0xd0000000 ( 256 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc082f0c4 (8349 kB) [ 0.000000] .init : 0xc0830000 - 0xc087e000 ( 312 kB) [ 0.000000] .data : 0xc087e000 - 0xc08c7840 ( 295 kB) [ 0.000000] .bss : 0xc08c7840 - 0xc093da38 ( 473 kB) [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. [ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2 [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2 [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] slcr mapped to d0800000 [ 0.000000] slcr mapped to d0800000 [ 0.000000] L2C: platform modifies aux control register: 0x72360000 -> 0x72760000 [ 0.000000] L2C: platform modifies aux control register: 0x72360000 -> 0x72760000 [ 0.000000] L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000 [ 0.000000] L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000 [ 0.000000] L2C-310 erratum[ 0.000000] L2C-310 erratum 769419 769419 enabled enabled [ 0.000000] L2C-310 enabling early BRESP for Cortex-A9 [ 0.000000] L2C-310 enabling early BRESP for Cortex-A9 [ 0.000000] L2C-310 full line of zeros enabled for Cortex-A9 [ 0.000000] L2C-310 full line of zeros enabled for Cortex-A9 [ 0.000000] L2C-310 ID prefetch enabled, offset 1 lines [ 0.000000] L2C-310 ID prefetch enabled, offset 1 lines [ 0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled [ 0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled [ 0.000000] L2C-310 cache controller enabled, 8 ways, 512 kB [ 0.000000] L2C-310 cache controller enabled, 8 ways, 512 kB [ 0.000000] L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001 [ 0.000000] L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001 [ 0.000000] zynq_clock_init: clkc starts at d0800100 [ 0.000000] zynq_clock_init: clkc starts at d0800100 [ 0.000000] Zynq clock init [ 0.000000] Zynq clock init [ 0.000011] sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns [ 0.000011] sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns [ 0.015865] clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns [ 0.015865] clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns [ 0.038011] clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns [ 0.038011] clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns [ 0.056183] timer #0 at d0808000, irq=17 [ 0.056183] timer #0 at d0808000, irq=17 [ 0.064441] Console: colour dummy device 80x30 [ 0.064441] Console: colour dummy device 80x30 [ 0.073204] Calibrating delay loop... [ 0.073204] Calibrating delay loop... 1332.01 BogoMIPS (lpj=6660096) 1332.01 BogoMIPS (lpj=6660096) [ 0.169626] pid_max: default: 32768 minimum: 301 [ 0.169626] pid_max: default: 32768 minimum: 301 [ 0.178997] Security Framework initialized [ 0.178997] Security Framework initialized [ 0.187111] Yama: becoming mindful. [ 0.187111] Yama: becoming mindful. [ 0.194177] AppArmor: AppArmor initialized [ 0.194177] AppArmor: AppArmor initialized [ 0.202365] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.202365] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.215575] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.215575] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.230393] Initializing cgroup subsys io [ 0.230393] Initializing cgroup subsys io [ 0.238310] Initializing cgroup subsys memory [ 0.238310] Initializing cgroup subsys memory [ 0.247057] Initializing cgroup subsys devices [ 0.247057] Initializing cgroup subsys devices [ 0.255950] Initializing cgroup subsys freezer [ 0.255950] Initializing cgroup subsys freezer [ 0.264854] Initializing cgroup subsys net_cls [ 0.264854] Initializing cgroup subsys net_cls [ 0.273751] Initializing cgroup subsys perf_event [ 0.273751] Initializing cgroup subsys perf_event [ 0.283191] Initializing cgroup subsys net_prio [ 0.283191] Initializing cgroup subsys net_prio [ 0.292272] Initializing cgroup subsys pids [ 0.292272] Initializing cgroup subsys pids [ 0.300693] CPU: Testing write buffer coherency: [ 0.300693] CPU: Testing write buffer coherency: ok ok [ 0.310657] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.310657] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.321901] Setting up static identity map for 0x82c0 - 0x82f4 [ 0.321901] Setting up static identity map for 0x82c0 - 0x82f4 [ 0.504160] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.504160] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.504263] Brought up 2 CPUs [ 0.504263] Brought up 2 CPUs [ 0.521416] SMP: Total of 2 processors activated (2664.03 BogoMIPS). [ 0.521416] SMP: Total of 2 processors activated (2664.03 BogoMIPS). [ 0.534139] CPU: All CPU(s) started in SVC mode. [ 0.534139] CPU: All CPU(s) started in SVC mode. [ 0.544468] devtmpfs: initialized [ 0.544468] devtmpfs: initialized [ 0.555046] evm: security.selinux [ 0.555046] evm: security.selinux [ 0.561556] evm: security.SMACK64 [ 0.561556] evm: security.SMACK64 [ 0.568244] evm: security.SMACK64EXEC [ 0.568244] evm: security.SMACK64EXEC [ 0.575595] evm: security.SMACK64TRANSMUTE [ 0.575595] evm: security.SMACK64TRANSMUTE [ 0.583786] evm: security.SMACK64MMAP [ 0.583786] evm: security.SMACK64MMAP [ 0.591153] evm: security.ima [ 0.591153] evm: security.ima [ 0.597119] evm: security.capability [ 0.597119] evm: security.capability [ 0.604732] VFP support v0.3: [ 0.604732] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4 implementor 41 architecture 3 part 30 variant 9 rev 4 [ 0.620199] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.620199] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.640901] pinctrl core: initialized pinctrl subsystem [ 0.640901] pinctrl core: initialized pinctrl subsystem [ 0.652783] NET: Registered protocol family 16 [ 0.652783] NET: Registered protocol family 16 [ 0.663664] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.663664] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.689297] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers. [ 0.689297] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers. [ 0.705203] hw-breakpoint: maximum watchpoint size is 4 bytes. [ 0.705203] hw-breakpoint: maximum watchpoint size is 4 bytes. [ 0.717002] zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xd0880000 [ 0.717002] zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xd0880000 [ 0.730550] zynq-pinctrl 700.pinctrl: zynq pinctrl initialized [ 0.730550] zynq-pinctrl 700.pinctrl: zynq pinctrl initialized [ 0.787490] GPIO IRQ not connected [ 0.787490] GPIO IRQ not connected [ 0.794237] XGpio: /amba_pl/gpio@41200000: registered, base is 904 [ 0.794237] XGpio: /amba_pl/gpio@41200000: registered, base is 904 [ 0.806867] GPIO IRQ not connected [ 0.806867] GPIO IRQ not connected [ 0.813550] XGpio: /amba_pl/gpio@41210000: registered, base is 899 [ 0.813550] XGpio: /amba_pl/gpio@41210000: registered, base is 899 [ 0.827036] vgaarb: loaded [ 0.827036] vgaarb: loaded [ 0.835077] SCSI subsystem initialized [ 0.835077] SCSI subsystem initialized [ 0.842941] usbcore: registered new interface driver usbfs [ 0.842941] usbcore: registered new interface driver usbfs [ 0.853897] usbcore: registered new interface driver hub [ 0.853897] usbcore: registered new interface driver hub [ 0.864538] usbcore: registered new device driver usb [ 0.864538] usbcore: registered new device driver usb [ 0.874886] media: Linux media interface: v0.10 [ 0.874886] media: Linux media interface: v0.10 [ 0.883879] Linux video capture interface: v2.00 [ 0.883879] Linux video capture interface: v2.00 [ 0.893260] pps_core: LinuxPPS API ver. 1 registered [ 0.893260] pps_core: LinuxPPS API ver. 1 registered [ 0.903084] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> [ 0.903084] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> [ 0.921358] PTP clock support registered [ 0.921358] PTP clock support registered [ 0.929539] EDAC MC: Ver: 3.0.0 [ 0.929539] EDAC MC: Ver: 3.0.0 [ 0.955065] NetLabel: Initializing [ 0.955065] NetLabel: Initializing [ 0.961749] NetLabel: domain hash size = 128 [ 0.961749] NetLabel: domain hash size = 128 [ 0.970521] NetLabel: protocols = UNLABELED CIPSOv4 [ 0.970521] NetLabel: protocols = UNLABELED CIPSOv4 [ 0.980508] NetLabel: unlabeled traffic allowed by default [ 0.980508] NetLabel: unlabeled traffic allowed by default [ 0.992011] clocksource: Switched to clocksource arm_global_timer [ 0.992011] clocksource: Switched to clocksource arm_global_timer [ 1.004817] AppArmor: AppArmor Filesystem Enabled [ 1.004817] AppArmor: AppArmor Filesystem Enabled [ 1.027279] NET: Registered protocol family 2 [ 1.027279] NET: Registered protocol family 2 [ 1.036770] TCP established hash table entries: 2048 (order: 1, 8192 bytes) [ 1.036770] TCP established hash table entries: 2048 (order: 1, 8192 bytes) [ 1.050611] TCP bind hash table entries: 2048 (order: 2, 16384 bytes) [ 1.050611] TCP bind hash table entries: 2048 (order: 2, 16384 bytes) [ 1.063502] TCP: Hash tables configured (established 2048 bind 2048) [ 1.063502] TCP: Hash tables configured (established 2048 bind 2048) [ 1.076460] UDP hash table entries: 256 (order: 1, 8192 bytes) [ 1.076460] UDP hash table entries: 256 (order: 1, 8192 bytes) [ 1.088041] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) [ 1.088041] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) [ 1.100807] NET: Registered protocol family 1 [ 1.100807] NET: Registered protocol family 1 [ 1.109824] RPC: Registered named UNIX socket transport module. [ 1.109824] RPC: Registered named UNIX socket transport module. [ 1.121560] RPC: Registered udp transport module. [ 1.121560] RPC: Registered udp transport module. [ 1.130980] RPC: Registered tcp transport module. [ 1.130980] RPC: Registered tcp transport module. [ 1.140403] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 1.140403] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 1.153332] PCI: CLS 0 bytes, default 64 [ 1.153332] PCI: CLS 0 bytes, default 64 [ 1.161811] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available [ 1.161811] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available [ 1.179314] futex hash table entries: 512 (order: 3, 32768 bytes) [ 1.179314] futex hash table entries: 512 (order: 3, 32768 bytes) [ 1.191513] audit: initializing netlink subsys (disabled) [ 1.191513] audit: initializing netlink subsys (disabled) [ 1.202261] audit: type=2000 audit(1.069:1): initialized [ 1.202261] audit: type=2000 audit(1.069:1): initialized [ 1.213338] Initialise system trusted keyring [ 1.213338] Initialise system trusted keyring [ 1.222654] VFS: Disk quotas dquot_6.6.0 [ 1.222654] VFS: Disk quotas dquot_6.6.0 [ 1.230445] VFS: Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) [ 1.230445] VFS: Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) [ 1.244773] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 1.244773] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 1.257135] NFS: Registering the id_resolver key type [ 1.257135] NFS: Registering the id_resolver key type [ 1.267156] Key type id_resolver registered [ 1.267156] Key type id_resolver registered [ 1.275521] Key type id_legacy registered [ 1.275521] Key type id_legacy registered [ 1.283633] nfs4filelayout_init: NFSv4 File Layout Driver Registering... [ 1.283633] nfs4filelayout_init: NFSv4 File Layout Driver Registering... [ 1.297056] jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc. [ 1.297056] jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc. [ 1.311515] Allocating IMA MOK and blacklist keyrings. [ 1.311515] Allocating IMA MOK and blacklist keyrings. [ 1.323393] Key type asymmetric registered [ 1.323393] Key type asymmetric registered [ 1.331469] Asymmetric key parser 'x509' registered [ 1.331469] Asymmetric key parser 'x509' registered [ 1.341390] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 248) [ 1.341390] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 248) [ 1.356200] io scheduler noop registered [ 1.356200] io scheduler noop registered [ 1.363954] io scheduler deadline registered (default) [ 1.363954] io scheduler deadline registered (default) [ 1.374269] io scheduler cfq registered [ 1.374269] io scheduler cfq registered [ 1.393896] e0000000.serial: ttyPS1 at MMIO 0xe0000000 (irq = 145, base_baud = 6249999) is a xuartps [ 1.393896] e0000000.serial: ttyPS1 at MMIO 0xe0000000 (irq = 145, base_baud = 6249999) is a xuartps [ 1.412428] e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 146, base_baud = 6249999) is a xuartps [ 1.412428] e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 146, base_baud ▒[ 1.430706] console [ttyPS0] enabled [ 1.430706] console [ttyPS0] enabled [ 1.430706] console [ttyPS0] enabled [ 1.441378] bootconsole [earlycon0] disabled [ 1.441378] bootconsole [earlycon0] disabled [ 1.441378] bootconsole [earlycon0] disabled [ 1.454227] bootconsole [uart0] disabled [ 1.454227] bootconsole [uart0] disabled [ 1.462932] xdevcfg f8007000.devcfg: ioremap 0xf8007000 to d0852000 [ 1.485167] brd: module loaded [ 1.495591] loop: module loaded [ 1.517212] libphy: Fixed MDIO Bus: probed [ 1.521835] macb e000b000.ethernet: invalid hw address, using random [ 1.529455] libphy: MACB_mii_bus: probed [ 1.535271] macb e000b000.ethernet eth0: no PHY found [ 1.562379] macb e000c000.ethernet: invalid hw address, using random [ 1.569476] libphy: MACB_mii_bus: probed [ 1.652167] macb e000c000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000c000 irq 151 (1a:df:a3:66:a0:e2) [ 1.662048] macb e000c000.ethernet eth0: attached PHY driver [Generic PHY] (mii_bus:phy_addr=e000c000.etherne:01, irq=-1) [ 1.674275] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 1.680723] ehci-pci: EHCI PCI platform driver [ 1.685246] ehci-platform: EHCI generic platform driver [ 1.690597] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 1.696743] ohci-pci: OHCI PCI platform driver [ 1.701195] ohci-platform: OHCI generic platform driver [ 1.706533] uhci_hcd: USB Universal Host Controller Interface driver [ 1.713030] usbcore: registered new interface driver usb-storage [ 1.719416] mousedev: PS/2 mouse device common for all mice [ 1.735523] i2c /dev entries driver [ 1.740154] device-mapper: uevent: version 1.0.3 [ 1.744999] device-mapper: ioctl: 4.34.0-ioctl (2015-10-28) initialised: dm-devel@redhat.com [ 1.753455] sdhci: Secure Digital Host Controller Interface driver [ 1.759547] sdhci: Copyright(c) Pierre Ossman [ 1.763926] sdhci-pltfm: SDHCI platform and OF driver helper [ 1.769962] sdhci-arasan e0100000.mmc: No vmmc regulator found [ 1.775739] sdhci-arasan e0100000.mmc: No vqmmc regulator found [ 1.822059] mmc0: SDHCI controller on e0100000.mmc [e0100000.mmc] using ADMA [ 1.829690] ledtrig-cpu: registered to indicate activity on CPUs [ 1.837154] Key type dns_resolver registered [ 1.841669] Registering SWP/SWPB emulation handler [ 1.847269] registered taskstats version 1 [ 1.851290] Loading compiled-in X.509 certificates [ 1.857274] Key type encrypted registered [ 1.861224] AppArmor: AppArmor sha1 policy hashing enabled [ 1.866854] ima: No TPM chip found, activating TPM-bypass! [ 1.872420] evm: HMAC attrs: 0x1 [ 1.876069] hctosys: unable to open rtc device (rtc0) [ 1.886851] md: Waiting for all devices to be available before autodetect [ 1.893638] md: If you don't use raid, use raid=noautodetect [ 1.899340] mmc0: new high speed SDHC card at address 0001 [ 1.905392] mmcblk0: mmc0:0001 SD16G 29.1 GiB [ 1.910823] mmcblk0: p1 p2 [ 1.915575] md: Autodetecting RAID arrays. [ 1.919594] md: Scanned 0 and added 0 devices. [ 1.924058] md: autorun ... [ 1.926796] md: ... autorun DONE. [ 2.355765] EXT4-fs (mmcblk0p2): recovery complete [ 2.361886] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) [ 2.369959] VFS: Mounted root (ext4 filesystem) on device 179:2. [ 2.377109] devtmpfs: mounted [ 2.380319] Freeing unused kernel memory: 312K (c0830000 - c087e000) [ 2.923904] systemd[1]: System time before build time, advancing clock. [ 2.966993] systemd[1]: Failed to insert module 'autofs4': No such file or di[ 3.032693] systemd[1]: systemd 237 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD -IDN2 +IDN -PCRE2 default-hierarchy=hybr▒+▒r▒▒▒▒▒▒▒systemd[1]: Detected architecture arm. Welcome to PynqLinux, based on Ubuntu 18.04! [ 3.573953] systemd[1]: File /lib/systemd/system/systemd-journald.service:36 configures an IP firewall (IPAddressDeny=any), but the local system does not sup▒+▒r▒ʂʲ▒▒systemd[1]: Proceeding WITHOUT firewalling in effect! (This warning is ▒+▒rʊ▒▒▒▒▒random: systemd: uninitialized urandom read (16 bytes read, 38 bits of[ OK ] Created slice System Slice.ystem Slice. [ 3.952272] random: systemd: uninitialized urandom read (16 bytes read, 39 bi[ OK ] Created slice system-getty.slice.getty.slice. [ 3.982191] random: systemd: uninitialized urandom read (16 bytes read, 39 bi[ OK ] Listening on /dev/initctl Compatibility Named Pipe.y Named Pipe. [ 4.022213] random: systemd: uninitialized urandom read (16 bytes read, 39 bi[ OK ] Listening on udev Control Socket.ntrol Socket. [ 4.052209] random: systemd: uninitialized urandom read (16 bytes read, 39 bi[ OK ] Created slice system-serial\x2dgetty.slice.2dgetty.slice. [ 4.082726] random: systemd: uninitialized urandom read (16 bytes read, 39 bi[ OK ] Listening on Journal Audit Socket.udit Socket. [ 4.112239] random: systemd: uninitialized urandom read (16 bytes read, 39 bi[ OK ] Created slice User and Session Slice.Session Slice. [ 4.142190] random: systemd: uninitialized urandom read (16 bytes read, 39 bi[ OK ] Reached target Remote File Systems.File Systems. [ 4.172304] random: systemd: uninitialized urandom read (16 bytes read, 39 bi▒+▒r▒▒▒▒▒systemd[1]: Started Dispatch Password Requests to Console Directory Wa[ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 4.212186] random: systemd: uninitialized urandom read (16 bytes read, 39 bi[ OK ] Reached target Slices.arget Slices. [ OK ] Listening on udev Kernel Socket.dev Kernel Socket. [ OK ] Listening on Journal Socket.on Journal Socket. Starting Restore / save the current clock...e current clock... Mounting POSIX Message Queue File System...eue File System... Starting Remount Root and Kernel File Systems...el File Systems... Starting Nameserver information manager...rmation manager... Mounting Kernel Debug File System...bug File System... [ OK ] Listening on Journal Socket (/dev/log).Socket (/dev/log). [ OK ] Reached target System Time Synchronized.Time Synchronized. [ OK ] Listening on Syslog Socket. on Syslog Socket. Starting Journal Service...Journal Service... [ OK ] Started ntp-systemd-netif.path.ystemd-netif.path. Starting Create Static Device Nodes in /dev...e Nodes in /dev... [ 4.693006] systemd[1]: Started Forward Password Requests to Wall Directory W[ OK ] Started Forward Password Requests to Wall Directory Watch. [ OK ] Reached target Local Encrypted Volumes.Encrypted Volumes. Starting Load Kernel Modules... Kernel Modules... Starting udev Coldplug all Devices...lug all Devices... [ OK ] Started Journal Service.d Journal Service. [ OK ] Started Restore / save the current clock. [ OK ] Mounted POSIX Message Queue File System. [ OK ] Started Remount Root and Kernel File Systems. [ OK ] Mounted Kernel Debug File System. [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Started Load Kernel Modules. [ OK ] Started Nameserver information manager. [ OK ] Reached target Network (Pre). Starting Apply Kernel Variables... [ OK ] Reached target Local File Systems (Pre). Starting udev Kernel Device Manager... [ OK ] Reached target Local File Systems. Starting Enable support for additional executable binary formats... Starting Load/Save Random Seed... Activating swap /var/swap... Starting Flush Journal to Persistent Storage... [ OK ] Started Apply Kernel Variables. [ OK ] Started Enable support for additional executable binary formats. Starting Raise network interfaces... [ OK ] Started Load/Save Random Seed. [ OK ] Started udev Kernel Device Manager. [ OK ] Started udev Coldplug all Devices. [ OK ] Activated swap /var/swap. [ OK ] Reached target Swap. [ OK ] Found device /dev/ttyPS0. [ OK ] Started Flush Journal to Persistent Storage. Starting Create Volatile Files and Directories... [ OK ] Started Create Volatile Files and Directories. Starting Network Name Resolution... Starting Network Time Synchronization... Starting Update UTMP about System Boot/Shutdown... [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Started Network Name Resolution. [ OK ] Found device /sys/subsystem/net/devices/eth0. [ OK ] Started Network Time Synchronization. [ OK ] Started ifup for eth0. [ OK ] Reached target Host and Network Name Lookups. [ OK ] Reached target System Initialization. [ OK ] Started Discard unused blocks once a week. [ OK ] Started Message of the Day. [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Started resolvconf-pull-resolved.path. [ OK ] Reached target Paths. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ OK ] Reached target Basic System. Starting System Logging Service... Starting PYNQ PL Server... Starting Login Service... Starting Resize Filesystem on SD card... Starting Jupyter Notebook Server... Starting resolvconf-pull-resolved.service... [ OK ] Started D-Bus System Message Bus. [ OK ] Started Login Service. [ OK ] Started Regular background program processing daemon. [ OK ] Started ntp-systemd-netif.service. [ OK ] Started Daily apt download activities. [ OK ] Started Daily apt upgrade and clean activities. [ OK ] Reached target Timers. Starting WPA supplicant... [ OK ] Started Set the CPU Frequency Scaling governor. Starting LSB: Load kernel modules needed to enable cpufreq scaling... [ OK ] Started System Logging Service. [ OK ] Started PYNQ PL Server. [ OK ] Started Resize Filesystem on SD card. [ OK ] Started resolvconf-pull-resolved.service. [ OK ] Started WPA supplicant. [FAILED] Failed to start Raise network interfaces. See 'systemctl status networking.service' for details. [ OK ] Reached target Network. Starting Permit User Sessions... [ OK ] Reached target Network is Online. [ OK ] Started ISC DHCP IPv6 server. [ OK ] Started ISC DHCP IPv4 server. Starting Samba NMB Daemon... Starting OpenBSD Secure Shell server... [ OK ] Started Unattended Upgrades Shutdown. [ OK ] Started Permit User Sessions. [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyPS0. [ OK ] Reached target Login Prompts. [ OK ] Started LSB: Load kernel modules needed to enable cpufreq scaling. Starting LSB: set CPUFreq kernel parameters... [ OK ] Started LSB: set CPUFreq kernel parameters. [ OK ] Started OpenBSD Secure Shell server. [ OK ] Started Samba NMB Daemon. Starting Samba SMB Daemon... [ OK ] Started Samba SMB Daemon. [ OK ] Reached target Multi-User System. [ OK ] Reached target Graphical Interface. Starting Update UTMP about System Runlevel Changes... [ OK ] Started Update UTMP about System Runlevel Changes. PYNQ Linux, based on Ubuntu 18.04 pynq ttyPS0 pynq login: xilinx (automatic login) Last login: Mon Sep 10 19:44:12 UTC 2018 on ttyPS0 Welcome to PYNQ Linux, based on Ubuntu 18.04 (GNU/Linux 4.4.30-xillinux-2.0 armv7l)
建议先试试原系统的网络是否正常
#84 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 捡了个便宜的高级ZYNQ XC7Z010 开发板玩玩 » 2021-01-25 13:48:21
#85 Re: RISC-V » 诛仙剑 C-SKY Linux 开发板 入坑记录 » 2021-01-21 20:19:05
#86 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-01-19 18:07:08
更新，发布安卓版本的可执行文件：juice_vm_android_0420de4b.zip
这个发布包里没有包含测试例子，测试例子使用本帖一楼的测试即可。
#88 Re: 全志 SOC » 开源自己画的H3四层板打板只要50块 » 2021-01-15 20:35:38
#89 Re: 全志 SOC » 开源自己画的H3四层板打板只要50块 » 2021-01-15 20:34:17
#90 Re: 好钜润半导体(TIKY) » TKM32F499GT8评估板资料集 » 2021-01-14 23:53:27
#91 Re: 好钜润半导体(TIKY) » TKM32F499GT8评估板资料集 » 2021-01-14 23:51:13
#92 Re: RISC-V » 刚收到货的 诛仙剑 C-SKY Linux 开发板 » 2021-01-14 20:07:03
#93 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-01-14 17:29:50
#96 Re: 计算机图形/GUI/RTOS/FileSystem/OpenGL/DirectX/SDL2 » 求助arm linux下运行littlevgl » 2021-01-11 18:56:19
#97 Re: RISC-V » 高云FPGA初体验【跑马灯】 » 2021-01-11 18:35:02
#98 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-01-11 17:58:17
测试例程所用的编译器下载链接，传送门：https://www.sifive.com/software#GCC
#99 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-01-11 17:42:24
#100 Re: RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-01-11 17:33:45
附上之前的freertos移植流程，传送门:https://whycan.com/t_5766.html
#101 Re: RISC-V » 给risc-v标准内核适配freertos-kernel » 2021-01-11 17:30:05
xiaohui 说：
流氓兔 说：楼主大哥优秀，有移植好的代码包吗？
虚拟机也顺便发布了,传送门:https://whycan.com/t_5844.html#p58010
#102 RISC-V » [juicevm] 只需要不到5000行代码实现一个risc-v虚拟机，纯c语言实现，无第三方库，支持ESP32 & GDB » 2021-01-11 17:12:11
- xiaohui
- 回复： 68
基于指令集 rv64i
实现了mtime，超级精简的uart和mmu sv39.
支持的参数：
-a 关闭所有调试打印
-e 关闭错误打印
-g 用更好的方式来显示打印
-d 开启所有调试打印(包括寄存器和csr列表)
juice_vm_release_for_Linux_and_win_0420de4b.zip
以下 2021-03-06 更新:
--------------------------------
无第三方库不到5000行C语言实现一个risc-v虚拟机，带mmu
基于指令集 rv64i
实现了mtime，超级精简的uart和mmu sv39.
支持的参数：
-a 关闭所有调试打印
-e 关闭错误打印
-g 用更好的方式来显示打印
-d 开启所有调试打印(包括寄存器和csr列表)
-i 开启指令解码调试信息
-m 开启mmu调试信息
1. 已经支持了c语言编程。
2. 已完成freertos移植。
3. 已完成mebedtls移植。
4. 已完成mmu sv39测试。
5. 已完成mtimer测试。
6. 已完成opensbi移植。
#103 Re: RISC-V » 给risc-v标准内核适配freertos-kernel » 2021-01-11 17:04:02
流氓兔 说：
楼主大哥优秀，有移植好的代码包吗？
#104 Re: RISC-V » 给risc-v标准内核适配freertos-kernel » 2021-01-11 13:59:54
#108 Re: 好钜润半导体(TIKY) » TKM32F499配4.0寸IPS屏在RGB888模式下截屏功能 » 2021-01-09 14:11:30
拉轰的脚踏车 说：
xiaohui 说：拉轰的脚踏车 说：看了一下， 是不支持 mov 格式的视频， 得转成 h.264编码的mp4格式文件才行。
此处@晕哥
好像大部分是 浏览器不支持非 mp4 文件。
有在线的视频转码网站的。 https://convertio.co/zh/mp4-converter/
#110 Re: ST/STM8/STM8S/STM8L » 开源自己DIY的恒温控制器(养小动物的) » 2021-01-09 14:08:24
#111 Re: 全志 SOC » 开源自己画的H3四层板打板只要50块 » 2021-01-09 14:07:54
哇酷小二 说：
在坑网下载了，github的星星也给了，感谢分享
#112 Re: ST/STM8/STM8S/STM8L » 开源自己DIY的恒温控制器(养小动物的) » 2021-01-09 14:06:05
#114 Re: 全志 SOC » V3s新手，谁帮忙下载晕哥的文件到网盘一下，多谢 » 2021-01-08 12:37:08
#115 Re: 全志 SOC » 编译开源播放器madplayer，播放音乐 » 2021-01-08 12:33:40
#116 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 捡了个便宜的高级ZYNQ XC7Z010 开发板玩玩 » 2021-01-05 10:28:37
#117 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 捡了个便宜的高级ZYNQ XC7Z010 开发板玩玩 » 2021-01-04 15:27:33
#118 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 捡了个便宜的高级ZYNQ XC7Z010 开发板玩玩 » 2021-01-04 15:22:12
#119 Re: RISC-V » 给risc-v标准内核适配freertos-kernel » 2020-12-31 13:40:20
#120 Re: 计算机图形/GUI/RTOS/FileSystem/OpenGL/DirectX/SDL2 » QtCreator 建立 FreeRTOS 模拟器，可以单步调试 (编写中...) » 2020-12-30 14:22:01
#121 Re: 全志 SOC » 全志V831芯片裸机开发日记--移植V831到xboot » 2020-12-30 14:19:26
#122 Re: ESP32/ESP8266 » esp32s2移植VSF，顺便跑起USB主机协议栈 » 2020-12-30 14:08:01
vsf 说：
已经提交，工程位于source/example/template/project/cmake/esp32s2下
编译的话，需要定义一个全局的环境变量VSF_PATH，设置为clone的vsf的目录
然后，使用esp的方式直接编译即可。如果编译过程总，提供btstack文件找不到的话，做如下修改：
1. main/CMakeLists.txt中，去掉btstack的.c，以及去掉btstack_demo.c
2. source/example/template/config/vsf_usr_cfg/vsf_usr_cfg_esp32s2.h里，APP_USE_BTSTACK_DEMO配置为DISABLEDesp32的windows环境下，遇到一些问题，就是如果参与编译的文件太多，连接会出错，官方没有提供任何解决方案。
linux环境下没问题。
解决方法，去掉一些模块，修改source/vsf/component/CMakeLists.txt，去掉3rd-parth、crypto、debugger、tcpip、ui。当然，实际可能不需要去掉这么多
支持，难见的好项目
#123 RISC-V » 关于risc-v的mtime的简单描述 » 2020-12-29 22:23:33
- xiaohui
- 回复： 3
关于risc-v的mtime的简单描述
在risc-v里mtime是作为外设存在的，他的寄存器地址不在risc-v的规范范围内，是有soc设计厂商自己定义的。mtime包括了两个寄存器mtime和mtimecmp。这两个寄存器的长度在官方的规范里规定是64bit(无论xlen是多少）
mtime的中断使能在csrji寄存器mie(machine interrupt enable)里指定。
mtime中断发生时，ecode为7(特权文档版本：1.12-draft里描述到），flag为1.
下面引用原文。
The mtime register has a 64-bit precision on all RV32 and RV64
systems. Platforms provide a 64- bit memory-mapped machine-mode timer
compare register (mtimecmp). A timer interrupt becomes 34 Volume II:
RISC-V Privileged Architectures V1.12-draft pending whenever mtime
contains a value greater than or equal to mtimecmp, treating the
values as unsigned integers. The interrupt remains posted until
mtimecmp becomes greater than mtime (typically as a result of writing
mtimecmp). The interrupt will only be taken if interrupts are enabled
and the MTIE bit is set in the mie register.
当mtime寄存器里的值 大于等于 mtimecmp寄存器的值时(比较时使用无符号的大小比较方式），需要触发mtime中断。
而且中断会一直触发直到mtimecmp寄存器的值 大于 mtime寄存器里的值 。
下一篇文章会描述freertos里对于risc-v的mtime相关的适配。
#124 RISC-V » 给risc-v标准内核适配freertos-kernel » 2020-12-29 22:21:13
- xiaohui
- 回复： 12
## 描述
PS：自从freertos被亚马逊收购后添加了大量的云服务的支持，所以下面称呼为freertos-kernel.特指项目地址: https://github.com/FreeRTOS/FreeRTOS-Kernel
## 说点肺话
为什么不叫移植freertos-kernel呢？因为从下面freertos-kernel的发布历史可以看到，freertos内核从FreeRTOS V10.1.1 and FreeRTOS V10.2.0开始就支持risc-v了，但是这个版本对于64bit的risc-v的支持好像还有点小问题。一直到FreeRTOS V10.2.1 and FreeRTOS V10.2.0 的发布支持了32位和64位的risc-v。如果要使用建议从这个版本开始进行适配工作。
Changes between FreeRTOS V10.2.1 and FreeRTOS V10.2.0 released May 13
2019:
+ Added ARM Cortex-M23 port layer to complement the pre-existing ARM
Cortex-M33 port layer. + The RISC-V port now automatically
switches between 32-bit and 64-bit cores.
...
Changes between FreeRTOS V10.2.1 and FreeRTOS V10.2.0 released May 13
2019:
...
+ The RISC-V port now automatically switches between 32-bit and 64-bit cores.
...
Changes between FreeRTOS V10.1.1 and FreeRTOS V10.2.0 released
February 25 2019:
+ Added GCC RISC-V MCU port with three separate demo applications.
... ## 做下准备
下面我们整理下适配一个比较规范的risc-v内核需要进行哪些工作和需要risc-v内核支持哪些外设才可以让freertos-kernel正常运行.
我们都知道，最简单的rtos运行只需要一个时钟为他提供一个基准时钟用于任务时间分片的计算，触发上下文切换和任务间通信的超时等操作。在freertos里还需要一片空间用户存放任务的栈。
在freertos适配risc-v的时候我们通常还会使用risc-v里的机器时钟mtime，他是一个只有计时用途的简易计数器，可以为freertos提供一个基准时钟。也可以使用一个硬件定时器代替。
freertos默认还会使用ecall指令，用于出让cpu控制权。通过修改也可以使用其他指令(如果是自己设计的核，你用着开心就好)。
## 应该准备好了，开始
好了，到现在我们已经准备好了freertos需要的运行条件。
1. 设置栈顶
我们需要指定
__freertos_irq_stack_top这个符号，告诉freertos任务的栈需要存放到哪里。
2. 设置mtime寄存器信息
在FreeRTOSConfig.h文件里设置mtime寄存器信息
#define configMTIME_BASE_ADDRESS ( pdev_mtime_mtime_addr )
#define configMTIMECMP_BASE_ADDRESS( pdev_mtime_mtimecmp_addr )
3. 确认HOOK配置
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 1
4. 设置cpu频率和Tick中断的频率
#define configCPU_CLOCK_HZ ( 1000 )
#define configTICK_RATE_HZ ( ( TickType_t ) 1 )
5. 设置最小栈大小限制和堆的总大小
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 105 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) 14500 )
6. 设置任务名称最大的长度(如无特殊，保持默认即可)
#define configMAX_TASK_NAME_LEN ( 16 )
7. 通过宏定义 __riscv_xlen 指定指令长度
如果是64bit的risc-v平台可以参考下面编译参数
CFLAGS += -D__riscv_xlen=64 -D__riscv64
如果是32bit的risc-v平台可以参考下面编译参数
CFLAGS += -D__riscv_xlen=32
8. 第7点声明的__riscv64宏定义主要作用
#ifdef __riscv64
#define portBYTE_ALIGNMENT 8
#else
#define portBYTE_ALIGNMENT 16
#endif
从上面的代码可以看出主要是用于设置字节对齐大小
到这里freertos的基本设置已经完成！！下面需要编写平台初始化的代码，然后初始化freertos，创建任务，调用调度函数即可。
# 平台初始化
下面附上简单的平台初始化代码
start.S
#include "rv_mtvec_map.h"
.macro init;
.endm
.section .init;
.option norvc
.option nopic
.align 6;
.weak reset_vector;
.globl _start;
.type _start,@function
_start:
la sp, __stack_end
/* reset vector */
addi s2, x0, 'a';
li t1, pdev_uart0_write_addr;
sb s2,0(t1);
addi s2, x0, 'b';
li t1, pdev_uart0_write_addr;
sb s2,0(t1);
addi s2, x0, '\n';
li t1, pdev_uart0_write_addr;
sb s2,0(t1);
j reset_vector
.align 4;
reset_vector:
addi s2, x0, 'r';
li t1, pdev_uart0_write_addr;
sb s2,0(t1);
addi s2, x0, '\n';
li t1, pdev_uart0_write_addr;
sb s2,0(t1);
la a0,e_vertor;
2:
/* Clear bss section */
la a0, __bss_start;
la a1, __bss_end;
bgeu a0, a1, 2f;
1:
# sw zero, (a0);
addi a0, a0, 4;
bltu a0, a1, 1b;
2:
call main;
unimpmain.c
void main(void){
// *(uint64_t *)(pdev_mtime_mtimecmp_addr+1) = 300;
uint64_t i;
puts("main\n");
extern void main_blinky( void );
main_blinky();
puts("main_blinky\n");
while(1){
i = 1000;
while(i--);
puts("wait for cb\n");
}
}freertos的适配到此为止，感谢观看！！发现有疑问或者错误的地方欢迎发邮件到juicemail@163.com联系作者，谢谢！！期待您的参与！！！
#125 Re: 计算机图形/GUI/RTOS/FileSystem/OpenGL/DirectX/SDL2 » RT-Thread Smart移植初体验有奖活动 » 2020-12-29 15:41:31
#126 Re: 计算机图形/GUI/RTOS/FileSystem/OpenGL/DirectX/SDL2 » RT-Thread Smart移植初体验有奖活动 » 2020-12-29 15:39:34
#127 Re: ESP32/ESP8266 » esp32s2移植VSF，顺便跑起USB主机协议栈 » 2020-12-23 14:02:23
#128 Re: 全志 SOC » 全志V831芯片裸机开发日记--移植V831到xboot » 2020-12-05 13:38:39
#129 Re: 技术人生/软件使用技巧/破解经验/技术吐槽/灌水 » 在使用 v1.7.14版本的cjson在gcc下编译和armcc下编译遇到浮点表现不一样的问题 【楼主已解决】 » 2020-11-30 11:04:43
#131 技术人生/软件使用技巧/破解经验/技术吐槽/灌水 » 在使用 v1.7.14版本的cjson在gcc下编译和armcc下编译遇到浮点表现不一样的问题 【楼主已解决】 » 2020-11-21 12:33:21
- xiaohui
- 回复： 1
cjson v1.7.14 commitid:d273527
https://github.com/DaveGamble/cJSON/releases/tag/v1.7.14
在打印13位时间戳的时候出现armcc下运行正常，但是在gcc下变成浮点数而且数值不对的问题。
例如：
double sn = 1605890812435;
cJSON_AddNumberToObject(root, "sn", sn);
armcc编译运行正常。sn:1605890812435
gcc编译运行。 sn:1.60589081200000
#132 Re: 8051/STC8/AT89C51/N76E003 » CH552通用JTAG适配器 » 2020-10-23 15:22:19
#133 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 破解 KEIL MDK crack 2032, 你懂得 » 2020-09-22 16:28:33
#134 RISC-V » 上传不完全翻译版riscv最新非特权指令文档和特权文档 » 2020-09-11 17:02:45
- xiaohui
- 回复： 0
RT.
原版：
riscv-spec.pdf
riscv-privileged.pdf
我是可爱的分割线 我是可爱的分割线 我是可爱的分割线 我是可爱的分割线 我是可爱的分割线 我是可爱的分割线 我是可爱的分割线
不完全翻译版
riscv-spec_en_zh-CN-已融合.pdf
riscv-privilegeden_zh-CN-已融合.pdf
#136 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 请教，lua语言里的 if str ~= true 这句胡怎么理解？ » 2020-08-29 15:59:09
#137 Re: RISC-V » K210 C语言开发？ » 2020-08-29 13:24:46
unturned3 说：
我试着把官方IDE里的示例给下载到k210的板子上，工程编译通过了，不过没法往板子上下载。
IDE 可以看见开发板的串口，但是输出了这个错误信息：[INFO] try reboot as KD233 [INFO] Failed to boot as KD233: Timeout greeting kd233 board我用的k210开发板是一个叫Sipeed M1n 的板子，和Sipeed Maixduino 兼容。怎么让官方IDE 识别M1n 的板子，而不是把它当成 KD233 呢？
谢谢
sipeed的板子建议自己去编译一下maixpy吧，会编译后可以直接用它的底层库。模块化的，去掉mpy直接删就可以了。
#138 Re: 全志 SOC » 看f1c100s裸奔程序受到的启发 » 2020-08-28 12:51:08
#139 Re: 技术人生/软件使用技巧/破解经验/技术吐槽/灌水 » 在线生成 logo 的网站 » 2020-08-21 14:17:06
#140 Re: Cortex M0/M3/M4/M7 » GD32F3X0 GCC » 2020-08-12 17:52:25
Blueskull 说：
有IAR和MDK的，但是没给ld文件，要手写。.s文件倒是有，MDK的可以简单改改拿去用。
我发的这个就是从mdk改的。https://github.com/xiaoxiaohuixxh/tkm32f499_gcc
内核的文件可以直接用，sdk里的库改改，ld也改改，start.s也改改，makefile复制下，根据有没有硬浮点配置下。库一般不会有什么太大的改动。
#141 Re: Cortex M0/M3/M4/M7 » GD32F3X0 GCC » 2020-08-12 17:50:04
#142 Re: Cortex M0/M3/M4/M7 » GD32F3X0 GCC » 2020-08-12 17:48:57
#143 Re: 华芯微特 » 画了一个带sram的swm320的板子 » 2020-06-15 09:34:57
#144 Re: 好钜润半导体(TIKY) » 做了个tkm32f499的gcc工程 » 2020-06-09 11:29:19
Magicoe 说：
是否有USB和SD的驅動？謝謝
直接搬官方的例程即可。sdio据说有坑，可以参考
https://whycan.cn/t_4094.html
#145 Re: 好钜润半导体(TIKY) » 入坑TKM32F499 » 2020-06-01 16:39:34
#146 Re: 全志 SOC » 收到小智科技精美X3开发板和卡片电脑, 随手记录调试记录. » 2020-05-23 09:45:11
#147 Re: NB-IoT/2G模块/4G模块/GPRS模块/GPS/北斗 » 刚刚收到USB电流表,测试一下合宙官方的AIR724功耗, 刷新网页 50mA@5V, 不知道准不准呢. » 2020-05-23 09:39:59
#148 Re: RISC-V » 淘宝上9元包快递打印了一本书 《RISC-V 指令集手册》 » 2020-05-21 11:30:12
#149 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 捡了个便宜的高级ZYNQ XC7Z010 开发板玩玩 » 2020-05-20 21:09:08
#150 Re: 好钜润半导体(TIKY) » 做了个tkm32f499的gcc工程 » 2020-05-19 10:08:55
#151 Re: 华芯微特 » swm320硬件的spi从机模式开始接收会丢两个字节的数据 » 2020-04-21 17:26:07
#154 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 10元一个全新720P互联网网关监控摄像头 HI3518 » 2020-04-16 11:37:37
#155 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 10元一个全新720P互联网网关监控摄像头 HI3518 » 2020-04-16 11:34:30
#156 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » 10元一个全新720P互联网网关监控摄像头 HI3518 » 2020-04-16 11:33:02
#158 Re: 华芯微特 » 画了一个带sram的swm320的板子 » 2020-04-09 13:34:43
#159 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » AIR724模块, 合宙拼团: 一个4G模块+一个4G开发板 = 19.9元 » 2020-03-27 15:35:28
#160 Re: 全志 SOC » 自制F1C100S板不工作，请大家分析 » 2020-03-23 14:22:08
KevinS 说：
原理图和pcb来了，core-core.pdf， pcb.pdf
先检查3.3v和1.25v是否正常，这两个正常的话core和usb就可以起来了，这时候就可以进fel了，然后可以使用xboot或者uboot初始化ddr之后检查ddr是否正常工作，如果可以正常工作的代表已经可以运行了，关于音频的供电需要的时候才接也可以的。
#161 Re: ESP32/ESP8266 » esp32中被人忽略的超低功耗协处理器ulp » 2020-03-23 14:04:32
#162 Re: 全志 SOC » 试试F1C100s的硬件游标HWC » 2020-03-23 11:21:15
#163 Re: 全志 SOC » Debian buster (10) rootfs 制作 » 2020-03-23 11:16:53
#164 Re: 全志 SOC » 全志 V3S 硬件设计指南[PDF] » 2020-03-23 11:16:03
#165 华芯微特 » swm320 spi的使用 » 2020-03-23 09:43:17
#166 Re: 华芯微特 » SWM320成功移植micropython » 2020-03-19 10:42:42
#167 Re: 华芯微特 » SWM320成功移植micropython » 2020-03-19 10:42:12
#168 Re: 华芯微特 » SWM320成功移植micropython » 2020-03-19 10:41:17
#169 Re: 华芯微特 » SWM320成功移植micropython » 2020-03-19 10:40:13
#170 Re: 华芯微特 » SWM320成功移植micropython » 2020-03-18 11:07:10
#171 Re: 华芯微特 » SWM320成功移植micropython » 2020-03-18 01:25:26
#172 Re: 华芯微特 » SWM320成功移植micropython » 2020-03-18 01:24:09
#173 Re: 好钜润半导体(TIKY) » 做了个tkm32f499的gcc工程 » 2020-03-14 11:56:10
dso_2019 说：
gcc编译器用的哪个,wsl直接能装？
用这个https://whycan.cn/t_3649.html#p33367，可以运行。或者直接装arm-none-eabi估计问题也不大。
#175 Re: DIY/综合/Arduino/写字机/3D打印机/智能小车/平衡车/四轴飞行/MQTT/物联网 » bitbucket/gitee 都限制仓库大小了, 没有自建git仓库的朋友们，我来推荐一个腾讯云旗下的代码托管平台 » 2020-03-12 14:56:48
买了个蜗牛星际，再淘4块旧硬盘，装了 U-NAS 做个 raid , 跑个 Docker, 再运行个 gogs... 随便存了... 另外，阿里云 code git 每个项目可以存 2G... 貌似没限制总的最大容量。#177 Re: 华芯微特 » 计划 50元 得5寸IPS SWM320VE 开发板 可行? » 2020-03-12 14:35:40
#178 Re: 华芯微特 » SWM320成功移植micropython » 2020-03-12 13:51:33
#179 Re: 好钜润半导体(TIKY) » 做了个tkm32f499的gcc工程 » 2020-03-05 16:31:34
#180 Re: 好钜润半导体(TIKY) » 做了个tkm32f499的gcc工程 » 2020-03-05 16:27:29
#181 Re: 好钜润半导体(TIKY) » TKM32F499 各搜索引擎结果 » 2020-03-05 16:07:32
#183 Re: 华芯微特 » 画了一个带sram的swm320的板子 » 2020-03-03 14:15:59
#184 Re: 华芯微特 » 画了一个带sram的swm320的板子 » 2020-03-03 14:15:28
#185 Re: 华芯微特 » 画了一个带sram的swm320的板子 » 2020-03-03 14:14:58
#187 Re: 华芯微特 » 收到华芯微特的SWM320核心板，发贴记录一下 » 2020-02-18 11:03:33
#188 Re: ESP32/ESP8266 » esp8266接入天猫精灵的物联网平台 » 2020-02-18 11:01:59
#189 Re: Qt/MSVC/MINGW/C++/MFC/GTK+/Delphi/BCB » Qt优秀项目 midi 音乐编辑器: midieditor » 2020-02-18 11:01:06
#190 Re: Qt/MSVC/MINGW/C++/MFC/GTK+/Delphi/BCB » vs code 仿真调试xboot的arm32-realview平台程序 » 2020-02-18 11:00:28
#191 Re: 华芯微特 » 画了一个带sram的swm320的板子 » 2020-02-17 13:33:44
#192 Re: 华芯微特 » 华芯微特正式复工啦！！！ » 2020-02-17 13:26:33
#193 华芯微特 » 画了一个带sram的swm320的板子 » 2020-02-17 13:20:38
#194 Re: 全志 SOC » v3s和s3有要求上电时序吗？ » 2020-02-05 17:45:16
#195 全志 SOC » v3s和s3有要求上电时序吗？ » 2020-02-05 17:42:00
#196 Re: 华芯微特 » SWM181串口如何支持1.5停止位 » 2020-02-04 20:00:37
#197 Re: 华芯微特 » SWM320成功移植micropython » 2020-02-03 22:46:09
更新beta0.3.1
更新日志:
1，修改主频为100MHZ
欢迎使用测试脚本：
import time
def int_add_test(n = 1000000, a = 12345, b = 56789):
t1 = time.ticks_ms()
sum = 0
for i in range(n):
sum = a + b
t2 = time.ticks_ms()
r = time.ticks_diff(t2, t1)/1000
print(' Integer Add test', n, 'times: ', r, 's')
return '%.2f'%r
int_add_test()
SWM320_MPY_beta_0_3_1_20200203.zip
#199 Re: 华芯微特 » [已解决]swm320的uart0无法工作在波特率为115200的时候 » 2020-02-03 20:40:52
#200 华芯微特 » [已解决]swm320的uart0无法工作在波特率为115200的时候 » 2020-02-03 20:31:09
- xiaohui
- 回复： 2
RT.使用的是内部的40mhz时钟。
void SerialInit(void)
{
UART_InitStructure UART_initStruct;
PORT_Init(PORTA, PIN2, FUNMUX0_UART0_RXD, 1); //GPIOA.2ΪUART0
PORT_Init(PORTA, PIN3, FUNMUX1_UART0_TXD, 0); //GPIOA.3ΪUART0
UART_initStruct.Baudrate = 115200;
UART_initStruct.DataBits = UART_DATA_8BIT;
UART_initStruct.Parity = UART_PARITY_NONE;
UART_initStruct.StopBits = UART_STOP_1BIT;
UART_initStruct.RXThreshold = 1;
UART_initStruct.RXThresholdIEn = 1;
UART_initStruct.TXThreshold = 3;
UART_initStruct.TXThresholdIEn = 0;
UART_initStruct.TimeoutTime = 10;
UART_initStruct.TimeoutIEn = 1;
UART_Init(UART0, &UART_initStruct);
NVIC_DisableIRQ(UART0_IRQn);
UART_Open(UART0);
}
现象串口输出乱码
波特率为57600的时候正常
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