WhyCan Forum(哇酷开发者社区)

$ xfel extra efuse dump
chipid:(0x0000 128-bits)
    93406000 0c004814 01426250 48671b4b 

$ xfel extra efuse write32 0x00 0xffffffff

$ xfel extra efuse dump
chipid:(0x0000 128-bits)
    ffffffff 0c004814 01426250 48671b4b 

ft-zone:(0x001c 128-bits)
    898f1919 0f760f6c 3108126c 811a0a0e

$ xfel extra efuse dump
chipid:(0x0000 128-bits)
    62c07800 cc004820 0145c519 204e1a8c 
brom-conf-try:(0x0010 32-bits)
    00000000 
thermal-sensor:(0x0014 64-bits)
    2291c0f9 007c9279 
ft-zone:(0x001c 128-bits)
    100f1109 13210de2 00278600 00691510 
reserved1:(0x002c 96-bits)
    00000000 00000000 00000000 
write-protect:(0x0038 32-bits)
    00000000 
read-protect:(0x003c 32-bits)
    00000000 
lcjs:(0x0040 32-bits)
    00000000 
reserved2:(0x0044 800-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
    00000000 
rotpk:(0x00a8 256-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
reserved3:(0x00c8 448-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
    00000000 00000000 00000000 00000000 00000000 00000000 

$ xfel extra efuse dump
chipid:(0x0000 128-bits)
    93005c00 ac004814 01425a4c 1c5318cb 
brom-conf-try:(0x0010 32-bits)
    00000000 
thermal-sensor:(0x0014 64-bits)
    7906c10a 019db011 
ft-zone:(0x001c 128-bits)
    83883119 0ef00f02 2b06111c 87180a0b 
tvout:(0x002c 32-bits)
    00000285 
tvout-gamma:(0x0030 64-bits)
    00000000 00000000 
oem-program:(0x0038 64-bits)
    00000000 00000000 
write-protect:(0x0040 32-bits)
    00000000 
read-protect:(0x0044 32-bits)
    00000000 
reserved1:(0x0048 64-bits)
    00000000 00000000 
huk:(0x0050 192-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 
reserved2:(0x0068 64-bits)
    00000000 00000000 
rotpk:(0x0070 256-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
ssk:(0x0090 256-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
rssk:(0x00b0 128-bits)
    00000000 00000000 00000000 00000000 
hdcp-hash:(0x00c0 128-bits)
    00000000 00000000 00000000 00000000 
nv1:(0x00d0 32-bits)
    00000000 
nv2:(0x00d4 32-bits)
    00000000 
reserved3:(0x00d8 96-bits)
    00000000 00000000 00000000 
oem-program-secure:(0x00e4 224-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 

$ xfel extra efuse write32 0x0038 0x11223344
$ xfel extra efuse dump
chipid:(0x0000 128-bits)
    93005c00 ac004814 01425a4c 1c5318cb 
brom-conf-try:(0x0010 32-bits)
    00000000 
thermal-sensor:(0x0014 64-bits)
    7906c10a 019db011 
ft-zone:(0x001c 128-bits)
    83883119 0ef00f02 2b06111c 87180a0b 
tvout:(0x002c 32-bits)
    00000285 
tvout-gamma:(0x0030 64-bits)
    00000000 00000000 
oem-program:(0x0038 64-bits)
    11223344 00000000 
write-protect:(0x0040 32-bits)
    00000000 
read-protect:(0x0044 32-bits)
    00000000 
reserved1:(0x0048 64-bits)
    00000000 00000000 
huk:(0x0050 192-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 
reserved2:(0x0068 64-bits)
    00000000 00000000 
rotpk:(0x0070 256-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
ssk:(0x0090 256-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
rssk:(0x00b0 128-bits)
    00000000 00000000 00000000 00000000 
hdcp-hash:(0x00c0 128-bits)
    00000000 00000000 00000000 00000000 
nv1:(0x00d0 32-bits)
    00000000 
nv2:(0x00d4 32-bits)
    00000000 
reserved3:(0x00d8 96-bits)
    00000000 00000000 00000000 
oem-program-secure:(0x00e4 224-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 

$ xfel extra efuse write32 0x003c 0x55667788
$ xfel extra efuse dump
chipid:(0x0000 128-bits)
    93005c00 ac004814 01425a4c 1c5318cb 
brom-conf-try:(0x0010 32-bits)
    00000000 
thermal-sensor:(0x0014 64-bits)
    7906c10a 019db011 
ft-zone:(0x001c 128-bits)
    83883119 0ef00f02 2b06111c 87180a0b 
tvout:(0x002c 32-bits)
    00000285 
tvout-gamma:(0x0030 64-bits)
    00000000 00000000 
oem-program:(0x0038 64-bits)
    11223344 55667788 
write-protect:(0x0040 32-bits)
    00000000 
read-protect:(0x0044 32-bits)
    00000000 
reserved1:(0x0048 64-bits)
    00000000 00000000 
huk:(0x0050 192-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 
reserved2:(0x0068 64-bits)
    00000000 00000000 
rotpk:(0x0070 256-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
ssk:(0x0090 256-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
rssk:(0x00b0 128-bits)
    00000000 00000000 00000000 00000000 
hdcp-hash:(0x00c0 128-bits)
    00000000 00000000 00000000 00000000 
nv1:(0x00d0 32-bits)
    00000000 
nv2:(0x00d4 32-bits)
    00000000 
reserved3:(0x00d8 96-bits)
    00000000 00000000 00000000 
oem-program-secure:(0x00e4 224-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 

$ xfel extra efuse dump
chipid:(0x0000 128-bits)
    93005c00 ac004814 01425a4c 1c5318cb 
brom-conf-try:(0x0010 32-bits)
    00000000 
thermal-sensor:(0x0014 64-bits)
    7906c10a 019db011 
ft-zone:(0x001c 128-bits)
    83883119 0ef00f02 2b06111c 87180a0b 
tvout:(0x002c 32-bits)
    00000285 
tvout-gamma:(0x0030 64-bits)
    00000000 00000000 
oem-program:(0x0038 64-bits)
    11223344 55667788 
write-protect:(0x0040 32-bits)
    00000000 
read-protect:(0x0044 32-bits)
    00000000 
reserved1:(0x0048 64-bits)
    00000000 00000000 
huk:(0x0050 192-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 
reserved2:(0x0068 64-bits)
    00000000 00000000 
rotpk:(0x0070 256-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
ssk:(0x0090 256-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 
rssk:(0x00b0 128-bits)
    00000000 00000000 00000000 00000000 
hdcp-hash:(0x00c0 128-bits)
    00000000 00000000 00000000 00000000 
nv1:(0x00d0 32-bits)
    00000000 
nv2:(0x00d4 32-bits)
    00000000 
reserved3:(0x00d8 96-bits)
    00000000 00000000 00000000 
oem-program-secure:(0x00e4 224-bits)
    00000000 00000000 00000000 00000000 00000000 00000000 00000000 

static const struct sid_section_t {
	char * name;
	uint32_t offset;
	uint32_t size_bits;
} sids[] = {
	{ "chipid",             0x0000,  128 },
	{ "brom-conf-try",      0x0010,   32 },
	{ "thermal-sensor",     0x0014,   64 },
	{ "ft-zone",            0x001c,  128 },
	{ "tvout",              0x002c,   32 },
	{ "tvout-gamma",        0x0030,   64 },
	{ "oem-program",        0x0038,   64 },
	{ "write-protect",      0x0040,   32 },
	{ "read-protect",       0x0044,   32 },
	{ "reserved1",          0x0048,   64 },
	{ "huk",                0x0050,  192 },
	{ "reserved2",          0x0068,   64 },
	{ "rotpk",              0x0070,  256 },
	{ "ssk",                0x0090,  256 },
	{ "rssk",               0x00b0,  128 },
	{ "hdcp-hash",          0x00c0,  128 },
	{ "nv1",                0x00d0,   32 },
	{ "nv2",                0x00d4,   32 },
	{ "reserved3",          0x00d8,   96 },
	{ "oem-program-secure", 0x00e4,  224 },
};

sudo xfel ddr v3s;

enum {
	BOOT_DEVICE_SPINOR,
	BOOT_DEVICE_SPINAND,
	BOOT_DEVICE_SDCARD,
};

static int get_boot_device(void)
{
	uint8_t s = *((volatile uint8_t *)(0x00020000 + 0x28));

	if(s == 0x3)
		return BOOT_DEVICE_SPINOR;
	else if(s == 0x4)
		return BOOT_DEVICE_SPINAND;
	else if(s == 0x0)
		return BOOT_DEVICE_SDCARD;
	return BOOT_DEVICE_SPINOR;
}

	{
		//	The Hotplug Flag Register is 0x070005DC.
		//	The Soft Entry Address Register is 0x070005E0.

		//	la	a0, 0x02500000
		//	la	a1, 0x23
		//	sb	a1, 0 (a0)
		//	xxx:	j	xxx
		// Test: write byte to 0x02500000 = UART0 data tegister
		static const uint32_t code [] = {
				0x02500537, // 37 05 50 02
				0x0230059B,	// 9B 05 30 02 │
				0x00B50023, // 23 00 B5 00
				0x0000006F, // 6F 00 00 00,
		};

		* (volatile uint32_t *) 0x070005DC = 0*0xFA50392Fu;	// Hotplug Flag Register
		* (volatile uint32_t *) 0x070005E0 = (uintptr_t) code;	// Soft Entry Address Register

		dcache_clean_all();

		printhex(0x06000000, (void *) 0x06000000, 0x10000);
		//CCU->RISC_GATING_REG
		CCU->RISC_CFG_BGR_REG |= (1u << 16) | (1u << 0);
		(void) CCU->RISC_CFG_BGR_REG;
		PRINTF("CCU->RISC_CFG_BGR_REG=%08" PRIX32 "\n", CCU->RISC_CFG_BGR_REG);

		RISC_CFG->RISC_STA_ADD0_REG = (uintptr_t) code;
		RISC_CFG->RISC_STA_ADD1_REG = 0;//(uint32_t) (uintptr_t) code >> 32;
		//memset(RISC_CFG, ~ 0u, sizeof * RISC_CFG);
		PRINTF("CCU->RISC_GATING_REG=%08" PRIX32 ", CCU->RISC_CFG_BGR_REG=%08" PRIX32 "\n", CCU->RISC_GATING_REG, CCU->RISC_CFG_BGR_REG);
		PRINTF("RISC_CFG->RISC_STA_ADD0_REG=%08" PRIX32 ", RISC_CFG->RISC_STA_ADD1_REG=%08" PRIX32 "\n", RISC_CFG->RISC_STA_ADD0_REG, RISC_CFG->RISC_STA_ADD1_REG);
		//printhex32(RISC_CFG_BASE, RISC_CFG, sizeof * RISC_CFG);
		local_delay_ms(3000);
		//PRINTF("CCU->RISC_RST_REG=%08" PRIX32 "\n", CCU->RISC_RST_REG);
		CCU->RISC_RST_REG = 0x16AA0001u;
		(void) CCU->RISC_RST_REG;
		//PRINTF("CCU->RISC_RST_REG=%08" PRIX32 "\n", CCU->RISC_RST_REG);
		//ASSERT(CCU->RISC_RST_REG & 0x01u);
		for (;;)
			;
	}

xboot: /#  wboxtest benchmark-memory       
[benchmark-memory]-[memcmp]
 Bandwidth: 37.313MB/s
[benchmark-memory]-[memcpy]
 Bandwidth: 553.000MB/s
[benchmark-memory]-[memmove]
 Bandwidth: 56.219MB/s
[benchmark-memory]-[memset]
 Bandwidth: 824.000MB/s

xfel ddr r128-s2;
xfel write 0x08200000 xboot.bin;
xfel extra exec riscv 0x08200000;

[2]set pll end
[3]board init ok
[5]fake dram ok
[7]heap: 0x40a0000 size:0xe000
[9]lpsram init
[11]lspsram init aps64
[13]lspsram dqs:0x011a01a0
[18]psram chip APS64 init ok!, freq 1920000000
[22]Init psram controller ok
[24]hpsram init
[26]DRAM DQS gate is PD mode.
[29]DRAM BOOT DRIVE INFO: V2.00
[32]DRAM CLK = 800 MHZ
[34]dram_tpr11 = 0x0 , dram_tpr12 =0x0
[37]dram_tpr9 = 0x2020
[86]DRAM simple test OK.
[88]DRAM SIZE =8 MB
[100]fes1 done
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       _                   _                     
 _  _ | |___ _____ _____ _| |_                   
\ \/ /|  _  |  _  |  _  |_   _|  (C) 2007-2023   
 )  ( | |_| | |_| | |_| | | |____JIANJUN.JIANG__ 
/_/\_\|_____|_____|_____| |_____________________|
V3.0.0 (May 24 2023 - 09:30:05) - [yuzuki][Yuzuki Based On Allwinner R128 SOC]
[    0.000020]Probe device 'blk-romdisk.0' with blk-romdisk
[    0.000800]Probe device 'fix-losc' with clk-fixed
[    0.000810]Probe device 'rc-16m' with clk-fixed
[    0.000820]Probe device 'rcosc-clk' with clk-fixed
[    0.000830]Probe device 'ext-32k' with clk-fixed
[    0.000840]Probe device 'rc-hf' with clk-fixed
[    0.000850]Probe device 'rccal-fake-parent' with clk-fixed
[    0.000860]Probe device 'osc26m' with clk-fixed
[    0.000870]Probe device 'osc40m' with clk-fixed
[    0.000880]Probe device 'osc24m' with clk-fixed
[    0.000890]Probe device 'osc32m' with clk-fixed
[    0.000900]Probe device 'osc24.576m' with clk-fixed
[    0.000910]Probe device 'hosc' with clk-mux
[    0.000920]Probe device 'hosc-div32k' with clk-fixed-factor
[    0.000930]Probe device 'rcosc-div32k' with clk-fixed-factor
[    0.000940]Probe device 'hosc-div2' with clk-fixed-factor
[    0.000950]Probe device 'dpll1' with clk-r128-pll
[    0.000960]Probe device 'dpll2' with clk-r128-pll
[    0.000970]Probe device 'dpll3' with clk-r128-pll
[    0.000980]Probe device 'pll-audio' with clk-r128-pll
[    0.000990]Probe device 'rfip0-dpll' with clk-fixed-factor
[    0.001000]Probe device 'rfip1-dpll' with clk-fixed-factor
[    0.001010]Probe device 'pll-audio2x' with clk-fixed-factor
[    0.001020]Probe device 'pll-audio1x' with clk-fixed-factor
[    0.001030]Probe device 'dpll1-div4' with clk-fixed-factor
[    0.001040]Probe device 'dpll1-div5' with clk-fixed-factor
[    0.001050]Probe device 'dpll1-div6' with clk-fixed-factor
[    0.001060]Probe device 'dpll1-div7' with clk-fixed-factor
[    0.001070]Probe device 'dpll1-div8' with clk-fixed-factor
[    0.001080]Probe device 'dpll1-div39' with clk-fixed-factor
[    0.001090]Probe device 'dpll1-div85' with clk-fixed-factor
[    0.001100]Probe device 'dpll3-div4' with clk-fixed-factor
[    0.001110]Probe device 'dpll3-div5' with clk-fixed-factor
[    0.001120]Probe device 'dpll3-div6' with clk-fixed-factor
[    0.001130]Probe device 'dpll3-div7' with clk-fixed-factor
[    0.001140]Probe device 'dpll3-div8' with clk-fixed-factor
[    0.001150]Probe device 'ck1-usb' with clk-gate
[    0.001160]Probe device 'mux-ck1-aud' with clk-mux
[    0.001170]Probe device 'ck1-aud' with clk-gate
[    0.001180]Probe device 'mux-ck1-dev' with clk-mux
[    0.001190]Probe device 'ck1-dev' with clk-gate
[    0.001200]Probe device 'mux-ck1-m33' with clk-mux
[    0.001210]Probe device 'ck1-m33' with clk-gate
[    0.001220]Probe device 'mux-ck3-dev' with clk-mux
[    0.001230]Probe device 'ck3-dev' with clk-gate
[    0.001240]Probe device 'mux-ck3-m33' with clk-mux
[    0.001250]Probe device 'ck3-m33' with clk-gate
[    0.001260]Probe device 'ck-dev' with clk-mux
[    0.001270]Probe device 'device-clk' with clk-divider
[    0.001280]Probe device 'ck-m33' with clk-mux
[    0.001290]Probe device 'sys' with clk-divider
[    0.001300]Probe device 'aud-rco-div' with clk-divider
[    0.001310]Probe device 'ar200a-f' with clk-mux
[    0.001320]Probe device 'hfclk-div' with clk-ratio
[    0.001330]Probe device 'lfclk-div' with clk-ratio
[    0.001340]Probe device 'ahb-div' with clk-ratio
[    0.001350]Probe device 'apb' with clk-mux
[    0.001360]Probe device 'ble-32m' with clk-gate
[    0.001370]Probe device 'ble-48m' with clk-gate
[    0.001380]Probe device 'gpio-gate' with clk-gate
[    0.001390]Probe device 'bus-codec-dac' with clk-gate
[    0.001400]Probe device 'rccal' with clk-gate
[    0.001410]Probe device 'bus-codec-adc' with clk-gate
[    0.001420]Probe device 'dmic-bus' with clk-gate
[    0.001430]Probe device 'gpadc' with clk-gate
[    0.001440]Probe device 'lpuart1-wkup' with clk-gate
[    0.001450]Probe device 'lpuart0-wkup' with clk-gate
[    0.001460]Probe device 'osc32k-en' with clk-gate
[    0.001470]Probe device 'rc32k-en' with clk-gate
[    0.001480]Probe device 'rc-hf-en' with clk-gate
[    0.001490]Probe device 'rccal-32k' with clk-gate
[    0.001500]Probe device 'rco-wup-en' with clk-gate
[    0.001510]Probe device 'lf-sel' with clk-mux
[    0.001520]Probe device 'sys-32k-sel' with clk-mux
[    0.001530]Probe device 'ble-sel' with clk-mux
[    0.001540]Probe device 'sysrtc32k' with clk-mux
[    0.001550]Probe device 'pad' with clk-mux
[    0.001560]Probe device 'div-pad' with clk-divider
[    0.001570]Probe device 'pad-out' with clk-gate
[    0.001580]Probe device 'div' with clk-mux
[    0.001590]Probe device '32k-auto-en-switch' with clk-gate
[    0.001600]Probe device 'bus-ehci0' with clk-gate
[    0.001610]Probe device 'bus-ohci0' with clk-gate
[    0.001620]Probe device 'bus-csi-jpe' with clk-gate
[    0.001630]Probe device 'bus-ledc' with clk-gate
[    0.001640]Probe device 'bus-otg' with clk-gate
[    0.001650]Probe device 'bus-smcard' with clk-gate
[    0.001660]Probe device 'bus-hspsram-ctrl' with clk-gate
[    0.001670]Probe device 'bus-irrx' with clk-gate
[    0.001680]Probe device 'bus-irtx' with clk-gate
[    0.001690]Probe device 'bus-pwm' with clk-gate
[    0.001700]Probe device 'bus-twi1' with clk-gate
[    0.001710]Probe device 'bus-twi0' with clk-gate
[    0.001720]Probe device 'bus-uart2' with clk-gate
[    0.001730]Probe device 'bus-uart1' with clk-gate
[    0.001740]Probe device 'bus-uart0' with clk-gate
[    0.001750]Probe device 'bus-sdc0' with clk-gate
[    0.001760]Probe device 'bus-spi1' with clk-gate
[    0.001770]Probe device 'bus-spi0' with clk-gate
[    0.001780]Probe device 'bus-monitor' with clk-gate
[    0.001790]Probe device 'bus-g2d' with clk-gate
[    0.001800]Probe device 'bus-de' with clk-gate
[    0.001810]Probe device 'bus-display' with clk-gate
[    0.001820]Probe device 'bus-lcd' with clk-gate
[    0.001830]Probe device 'bus-bt-core' with clk-gate
[    0.001840]Probe device 'bus-wlan-ctrl' with clk-gate
[    0.001850]Probe device 'bus-trng' with clk-gate
[    0.001860]Probe device 'bus-spc' with clk-gate
[    0.001870]Probe device 'bus-ss' with clk-gate
[    0.001880]Probe device 'bus-timer' with clk-gate
[    0.001890]Probe device 'bus-spinlock' with clk-gate
[    0.001900]Probe device 'bus-dma1' with clk-gate
[    0.001910]Probe device 'bus-dma0' with clk-gate
[    0.001920]Probe device 'bus-spdif' with clk-gate
[    0.001930]Probe device 'bus-i2s' with clk-gate
[    0.001940]Probe device 'riscv-cfg' with clk-gate
[    0.001950]Probe device 'riscv-msgbox' with clk-gate
[    0.001960]Probe device 'dsp-cfg' with clk-gate
[    0.001970]Probe device 'dsp-msgbox' with clk-gate
[    0.001980]Probe device 'cpu-msgbox' with clk-gate
[    0.001990]Probe device 'mbus-de' with clk-gate
[    0.002000]Probe device 'mbus-g2d' with clk-gate
[    0.002010]Probe device 'mbus-csi' with clk-gate
[    0.002020]Probe device 'mbus-dma1' with clk-gate
[    0.002030]Probe device 'mbus-dma0' with clk-gate
[    0.002040]Probe device 'mbus-usb' with clk-gate
[    0.002050]Probe device 'mbus-ce' with clk-gate
[    0.002060]Probe device 'mbus-dsp' with clk-gate
[    0.002070]Probe device 'mbus-riscv' with clk-gate
[    0.002080]Probe device 'mbus-cpu' with clk-gate
[    0.002090]Probe device 'mux-pclk-spc' with clk-mux
[    0.002100]Probe device 'div-pclk-spc' with clk-divider
[    0.002110]Probe device 'pclk-spc' with clk-ratio
[    0.002120]Probe device 'mux-spi0' with clk-mux
[    0.002130]Probe device 'div-spi0' with clk-divider
[    0.002140]Probe device 'ratio-spi0' with clk-ratio
[    0.002150]Probe device 'spi0' with clk-gate
[    0.002160]Probe device 'mux-spi1' with clk-mux
[    0.002170]Probe device 'div-spi1' with clk-divider
[    0.002180]Probe device 'ratio-spi1' with clk-ratio
[    0.002190]Probe device 'spi1' with clk-gate
[    0.002200]Probe device 'mux-sdc0' with clk-mux
[    0.002210]Probe device 'div-sdc0' with clk-divider
[    0.002220]Probe device 'ratio-sdc0' with clk-ratio
[    0.002230]Probe device 'sdc0' with clk-gate
[    0.002240]Probe device 'mux-ss' with clk-mux
[    0.002250]Probe device 'div-ss' with clk-divider
[    0.002260]Probe device 'ratio-ss' with clk-ratio
[    0.002270]Probe device 'ss' with clk-gate
[    0.002280]Probe device 'mux-csi-jpe' with clk-mux
[    0.002290]Probe device 'div-csi-jpe' with clk-divider
[    0.002300]Probe device 'ratio-csi-jpe' with clk-ratio
[    0.002310]Probe device 'csi-jpe' with clk-gate
[    0.002320]Probe device 'mux-ledc' with clk-mux
[    0.002330]Probe device 'div-ledc' with clk-divider
[    0.002340]Probe device 'ratio-ledc' with clk-ratio
[    0.002350]Probe device 'ledc' with clk-gate
[    0.002360]Probe device 'mux-irrx' with clk-mux
[    0.002370]Probe device 'div-irrx' with clk-divider
[    0.002380]Probe device 'ratio-irrx' with clk-ratio
[    0.002390]Probe device 'irrx' with clk-gate
[    0.002400]Probe device 'mux-irtx' with clk-mux
[    0.002410]Probe device 'div-irtx' with clk-divider
[    0.002420]Probe device 'ratio-irtx' with clk-ratio
[    0.002430]Probe device 'irtx' with clk-gate
[    0.002440]Probe device 'mux-systick-ref' with clk-mux
[    0.002450]Probe device 'div-systick-ref' with clk-divider
[    0.002460]Probe device 'ratio-systick-ref' with clk-ratio
[    0.002470]Probe device 'systick-ref' with clk-gate
[    0.002480]Probe device 'systick-noref' with clk-gate
[    0.002490]Probe device 'systick-skew' with clk-gate
[    0.002500]Probe device 'mux-csi-mclk' with clk-mux
[    0.002510]Probe device 'div-csi-mclk' with clk-divider
[    0.002520]Probe device 'ratio-csi-mclk' with clk-ratio
[    0.002530]Probe device 'csi-mclk' with clk-gate
[    0.002540]Probe device 'mux-flash-spi' with clk-mux
[    0.002550]Probe device 'div-flash-spi' with clk-divider
[    0.002560]Probe device 'ratio-flash-spi' with clk-ratio
[    0.002570]Probe device 'flash-spi' with clk-gate
[    0.002580]Probe device 'mux-g2d' with clk-mux
[    0.002590]Probe device 'div-g2d' with clk-divider
[    0.002600]Probe device 'ratio-g2d' with clk-ratio
[    0.002610]Probe device 'g2d' with clk-gate
[    0.002620]Probe device 'mux-de' with clk-mux
[    0.002630]Probe device 'div-de' with clk-divider
[    0.002640]Probe device 'ratio-de' with clk-ratio
[    0.002650]Probe device 'de' with clk-gate
[    0.002660]Probe device 'mux-lcd' with clk-mux
[    0.002670]Probe device 'div-lcd' with clk-divider
[    0.002680]Probe device 'ratio-lcd' with clk-ratio
[    0.002690]Probe device 'lcd' with clk-gate
[    0.002700]Probe device 'timer0' with clk-link
[    0.002710]Probe device 'timer1' with clk-link
[    0.002720]Probe device 'uart0' with clk-link
[    0.002730]Probe device 'uart1' with clk-link
[    0.002740]Probe device 'uart2' with clk-link
[    0.002750]Probe device 'wdg' with clk-fixed
[    0.002760]Probe device 'reset-r128.0' with reset-r128
[    0.002770]Probe device 'reset-r128.1' with reset-r128
[    0.002780]Probe device 'reset-r128.2' with reset-r128
[    0.002790]Probe device 'reset-r128.3' with reset-r128
[    0.002800]Probe device 'reset-r128.4' with reset-r128
[    0.002810]Probe device 'reset-r128.5' with reset-r128
[    0.002820]Probe device 'reset-r128.6' with reset-r128
[    0.002830]Probe device 'irq-r128.0' with irq-r128
[    0.002840]Probe device 'irq-r128-gpio.0' with irq-r128-gpio
[    0.002850]Probe device 'irq-r128-gpio.1' with irq-r128-gpio
[    0.002860]Probe device 'gpio-r128.0' with gpio-r128
[    0.002870]Probe device 'gpio-r128.1' with gpio-r128
[    0.002880]Probe device 'ce-r128-timer.0' with ce-r128-timer
[    0.000089]Probe device 'cs-r128-timer.0' with cs-r128-timer
[    0.005967]Probe device 'uart-16550.0' with uart-16550
[    0.011228]Probe device 'uart-16550.1' with uart-16550
[    0.016569]Probe device 'i2c-r128.0' with i2c-r128
[    0.021506]Probe device 'i2c-r128.1' with i2c-r128
[    0.026445]Probe device 'spi-r128.0' with spi-r128
[    0.040882]Found spi nor flash 'SFDP' with 16.000MB
[    0.045752]Found partition:
[    0.048569]  0x0000000000000000 ~ 0x0000000000ffffff 16.000MB  - blk-spinor.0
[    0.055880]  0x0000000000000000 ~ 0x00000000005fffff 6.000MB   - blk-spinor.0.xboot
[    0.063687]  0x0000000000600000 ~ 0x00000000007fffff 2.000MB   - blk-spinor.0.reserve
[    0.071651]  0x0000000000800000 ~ 0x0000000000ffffff 8.000MB   - blk-spinor.0.private
[    0.079508]Probe device 'blk-spinor.0' with blk-spinor
[    0.084811]Probe device 'wdg-r128.0' with wdg-r128
[    0.089669]Probe device 'console-uart.0' with console-uart
[    0.098777]mount /private with 'ram' filesystem
Press any key to stop auto boot:  0.260
xboot: /# 
xboot: /# 
xboot: /# 

usage:
    xfel extra exec riscv <address> - Boot riscv and jump to address
    xfel extra exec dsp <address>   - Boot dsp and jump to address

xfel ddr r128-s2;
xfel write 0x08200000 xboot.bin;
xfel extra exec riscv 0x08200000;

xfel ddr r128-s2;
xfel write 0x08004000 lichee/rtos/build/r128s2_pro_m33/img/rt_system.bin;
xfel write 0x08200000 xboot.bin;
xfel exec 0x08004001;

[0]fes begin commit:7de04b7c
[2]set pll end
[3]board init ok
[5]fake dram ok
[7]heap: 0x40a0000 size:0xe000
[9]lpsram init
[11]lspsram init aps64
[13]lspsram dqs:0x011c01c0
[18]psram chip APS64 init ok!, freq 1920000000
[22]Init psram controller ok
[24]hpsram init
[26]DRAM DQS gate is PD mode.
[29]DRAM BOOT DRIVE INFO: V2.00
[32]DRAM CLK = 800 MHZ
[34]dram_tpr11 = 0x0 , dram_tpr12 =0x0
[37]dram_tpr9 = 0x2424
[86]DRAM simple test OK.
[88]DRAM SIZE =8 MB
[100]fes1 done
Warning: clk ck1-m33 enable_count is 2, parent is dpll1, parent rate is 1920000000, should not be changed from 480000000 to 384000000, please recheck whether the operation is correct
Warning: clk ck1-dev enable_count is 2, parent is dpll1, parent rate is 1920000000, should not be changed from 1920000000 to 384000000, please recheck whether the operation is correct
M33 CPU Clock Freq: 192 MHz

 *******************************************
 **    Welcome to R128 FreeRTOS V1.5.0    **
 ** Copyright (C) 2019-2022 AllwinnerTech **
 **                                       **
 **      starting armv8m FreeRTOS V0.7    **
 *******************************************

Date:May 10 2023, Time:14:01:58
flash not ready, skip mount
---boot dsp(start_addr: 0x0c000660)---
---boot
█████████████████████████████████
██ ▄▄▄▄▄ █ ▀███▀ ▄█▀█ ▄█ ▄▄▄▄▄ ██
██ █   █ █ ▀▄█▄▄▀▄▀█▄▀ █ █   █ ██
██ █▄▄▄█ █▄   ▄▄▀█▄▀█ ▄█ █▄▄▄█ ██
██▄▄▄▄▄▄▄█ █ █▄▀▄█▄▀▄▀▄█▄▄▄▄▄▄▄██
███▄▄█▄█▄▄▀█ ▀  ▀ ▀  ███ ▀▄ ▄▄ ██
██▀  ▄▄ ▄▄█▄▄ ▀  ▄▄▀▄▀▄█ ▀▄▀▄▀▄██
██▄▀▄█▄█▄ ▄▄█▀▄▀  ▀  ███ ██ ██ ██
███ ▄▄▄▄▄▄ ▄▄▀▀▄▄█▀▀▄▀▄▀▄▀▄▀▄▀▄██
██▄▄█▀▄▄▄ ▄ ▀▀▄▄▄▀▄  ███  █ ██ ██
██▄▀▄▄█ ▄▀▀▄▀▄ ▄▀▀▄▀▄▀▄▀▄▀▄▀▄▀▄██
██▄██▄█▄▄█▀▀▀▄█ ███  █ ▄▄▄  ██ ██
██ ▄▄▄▄▄ █▄ ██▀ ▀▀▄▀▄  █▄█ ▀▄▀▄██
██ █   █ █▄▀██▀█▄██  ▀▄ ▄▄  █▀ ██
██ █▄▄▄█ █ ▀▀▄▄██▀▄▀▄█  █▀▄▀▄▀▄██
██▄▄▄▄▄▄▄███▄▄▄▄▄██▄▄█▄█▄█▄▄█▄▄██
█████████████████████████████████
       _                   _                     
 _  _ | |___ _____ _____ _| |_                   
\ \/ /|  _  |  _  |  _  |_   _|  (C) 2007-2023   
 )  ( | |_| | |_| | |_| | | |____JIANJUN.JIANG__ 
/_/\_\|_____|_____|_____| |_____________________|
V3.0.0 (May 22 2023 - 17:17:57) - [yuzuki][Yuzuki Based On Allwinner R128 SOC]
[    0.000020]Probe device 'blk-romdisk.0' with blk-romdisk
[    0.000800]Probe device 'fix-losc' with clk-fixed
[    0.000810]Probe device 'rc-16m' with clk-fixed
[    0.000820]Probe device 'rcosc-clk' with clk-fixed
[    0.000830]Probe device 'ext-32k' with clk-fixed
[    0.000840]Probe device 'rc-hf' with clk-fixed
[    0.000850]Probe device 'rccal-fake-parent' with clk-fixed
[    0.000860]Probe device 'osc26m' with clk-fixed
[    0.000870]Probe device 'osc40m' with clk-fixed
[    0.000880]Probe device 'osc24m' with clk-fixed
[    0.000890]Probe device 'osc32m' with clk-fixed
[    0.000900]Probe device 'osc24.576m' with clk-fixed
[    0.000910]Probe device 'hosc' with clk-mux
[    0.000920]Probe device 'hosc-div32k' with clk-fixed-factor
[    0.000930]Probe device 'rcosc-div32k' with clk-fixed-factor
[    0.000940]Probe device 'hosc-div2' with clk-fixed-factor
[    0.000950]Probe device 'dpll1' with clk-r128-pll
[    0.000960]Probe device 'dpll2' with clk-r128-pll
[    0.000970]Probe device 'dpll3' with clk-r128-pll
[    0.000980]Probe device 'pll-audio' with clk-r128-pll
[    0.000990]Probe device 'rfip0-dpll' with clk-fixed-factor
[    0.001000]Probe device 'rfip1-dpll' with clk-fixed-factor
[    0.001010]Probe device 'pll-audio2x' with clk-fixed-factor
[    0.001020]Probe device 'pll-audio1x' with clk-fixed-factor
[    0.001030]Probe device 'dpll1-div4' with clk-fixed-factor
[    0.001040]Probe device 'dpll1-div5' with clk-fixed-factor
[    0.001050]Probe device 'dpll1-div6' with clk-fixed-factor
[    0.001060]Probe device 'dpll1-div7' with clk-fixed-factor
[    0.001070]Probe device 'dpll1-div8' with clk-fixed-factor
[    0.001080]Probe device 'dpll1-div39' with clk-fixed-factor
[    0.001090]Probe device 'dpll1-div85' with clk-fixed-factor
[    0.001100]Probe device 'dpll3-div4' with clk-fixed-factor
[    0.001110]Probe device 'dpll3-div5' with clk-fixed-factor
[    0.001120]Probe device 'dpll3-div6' with clk-fixed-factor
[    0.001130]Probe device 'dpll3-div7' with clk-fixed-factor
[    0.001140]Probe device 'dpll3-div8' with clk-fixed-factor
[    0.001150]Probe device 'ck1-usb' with clk-gate
[    0.001160]Probe device 'mux-ck1-aud' with clk-mux
[    0.001170]Probe device 'ck1-aud' with clk-gate
[    0.001180]Probe device 'mux-ck1-dev' with clk-mux
[    0.001190]Probe device 'ck1-dev' with clk-gate
[    0.001200]Probe device 'mux-ck1-m33' with clk-mux
[    0.001210]Probe device 'ck1-m33' with clk-gate
[    0.001220]Probe device 'mux-ck3-dev' with clk-mux
[    0.001230]Probe device 'ck3-dev' with clk-gate
[    0.001240]Probe device 'mux-ck3-m33' with clk-mux
[    0.001250]Probe device 'ck3-m33' with clk-gate
[    0.001260]Probe device 'ck-dev' with clk-mux
[    0.001270]Probe device 'device-clk' with clk-divider
[    0.001280]Probe device 'ck-m33' with clk-mux
[    0.001290]Probe device 'sys' with clk-divider
[    0.001300]Probe device 'aud-rco-div' with clk-divider
[    0.001310]Probe device 'ar200a-f' with clk-mux
[    0.001320]Probe device 'hfclk-div' with clk-ratio
[    0.001330]Probe device 'lfclk-div' with clk-ratio
[    0.001340]Probe device 'ahb-div' with clk-ratio
[    0.001350]Probe device 'apb' with clk-mux
[    0.001360]Probe device 'ble-32m' with clk-gate
[    0.001370]Probe device 'ble-48m' with clk-gate
[    0.001380]Probe device 'gpio-gate' with clk-gate
[    0.001390]Probe device 'bus-codec-dac' with clk-gate
[    0.001400]Probe device 'rccal' with clk-gate
[    0.001410]Probe device 'bus-codec-adc' with clk-gate
[    0.001420]Probe device 'dmic-bus' with clk-gate
[    0.001430]Probe device 'gpadc' with clk-gate
[    0.001440]Probe device 'lpuart1-wkup' with clk-gate
[    0.001450]Probe device 'lpuart0-wkup' with clk-gate
[    0.001460]Probe device 'osc32k-en' with clk-gate
[    0.001470]Probe device 'rc32k-en' with clk-gate
[    0.001480]Probe device 'rc-hf-en' with clk-gate
[    0.001490]Probe device 'rccal-32k' with clk-gate
[    0.001500]Probe device 'rco-wup-en' with clk-gate
[    0.001510]Probe device 'lf-sel' with clk-mux
[    0.001520]Probe device 'sys-32k-sel' with clk-mux
[    0.001530]Probe device 'ble-sel' with clk-mux
[    0.001540]Probe device 'sysrtc32k' with clk-mux
[    0.001550]Probe device 'pad' with clk-mux
[    0.001560]Probe device 'div-pad' with clk-divider
[    0.001570]Probe device 'pad-out' with clk-gate
[    0.001580]Probe device 'div' with clk-mux
[    0.001590]Probe device '32k-auto-en-switch' with clk-gate
[    0.001600]Probe device 'bus-ehci0' with clk-gate
[    0.001610]Probe device 'bus-ohci0' with clk-gate
[    0.001620]Probe device 'bus-csi-jpe' with clk-gate
[    0.001630]Probe device 'bus-ledc' with clk-gate
[    0.001640]Probe device 'bus-otg' with clk-gate
[    0.001650]Probe device 'bus-smcard' with clk-gate
[    0.001660]Probe device 'bus-hspsram-ctrl' with clk-gate
[    0.001670]Probe device 'bus-irrx' with clk-gate
[    0.001680]Probe device 'bus-irtx' with clk-gate
[    0.001690]Probe device 'bus-pwm' with clk-gate
[    0.001700]Probe device 'bus-twi1' with clk-gate
[    0.001710]Probe device 'bus-twi0' with clk-gate
[    0.001720]Probe device 'bus-uart2' with clk-gate
[    0.001730]Probe device 'bus-uart1' with clk-gate
[    0.001740]Probe device 'bus-uart0' with clk-gate
[    0.001750]Probe device 'bus-sdc0' with clk-gate
[    0.001760]Probe device 'bus-spi1' with clk-gate
[    0.001770]Probe device 'bus-spi0' with clk-gate
[    0.001780]Probe device 'bus-monitor' with clk-gate
[    0.001790]Probe device 'bus-g2d' with clk-gate
[    0.001800]Probe device 'bus-de' with clk-gate
[    0.001810]Probe device 'bus-display' with clk-gate
[    0.001820]Probe device 'bus-lcd' with clk-gate
[    0.001830]Probe device 'bus-bt-core' with clk-gate
[    0.001840]Probe device 'bus-wlan-ctrl' with clk-gate
[    0.001850]Probe device 'bus-trng' with clk-gate
[    0.001860]Probe device 'bus-spc' with clk-gate
[    0.001870]Probe device 'bus-ss' with clk-gate
[    0.001880]Probe device 'bus-timer' with clk-gate
[    0.001890]Probe device 'bus-spinlock' with clk-gate
[    0.001900]Probe device 'bus-dma1' with clk-gate
[    0.001910]Probe device 'bus-dma0' with clk-gate
[    0.001920]Probe device 'bus-spdif' with clk-gate
[    0.001930]Probe device 'bus-i2s' with clk-gate
[    0.001940]Probe device 'riscv-cfg' with clk-gate
[    0.001950]Probe device 'riscv-msgbox' with clk-gate
[    0.001960]Probe device 'dsp-cfg' with clk-gate
[    0.001970]Probe device 'dsp-msgbox' with clk-gate
[    0.001980]Probe device 'cpu-msgbox' with clk-gate
[    0.001990]Probe device 'mbus-de' with clk-gate
[    0.002000]Probe device 'mbus-g2d' with clk-gate
[    0.002010]Probe device 'mbus-csi' with clk-gate
[    0.002020]Probe device 'mbus-dma1' with clk-gate
[    0.002030]Probe device 'mbus-dma0' with clk-gate
[    0.002040]Probe device 'mbus-usb' with clk-gate
[    0.002050]Probe device 'mbus-ce' with clk-gate
[    0.002060]Probe device 'mbus-dsp' with clk-gate
[    0.002070]Probe device 'mbus-riscv' with clk-gate
[    0.002080]Probe device 'mbus-cpu' with clk-gate
[    0.002090]Probe device 'mux-pclk-spc' with clk-mux
[    0.002100]Probe device 'div-pclk-spc' with clk-divider
[    0.002110]Probe device 'pclk-spc' with clk-ratio
[    0.002120]Probe device 'mux-spi0' with clk-mux
[    0.002130]Probe device 'div-spi0' with clk-divider
[    0.002140]Probe device 'ratio-spi0' with clk-ratio
[    0.002150]Probe device 'spi0' with clk-gate
[    0.002160]Probe device 'mux-spi1' with clk-mux
[    0.002170]Probe device 'div-spi1' with clk-divider
[    0.002180]Probe device 'ratio-spi1' with clk-ratio
[    0.002190]Probe device 'spi1' with clk-gate
[    0.002200]Probe device 'mux-sdc0' with clk-mux
[    0.002210]Probe device 'div-sdc0' with clk-divider
[    0.002220]Probe device 'ratio-sdc0' with clk-ratio
[    0.002230]Probe device 'sdc0' with clk-gate
[    0.002240]Probe device 'mux-ss' with clk-mux
[    0.002250]Probe device 'div-ss' with clk-divider
[    0.002260]Probe device 'ratio-ss' with clk-ratio
[    0.002270]Probe device 'ss' with clk-gate
[    0.002280]Probe device 'mux-csi-jpe' with clk-mux
[    0.002290]Probe device 'div-csi-jpe' with clk-divider
[    0.002300]Probe device 'ratio-csi-jpe' with clk-ratio
[    0.002310]Probe device 'csi-jpe' with clk-gate
[    0.002320]Probe device 'mux-ledc' with clk-mux
[    0.002330]Probe device 'div-ledc' with clk-divider
[    0.002340]Probe device 'ratio-ledc' with clk-ratio
[    0.002350]Probe device 'ledc' with clk-gate
[    0.002360]Probe device 'mux-irrx' with clk-mux
[    0.002370]Probe device 'div-irrx' with clk-divider
[    0.002380]Probe device 'ratio-irrx' with clk-ratio
[    0.002390]Probe device 'irrx' with clk-gate
[    0.002400]Probe device 'mux-irtx' with clk-mux
[    0.002410]Probe device 'div-irtx' with clk-divider
[    0.002420]Probe device 'ratio-irtx' with clk-ratio
[    0.002430]Probe device 'irtx' with clk-gate
[    0.002440]Probe device 'mux-systick-ref' with clk-mux
[    0.002450]Probe device 'div-systick-ref' with clk-divider
[    0.002460]Probe device 'ratio-systick-ref' with clk-ratio
[    0.002470]Probe device 'systick-ref' with clk-gate
[    0.002480]Probe device 'systick-noref' with clk-gate
[    0.002490]Probe device 'systick-skew' with clk-gate
[    0.002500]Probe device 'mux-csi-mclk' with clk-mux
[    0.002510]Probe device 'div-csi-mclk' with clk-divider
[    0.002520]Probe device 'ratio-csi-mclk' with clk-ratio
[    0.002530]Probe device 'csi-mclk' with clk-gate
[    0.002540]Probe device 'mux-flash-spi' with clk-mux
[    0.002550]Probe device 'div-flash-spi' with clk-divider
[    0.002560]Probe device 'ratio-flash-spi' with clk-ratio
[    0.002570]Probe device 'flash-spi' with clk-gate
[    0.002580]Probe device 'mux-g2d' with clk-mux
[    0.002590]Probe device 'div-g2d' with clk-divider
[    0.002600]Probe device 'ratio-g2d' with clk-ratio
[    0.002610]Probe device 'g2d' with clk-gate
[    0.002620]Probe device 'mux-de' with clk-mux
[    0.002630]Probe device 'div-de' with clk-divider
[    0.002640]Probe device 'ratio-de' with clk-ratio
[    0.002650]Probe device 'de' with clk-gate
[    0.002660]Probe device 'mux-lcd' with clk-mux
[    0.002670]Probe device 'div-lcd' with clk-divider
[    0.002680]Probe device 'ratio-lcd' with clk-ratio
[    0.002690]Probe device 'lcd' with clk-gate
[    0.002700]Probe device 'timer0' with clk-link
[    0.002710]Probe device 'timer1' with clk-link
[    0.002720]Probe device 'wdg' with clk-fixed
[    0.002730]Probe device 'uart0' with clk-fixed
[    0.002740]Probe device 'uart1' with clk-fixed
[    0.002750]Probe device 'uart2' with clk-fixed
[    0.002760]Probe device 'reset-r128.0' with reset-r128
[    0.002770]Probe device 'reset-r128.1' with reset-r128
[    0.002780]Probe device 'reset-r128.2' with reset-r128
[    0.002790]Probe device 'reset-r128.3' with reset-r128
[    0.002800]Probe device 'reset-r128.4' with reset-r128
[    0.002810]Probe device 'reset-r128.5' with reset-r128
[    0.002820]Probe device 'reset-r128.6' with reset-r128
[    0.002830]Probe device 'irq-r128.0' with irq-r128
[    0.002840]Probe device 'irq-r128-gpio.0' with irq-r128-gpio
[    0.002850]Probe device 'irq-r128-gpio.1' with irq-r128-gpio
[    0.002860]Probe device 'gpio-r128.0' with gpio-r128
[    0.002870]Probe device 'gpio-r128.1' with gpio-r128
[    0.002880]Probe device 'ce-r128-timer.0' with ce-r128-timer
[    0.000046]Probe device 'cs-r128-timer.0' with cs-r128-timer
[    0.005696]Probe device 'uart-16550.0' with uart-16550
[    0.010808]Probe device 'uart-16550.1' with uart-16550
[    0.015957]Probe device 'i2c-r128.0' with i2c-r128
[    0.020727]Probe device 'i2c-r128.1' with i2c-r128
[    0.025489]Probe device 'spi-r128.0' with spi-r128
[    0.039591]Found spi nor flash 'SFDP' with 16.000MB
[    0.044374]Found partition:
[    0.047151]  0x0000000000000000 ~ 0x0000000000ffffff 16.000MB  - blk-spinor.0
[    0.054304]  0x0000000000000000 ~ 0x00000000005fffff 6.000MB   - blk-spinor.0.xboot
[    0.061925]  0x0000000000600000 ~ 0x00000000007fffff 2.000MB   - blk-spinor.0.reserve
[    0.069725]  0x0000000000800000 ~ 0x0000000000ffffff 8.000MB   - blk-spinor.0.private
[    0.077480]Probe device 'blk-spinor.0' with blk-spinor
[    0.082645]Probe device 'wdg-r128.0' with wdg-r128
[    0.087402]Probe device 'console-uart.0' with console-uart
[    0.094821]mount /private with 'ram' filesystem
Press any key to stop auto boot:  0.120
xboot: /# 

█████████████████████████████████
██ ▄▄▄▄▄ █ ▀███▀ ▄█▀█ ▄█ ▄▄▄▄▄ ██
██ █   █ █ ▀▄█▄▄▀▄▀█▄▀ █ █   █ ██
██ █▄▄▄█ █▄   ▄▄▀█▄▀█ ▄█ █▄▄▄█ ██
██▄▄▄▄▄▄▄█ █ █▄▀▄█▄▀▄▀▄█▄▄▄▄▄▄▄██
███▄▄█▄█▄▄▀█ ▀  ▀ ▀  ███ ▀▄ ▄▄ ██
██▀  ▄▄ ▄▄█▄▄ ▀  ▄▄▀▄▀▄█ ▀▄▀▄▀▄██
██▄▀▄█▄█▄ ▄▄█▀▄▀  ▀  ███ ██ ██ ██
███ ▄▄▄▄▄▄ ▄▄▀▀▄▄█▀▀▄▀▄▀▄▀▄▀▄▀▄██
██▄▄█▀▄▄▄ ▄ ▀▀▄▄▄▀▄  ███  █ ██ ██
██▄▀▄▄█ ▄▀▀▄▀▄ ▄▀▀▄▀▄▀▄▀▄▀▄▀▄▀▄██
██▄██▄█▄▄█▀▀▀▄█ ███  █ ▄▄▄  ██ ██
██ ▄▄▄▄▄ █▄ ██▀ ▀▀▄▀▄  █▄█ ▀▄▀▄██
██ █   █ █▄▀██▀█▄██  ▀▄ ▄▄  █▀ ██
██ █▄▄▄█ █ ▀▀▄▄██▀▄▀▄█  █▀▄▀▄▀▄██
██▄▄▄▄▄▄▄███▄▄▄▄▄██▄▄█▄█▄█▄▄█▄▄██
█████████████████████████████████
       _                   _                     
 _  _ | |___ _____ _____ _| |_                   
\ \/ /|  _  |  _  |  _  |_   _|  (C) 2007-2023   
 )  ( | |_| | |_| | |_| | | |____JIANJUN.JIANG__ 
/_/\_\|_____|_____|_____| |_____________________|
V3.0.0 (May 17 2023 - 23:25:28) - [yuzuki][Yuzuki Based On Allwinner R128 SOC]
[    0.000020]Probe device 'blk-romdisk.0' with blk-romdisk
[    0.000800]Probe device 'osc48m' with clk-fixed
[    0.000810]Probe device 'osc32k' with clk-fixed
[    0.000820]Probe device 'bus-uart0' with clk-fixed
[    0.000830]Probe device 'wdg' with clk-fixed
[    0.000840]Probe device 'uart-16550.0' with uart-16550
[    0.000850]Probe device 'wdg-r128.0' with wdg-r128
[    0.000860]Probe device 'console-uart.0' with console-uart
[    0.000970]mount /private with 'ram' filesystem
Press any key to stop auto boot:  0.330
xboot: /#  

#初始化DDR
xfel ddr r128-s2;

#加载M33核程序到0x08004000
xfel write 0x08004000 lichee/rtos/build/r128s2_pro_m33/img/rt_system.bin;

#加载C906程序到0x08200000，注意此程序是SPI NOR XIP的，光加载到RAM中是无法完整运行的，这里仅做引导C906试验。
xfel write 0x08200000 lichee/rtos/build/r128s2_pro_c906/img/rt_system.bin;

#运行M33核心程序，M33核心运行时，会自动的运行C906以及DSP程序。所以，将C906和DSP程序准备好，可以随着M33核一起启动。
xfel exec 0x08004001

[0]fes begin commit:7de04b7c
[2]set pll end
[3]board init ok
[5]fake dram ok
[7]heap: 0x40a0000 size:0xe000
[9]lpsram init
[11]lspsram init aps64
[13]lspsram dqs:0x011a01a0
[18]psram chip APS64 init ok!, freq 1920000000
[22]Init psram controller ok
[24]hpsram init
[26]DRAM DQS gate is PD mode.
[29]DRAM BOOT DRIVE INFO: V2.00
[32]DRAM CLK = 800 MHZ
[34]dram_tpr11 = 0x0 , dram_tpr12 =0x0
[37]dram_tpr9 = 0x2020
[86]DRAM simple test OK.
[88]DRAM SIZE =8 MB
[100]fes1 done
[0]fes begin commit:7de04b7c
[2]set pll end
[3]board init ok
[5]fake dram ok
[7]heap: 0x40a0000 size:0xe000
[9]lpsram init
[11]lspsram init aps64
[13]lspsram dqs:0x01060060
[18]psram chip APS64 init ok!, freq 1920000000
[22]Init psram controller ok
[24]hpsram init
[26]DRAM DQS gate is PD mode.
[29]DRAM BOOT DRIVE INFO: V2.00
[32]DRAM CLK = 800 MHZ
[34]dram_tpr11 = 0x0 , dram_tpr12 =0x0
[37]dram_tpr9 = 0x2020
[86]DRAM simple test OK.
[88]DRAM SIZE =8 MB
[100]fes1 done
Warning: clk ck1-m33 enable_count is 2, parent is dpll1, parent rate is 1920000000, should not be changed from 480000000 to 384000000, please recheck whether the operation is correct
Warning: clk ck1-dev enable_count is 2, parent is dpll1, parent rate is 1920000000, should not be changed from 1920000000 to 384000000, please recheck whether the operation is correct
] not support in sys_config
M33 CPU Clock Freq: 192 MHz

 *******************************************
 **    Welcome to R128 FreeRTOS V1.5.0    **
 ** Copyright (C) 2019-2022 AllwinnerTech **
 **                                       **
 **      starting armv8m FreeRTOS V0.7    **
 *******************************************

Date:May 10 2023, Time:14:01:58
[E(m33)] get dram_para dram_no_lpsram failed, skip LSPSRAM standby
[E(m33)] get dram_para dram_clk failed, skip HSPSRAM standby
flash not ready, skip mount
---boot dsp(start_addr: 0x0c000660)---
---boot c906---
C906 CPU Freq: 480 MHz

 *******************************************
 **    Welcome to R128 FreeRTOS V1.5.0    **
 ** Copyright (C) 2019-2022 AllwinnerTech **
 **                                       **
 **      starting riscv FreeRTOS V0.7     **
 *******************************************

Date:May 10 2023, Time:14:09:34
devfs: mount devfs to /dev ok
use default flash chip mJedec 0x0
[FD I]: Enter 32 Bit Address Mode

[FD I]: mode: 0x20, freq: 96000000Hz, drv: 0
[FD I]: jedec: 0x0, suspend_support: 1
no flash, skip init nor
=====================================================================================================
                                         EXC_LOAD_ACCESS              
=====================================================================================================

gprs:
 x0:0x0000000000000000   ra:0x0000000008255c2e   sp:0x000000000830dfe0   gp:0x00000000082c5420
 tp:0x0000000000000000   t0:0x0000000000000030   t1:0x0000000000000000   t2:0x0000000000000009
 s0:0x00000000082fca78   s1:0x00000000082b3df8   a0:0xffffffffffffffff   a1:0x0000000000000000
 a2:0x0000000000000000   a3:0x000000000830e070   a4:0x0000000000000000   a5:0x0000000000000000
 a6:0x0000000000000002   a7:0x000000004004707c   s2:0x00000000082b3df8   s3:0x0000000008336b70
 s5:0xa5a5a5a5a5a5a5a5   s5:0xa5a5a5a5a5a5a5a5   s6:0xa5a5a5a5a5a5a5a5   s7:0xa5a5a5a5a5a5a5a5
 s8:0xa5a5a5a5a5a5a5a5   s9:0xa5a5a5a5a5a5a5a5  s10:0xa5a5a5a5a5a5a5a5  s11:0xa5a5a5a5a5a5a5a5
 t3:0x0000000000000000   t4:0x0000000000000000   t5:0x0000000000000020   t6:0x0000000000000000

other:
mepc    :0x0000000008255c40
mcause  :0x0000000000000005
mtval   :0x0000000000000000
mstatus :0x0000000a00003980
mscratch:0x0000000000000000

-------backtrace-----------
backtrace : 0X08255C40 
backtrace : 0X0825EFB6 
backtrace : 0X0825EE76 
---------------------------

static int chip_reset(struct xfel_ctx_t * ctx)
{
	payload_write32(ctx, 0x40020400 + 0x14, (0x16aa << 16) | (0x1 << 0));
	payload_write32(ctx, 0x40020400 + 0x18, (0x16aa << 16) | (1 << 0));
	payload_write32(ctx, 0x40020400 + 0x10, (0xa57 << 1) | (1 << 0));
	return 1;
}

.syntax unified

	.global _start
_start:
	dsb.w sy
	isb.w sy
	ldr.w r0, _iciallu
	mov.w r1, #0x0
	str.w r1, [r0]
	dsb.w sy
	isb.w sy
	b.w reset
	.align 2
_iciallu:
	.word 0xe000ef50

reset:
	push.w { lr }
	/* ... */
	pop.w { lr }
	bx lr

diff --git a/src/arch/arm32/mach-t113s3/start.S b/src/arch/arm32/mach-t113s3/start.S
index 39d83e78a..4415adea1 100644
--- a/src/arch/arm32/mach-t113s3/start.S
+++ b/src/arch/arm32/mach-t113s3/start.S
@@ -86,7 +86,7 @@
 	.global _start
 _start:
 	/* Boot head information for BROM */
-	.long 0xea000016
+	.long 0xea00000e
 	.byte 'e', 'G', 'O', 'N', '.', 'B', 'T', '0'
 	.long 0x12345678				/* checksum */
 	.long __spl_size				/* spl size */
@@ -97,7 +97,9 @@ _start:
 	.long 0x0						/* eGON version */
 	.byte 0x00, 0x00, 0x00, 0x00	/* platform information - 8byte */
 	.byte 0x34, 0x2e, 0x30, 0x00
+	.long 0, 0, 0, 0				/* reserve */
 
+	.align 5
 _vector:
 	b reset
 	ldr pc, _undefined_instruction

# Rockchip RV1106

## Compile source code and generate the target files at the output directory
```shell
make clean
make CROSS_COMPILE=/path/to/arm-none-linux-gnueabihf- PLATFORM=arm32-rv1106
```

## Enter maskrom mode and using xrock for burning spi nor flash (offset = 0x00010000, sector = 128)
```shell
sudo xrock maskrom rv1106_ddr_924MHz_v1.09.bin rv1106_usbplug_v1.06.bin --rc4-off;
sleep 3;
sudo xrock flash write 128 xbootpak.bin;
sudo xrock reset;
```

## Enter maskrom mode and using xrock for burning spi nand flash (offset = 0x00040000, sector = 512)
```shell
sudo xrock maskrom rv1106_ddr_924MHz_v1.09.bin rv1106_usbplug_v1.06.bin --rc4-off;
sleep 3;
sudo xrock flash write 512 xbootpak.bin;
sudo xrock reset;
```

## Enter maskrom mode and using xrock for burning emmc (offset = 0x00008000, sector = 64)
```shell
sudo xrock maskrom rv1106_ddr_924MHz_v1.09.bin rv1106_usbplug_v1.06.bin --rc4-off;
sleep 3;
sudo xrock flash write 64 xbootpak.bin;
sudo xrock reset;
```

## Download xrock source code
```shell
git clone https://github.com/xboot/xrock.git
```

## Make and install xrock
```shell
make
sudo make install
```

/*
 * driver/rtc-rv1106.c
 *
 * Copyright(c) 2007-2022 Jianjun Jiang <8192542@qq.com>
 * Official site: http://xboot.org
 * Mobile phone: +86-18665388956
 * QQ: 8192542
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in all
 * copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 */

#include <xboot.h>
#include <clk/clk.h>
#include <rtc/rtc.h>

enum {
	RTC_SET_SECONDS		= 0x00,
	RTC_SET_MINUTES		= 0x04,
	RTC_SET_HOURS		= 0x08,
	RTC_SET_DAYS		= 0x0c,
	RTC_SET_MONTHS		= 0x10,
	RTC_SET_YEARL		= 0x14,
	RTC_SET_YEARH		= 0x18,
	RTC_SET_WEEKS		= 0x1c,
	RTC_ALARM_SECONDS	= 0x20,
	RTC_ALARM_MINUTES	= 0x24,
	RTC_ALARM_HOURS		= 0x28,
	RTC_ALARM_DAYS		= 0x2c,
	RTC_ALARM_MONTHS	= 0x30,
	RTC_ALARM_YEARL		= 0x34,
	RTC_ALARM_YEARH		= 0x38,
	RTC_CTRL			= 0x3C,
	RTC_STATUS0			= 0x40,
	RTC_STATUS1			= 0x44,
	RTC_INT0_EN			= 0x48,
	RTC_INT1_EN			= 0x4c,
	RTC_MSEC_CTRL		= 0x50,
	RTC_MSEC_CNT		= 0x54,
	RTC_COMP_H			= 0x58,
	RTC_COMP_D			= 0x5c,
	RTC_COMP_M			= 0x60,
	RTC_ANALOG_CTRL		= 0x64,
	RTC_ANALOG_TEST		= 0x68,
	RTC_LDO_CTRL		= 0x6c,
	RTC_XO_TRIM0		= 0x70,
	RTC_XO_TRIM1		= 0x74,
	RTC_VPTAT_TRIM		= 0x78,
	RTC_ANALOG_EN		= 0x7c,
	RTC_CLK32K_TEST		= 0x80,
	RTC_TEST_ST			= 0x84,
	RTC_TEST_LEN		= 0x88,
	RTC_CNT_0			= 0x8c,
	RTC_CNT_1			= 0x90,
	RTC_CNT_2			= 0x94,
	RTC_CNT_3			= 0x98,
};

struct rtc_rv1106_pdata_t {
	virtual_addr_t virt;
	char * clk;
};

static void rtc_update_bits(virtual_addr_t virt, u32_t offset, u32_t mask, u32_t set)
{
	u32_t val;

	val = read32(virt + offset);
	write32(virt + offset, (val & ~mask) | set | 0xc4522900);
}

static bool_t rtc_rv1106_settime(struct rtc_t * rtc, struct rtc_time_t * time)
{
	struct rtc_rv1106_pdata_t * pdat = (struct rtc_rv1106_pdata_t *)rtc->priv;
	u32_t rtc_data[8];
	u32_t status;
	int yearh, yearl;
	int i;

	rtc_data[0] = bin2bcd(time->second) | 0xc4522900;
	rtc_data[1] = bin2bcd(time->minute) | 0xc4522900;
	rtc_data[2] = bin2bcd(time->hour) | 0xc4522900;
	rtc_data[3] = bin2bcd(time->day) | 0xc4522900;
	rtc_data[4] = bin2bcd(time->month) | 0xc4522900;
	if(time->year > 199)
	{
		yearh = (time->year - 100) / 100;
		yearl = time->year - 100 - yearh * 100;
	}
	else
	{
		yearh = 0;
		yearl = time->year - 100 - yearh * 100;
	}
	rtc_data[5] = bin2bcd(yearl) | 0xc4522900;
	rtc_data[6] = bin2bcd(yearh) | 0xc4522900;
	rtc_data[7] = bin2bcd(time->week) | 0xc4522900;

	rtc_update_bits(pdat->virt, RTC_CTRL, (1 << 0), 0);
	do {
		status = read32(pdat->virt + RTC_STATUS1);
		udelay(1);
	} while(status & (1 << 0));
	for(i = 0; i < 8; i++)
		write32(pdat->virt + RTC_SET_SECONDS + (i << 2), rtc_data[i]);
	rtc_update_bits(pdat->virt, RTC_CTRL, (1 << 7) | (1 << 0), (1 << 7) | (1 << 0));
	do {
		status = read32(pdat->virt + RTC_STATUS1);
		udelay(1);
	} while(!(status & (1 << 0)));

	return TRUE;
}

static bool_t rtc_rv1106_gettime(struct rtc_t * rtc, struct rtc_time_t * time)
{
	struct rtc_rv1106_pdata_t * pdat = (struct rtc_rv1106_pdata_t *)rtc->priv;
	u32_t rtc_data[8];
	int i;

	for(i = 0; i < 8; i++)
		rtc_data[i] = read32(pdat->virt + RTC_SET_SECONDS + (i << 2));
	for(i = 0; i < 8; i++)
		rtc_data[i] = read32(pdat->virt + RTC_SET_SECONDS + (i << 2));
	for(i = 0; i < 8; i++)
		rtc_data[i] = read32(pdat->virt + RTC_SET_SECONDS + (i << 2));

	time->second = bcd2bin(rtc_data[0] & 0x7f);
	time->minute = bcd2bin(rtc_data[1] & 0x7f);
	time->hour = bcd2bin(rtc_data[2] & 0x3f);
	time->day = bcd2bin(rtc_data[3] & 0x3f);
	time->month = bcd2bin(rtc_data[4] & 0x1f);
	time->year = (bcd2bin(rtc_data[6] & 0xff)) * 100 + (bcd2bin(rtc_data[5] & 0xff)) + 100;
	time->week = bcd2bin(rtc_data[7] & 0x07);

	return TRUE;
}

static struct device_t * rtc_rv1106_probe(struct driver_t * drv, struct dtnode_t * n)
{
	struct rtc_rv1106_pdata_t * pdat;
	struct rtc_t * rtc;
	struct device_t * dev;
	virtual_addr_t virt = phys_to_virt(dt_read_address(n));
	char * clk = dt_read_string(n, "clock-name", NULL);

	if(!search_clk(clk))
		return NULL;

	pdat = malloc(sizeof(struct rtc_rv1106_pdata_t));
	if(!pdat)
		return NULL;

	rtc = malloc(sizeof(struct rtc_t));
	if(!rtc)
	{
		free(pdat);
		return NULL;
	}

	pdat->virt = virt;
	pdat->clk = strdup(clk);

	rtc->name = alloc_device_name(dt_read_name(n), -1);
	rtc->settime = rtc_rv1106_settime;
	rtc->gettime = rtc_rv1106_gettime;
	rtc->priv = pdat;

	clk_enable(pdat->clk);
	write32(phys_to_virt(0xff000000) + 0x50000, ((1 << 6) << 16) | (1 << 6));
	rtc_update_bits(pdat->virt, RTC_VPTAT_TRIM, (1 << 4), (4 << 1));
	rtc_update_bits(pdat->virt, RTC_ANALOG_EN, (1 << 1), 0x00);
	rtc_update_bits(pdat->virt, RTC_LDO_CTRL, (1 << 0), (1 << 0));
	rtc_update_bits(pdat->virt, RTC_ANALOG_EN, (1 << 5), (1 << 5));
	rtc_update_bits(pdat->virt, RTC_CTRL, (1 << 0) | (1 << 7), (1 << 0) | (1 << 7));

	if(!(dev = register_rtc(rtc, drv)))
	{
		clk_disable(pdat->clk);
		free(pdat->clk);
		free_device_name(rtc->name);
		free(rtc->priv);
		free(rtc);
		return NULL;
	}
	return dev;
}

static void rtc_rv1106_remove(struct device_t * dev)
{
	struct rtc_t * rtc = (struct rtc_t *)dev->priv;
	struct rtc_rv1106_pdata_t * pdat = (struct rtc_rv1106_pdata_t *)rtc->priv;

	if(rtc)
	{
		unregister_rtc(rtc);
		clk_disable(pdat->clk);
		free(pdat->clk);
		free_device_name(rtc->name);
		free(rtc->priv);
		free(rtc);
	}
}

static void rtc_rv1106_suspend(struct device_t * dev)
{
}

static void rtc_rv1106_resume(struct device_t * dev)
{
}

static struct driver_t rtc_rv1106 = {
	.name		= "rtc-rv1106",
	.probe		= rtc_rv1106_probe,
	.remove		= rtc_rv1106_remove,
	.suspend	= rtc_rv1106_suspend,
	.resume		= rtc_rv1106_resume,
};

static __init void rtc_rv1106_driver_init(void)
{
	register_driver(&rtc_rv1106);
}

static __exit void rtc_rv1106_driver_exit(void)
{
	unregister_driver(&rtc_rv1106);
}

driver_initcall(rtc_rv1106_driver_init);
driver_exitcall(rtc_rv1106_driver_exit);

#define armv7_read_cntpctl()		({ u32_t val; __asm__ __volatile__("mrc p15, 0, %0, c14, c2, 1" : "=r" (val)); val; })
#define armv7_write_cntpctl(val)	__asm__ __volatile__("mcr p15, 0, %0, c14, c2, 1\nisb sy\n" : : "r" (val));

static inline void armv7_timer_start(void)
{
	u32_t ctrl = armv7_read_cntpctl();
	if(!(ctrl & (1 << 0)))
	{
		ctrl |= (1 << 0);
		armv7_write_cntpctl(ctrl);
	}
}

static inline void armv7_timer_stop(void)
{
	u32_t ctrl = armv7_read_cntpctl();
	if((ctrl & (1 << 0)))
	{
		ctrl &= ~(1 << 0);
		armv7_write_cntpctl(ctrl);
	}
}

static inline void armv7_timer_interrupt_enable(void)
{
	u32_t ctrl = armv7_read_cntpctl();
	if(ctrl & (1 << 1))
	{
		ctrl &= ~(1 << 1);
		armv7_write_cntpctl(ctrl);
	}
}

static inline void armv7_timer_interrupt_disable(void)
{
	u32_t ctrl = armv7_read_cntpctl();
	if(!(ctrl & (1 << 1)))
	{
		ctrl |= (1 << 1);
		armv7_write_cntpctl(ctrl);
	}
}

static inline u64_t armv7_timer_frequecy(void)
{
	u32_t v;

	__asm__ __volatile__("mrc p15, 0, %0, c14, c0, 0" : "=r" (v));
	return (v != 0) ? (u64_t)v : 1000000;
}

static inline u64_t armv7_timer_read(void)
{
	u32_t l, h;

	__asm__ __volatile__("mrrc p15, 0, %0, %1, c14" : "=r" (l), "=r" (h));
	return ((u64_t)h << 32) | l;
}

static inline void armv7_timer_compare(uint64_t interval)
{
	u64_t last = armv7_timer_read() + interval;

	__asm__ __volatile__("mcrr p15, 2, %Q0, %R0, c14" : : "r" (last));
}

#define RV1106_IRQ_HYPERVISOR_TIMER			(26)
#define RV1106_IRQ_VIRTUAL_TIMER			(27)
#define RV1106_IRQ_SECURE_PHYSICAL_TIMER	(29)
#define RV1106_IRQ_NONSECURE_PHYSICAL_TIMER	(30)

sudo xrock maskrom rv1106_ddr_924MHz_v1.09.bin rv1106_usbplug_v1.03.bin --rc4-off;
sleep 3;
sudo xrock flash write 1024 xbootpak.bin;
sudo xrock reset;

sudo xrock maskrom rv1106_ddr_924MHz_v1.09.bin rv1106_usbplug_v1.03.bin --rc4-off;
sleep 3;
sudo xrock flash write 256 xbootpak.bin;
sudo xrock reset;

sudo xrock maskrom rv1106_ddr_924MHz_v1.09.bin rv1106_usbplug_v1.03.bin --rc4-off;
sleep 3;
sudo xrock flash write 512 xbootpak.bin;
sudo xrock reset;

sudo xrock maskrom rv1106_ddr_924MHz_v1.07.bin rv1106_usbplug_v1.03.bin --rc4-off;
sleep 3;
sudo xrock flash write 512 xbootpak.bin;
sudo xrock reset;

DDR Version V1.07 20220523
f947
F
DDRConf2
DDR3, BW=16 Col=10 Bk=8 CS0 Row=13 CS=1 Die BW=16 Size=128MB
924MHz
DDR bin out

█████████████████████████
██ ▄▄▄▄▄ ██▄▀▀▀█ ▄▄▄▄▄ ██
██ █   █ █ ▀▄█ █ █   █ ██
██ █▄▄▄█ ██▄  ██ █▄▄▄█ ██
██▄▄▄▄▄▄▄█▄█ █ █▄▄▄▄▄▄▄██
████▀▄ ▀▄▄█ ▀█▄▀█▀▀  █▀██
███▀▄▀ ▀▄ ▄█▀▀▄▀█ ▀█ ▄███
███▄█▄█▄▄▄▀▀ ▄ ▀ ▄▄ ▀  ██
██ ▄▄▄▄▄ █▄ ▄█▄▀▄████▄▄██
██ █   █ █ ▀█▄█▄▄█ ▄▀█▄██
██ █▄▄▄█ ██▀  █ ▄▄▄▄█▄ ██
██▄▄▄▄▄▄▄███▄██▄▄▄▄▄▄▄███
█████████████████████████
       _                   _                     
 _  _ | |___ _____ _____ _| |_                   
\ \/ /|  _  |  _  |  _  |_   _|  (C) 2007-2022   
 )  ( | |_| | |_| | |_| | | |____JIANJUN.JIANG__ 
/_/\_\|_____|_____|_____| |_____________________|
V3.0.0 (Jul 29 2022 - 16:59:22) - [x1106][X1106 Based On RV1106 SOC]
[    0.000020]Probe device 'blk-romdisk.0' with blk-romdisk
[    0.000800]Probe device 'usbphy480m' with clk-fixed
[    0.000810]Probe device 'xin24m' with clk-fixed
[    0.000820]Probe device 'xin32k' with clk-fixed
[    0.000830]Probe device 'link-uart0' with clk-link
[    0.000840]Probe device 'link-uart1' with clk-link
[    0.000850]Probe device 'link-uart2' with clk-link
[    0.000860]Probe device 'link-uart3' with clk-link
[    0.000870]Probe device 'link-uart4' with clk-link
[    0.000880]Probe device 'link-uart5' with clk-link
[    0.000890]Probe device 'uart-8250.0' with uar              &       S&LWobe device 'uart-8250.2' with uart-8250
[    0.000920]Probe device 'uart-8250.3' with uart-8250
[    0.000930]Probe device 'uart-8250.4' with uart-8250
[    0.000940]Probe device 'uart-8250.5' with uart-8250
[    0.000950]Probe device 'console-uart.0' with console-uart
[    0.001060]mount /private with 'ram' filesystem

xboot: /#            

/* ▀▄█ */
#define UTF8_EMPTY(inv)			do{ if(inv) { *p++ = 0xe2; *p++ = 0x96; *p++ = 0x88; } else { *p++ = 0x20; } } while(0)
#define UTF8_TOPHALF(inv)		do{ if(inv) { *p++ = 0xe2; *p++ = 0x96; *p++ = 0x84; } else { *p++ = 0xe2; *p++ = 0x96; *p++ = 0x80; } } while(0)
#define UTF8_BOTTOMHALF(inv)	do{ if(inv) { *p++ = 0xe2; *p++ = 0x96; *p++ = 0x80; } else { *p++ = 0xe2; *p++ = 0x96; *p++ = 0x84; } } while(0)
#define UTF8_FULL(inv)			do{ if(inv) { *p++ = 0x20; } else { *p++ = 0xe2; *p++ = 0x96; *p++ = 0x88; } } while(0)
#define UTF8_NEWLINE()			do{ *p++ = '\r'; *p++ = '\n'; } while(0)
#define UTF8_END()				do{ *p++ = '\0'; } while(0)

char * qrcgen_tostring(const char * txt, int invert)
{
	uint8_t qrc[QRCGEN_BUFFER_LEN_MAX];
	uint8_t tmp[QRCGEN_BUFFER_LEN_MAX];
	int qrs, x, y, i;
	int t, b;
	char *s, *p;

	if(qrcgen_encode_text(txt, tmp, qrc, QRCGEN_ECC_MEDIUM, QRCGEN_VERSION_MIN, QRCGEN_VERSION_MAX, QRCGEN_MASK_AUTO, 1))
	{
		qrs = qrcgen_get_size(qrc);
		if(qrs > 0)
		{
			p = s = malloc(((qrs + 4) * 3 + 2) * (qrs / 2 + 1 + 2) + 1);
			if(s)
			{
				for(i = 0; i < qrs + 4; ++i)
					UTF8_EMPTY(invert);
				UTF8_NEWLINE();
				for(y = 0; y < qrs; y += 2)
				{
					UTF8_EMPTY(invert);
					UTF8_EMPTY(invert);
					for(x = 0; x < qrs; x++)
					{
						t = qrcgen_get_pixel(qrc, x, y);
						b = 0;
						if(y + 1 < qrs)
							b = qrcgen_get_pixel(qrc, x, y + 1);
						if(t)
						{
							if(b)
								UTF8_FULL(invert);
							else
								UTF8_TOPHALF(invert);
						}
						else
						{
							if(b)
								UTF8_BOTTOMHALF(invert);
							else
								UTF8_EMPTY(invert);
						}
					}
					UTF8_EMPTY(invert);
					UTF8_EMPTY(invert);
					UTF8_NEWLINE();
				}
				for(i = 0; i < qrs + 4; i++)
					UTF8_EMPTY(invert);
				UTF8_NEWLINE();
				UTF8_END();
				return s;
			}
		}
	}
	return NULL;
}

void cg_set_operator(struct cg_ctx_t * ctx, enum cg_operator_t op);

enum cg_operator_t {
	CG_OPERATOR_SRC				= 0, /* r = s * ca + d * cia */
	CG_OPERATOR_SRC_OVER		= 1, /* r = (s + d * sia) * ca + d * cia */
	CG_OPERATOR_DST_IN			= 2, /* r = d * sa * ca + d * cia */
	CG_OPERATOR_DST_OUT			= 3, /* r = d * sia * ca + d * cia */
};

make clean
make CROSS_COMPILE=/path/to/arm-none-linux-gnueabihf- PLATFORM=arm32-t113s3

sudo xfel ddr t113-s3; sudo xfel write 0x40000000 xboot.bin; sudo xfel exec 0x40000000;

sudo xfel spinor write 0 xboot.bin

sudo xfel spinor write 0 xboot.bin.z

sudo xfel spinand splwrite 2048 1048576 xboot.bin

sudo xfel spinand splwrite 2048 1048576 xboot.bin.z

xfel ddr r528-s3
xfel ddr t113-s3

static int chip_detect(struct xfel_ctx_t * ctx, uint32_t id)
{
	if(id == 0x00185900)
	{
		/*
		 * XuanTie C906 RISC-V
		 */
		if(R32(0x00000000) == 0x43014281)
			return 1;
	}
	return 0;
}

static int chip_detect(struct xfel_ctx_t * ctx, uint32_t id)
{
	if(id == 0x00185900)
	{
		/*
		 * Dual-Core ARM Cortex-A7
		 */
		if(R32(0x00000000) == 0xea000019)
			return 1;
	}
	return 0;
}

    "interrupt-gpio": 137,
    "interrupt-gpio-config": 6,
    "reset-gpio": 138,
    "reset-gpio-config": 1

#define F1C100S_GPIOA0            (0)
#define F1C100S_GPIOA1            (1)
#define F1C100S_GPIOA2            (2)
#define F1C100S_GPIOA3            (3)

#define F1C100S_GPIOC0            (64)
#define F1C100S_GPIOC1            (65)
#define F1C100S_GPIOC2            (66)
#define F1C100S_GPIOC3            (67)

#define F1C100S_GPIOD0            (96)
#define F1C100S_GPIOD1            (97)
#define F1C100S_GPIOD2            (98)
#define F1C100S_GPIOD3            (99)
#define F1C100S_GPIOD4            (100)
#define F1C100S_GPIOD5            (101)
#define F1C100S_GPIOD6            (102)
#define F1C100S_GPIOD7            (103)
#define F1C100S_GPIOD8            (104)
#define F1C100S_GPIOD9            (105)
#define F1C100S_GPIOD10            (106)
#define F1C100S_GPIOD11            (107)
#define F1C100S_GPIOD12            (108)
#define F1C100S_GPIOD13            (109)
#define F1C100S_GPIOD14            (110)
#define F1C100S_GPIOD15            (111)
#define F1C100S_GPIOD16            (112)
#define F1C100S_GPIOD17            (113)
#define F1C100S_GPIOD18            (114)
#define F1C100S_GPIOD19            (115)
#define F1C100S_GPIOD20            (116)
#define F1C100S_GPIOD21            (117)

#define F1C100S_GPIOE0            (128)
#define F1C100S_GPIOE1            (129)
#define F1C100S_GPIOE2            (130)
#define F1C100S_GPIOE3            (131)
#define F1C100S_GPIOE4            (132)
#define F1C100S_GPIOE5            (133)
#define F1C100S_GPIOE6            (134)
#define F1C100S_GPIOE7            (135)
#define F1C100S_GPIOE8            (136)
#define F1C100S_GPIOE9            (137)
#define F1C100S_GPIOE10            (138)
#define F1C100S_GPIOE11            (139)
#define F1C100S_GPIOE12            (140)

#define F1C100S_GPIOF0            (160)
#define F1C100S_GPIOF1            (161)
#define F1C100S_GPIOF2            (162)
#define F1C100S_GPIOF3            (163)
#define F1C100S_GPIOF4            (164)
#define F1C100S_GPIOF5            (165)

diff --git a/lichee/brandy-2.0/u-boot-2018/board/sunxi/board_common.c b/lichee/brandy-2.0/u-boot-2018/board/sunxi/board_common.c
index 327238b86..319623ab8 100644
--- a/lichee/brandy-2.0/u-boot-2018/board/sunxi/board_common.c
+++ b/lichee/brandy-2.0/u-boot-2018/board/sunxi/board_common.c
@@ -67,7 +67,8 @@ void set_boot_work_mode(int work_mode)
 
 int get_boot_work_mode(void)
 {
-       return uboot_spare_head.boot_data.work_mode;
+       return WORK_MODE_USB_PRODUCT;
+//     return uboot_spare_head.boot_data.work_mode;
 }

xfel ddr ddr2; xfel write 0x42000000 lichee/brandy-2.0/u-boot-2018/u-boot-dtb.bin; xfel exec 0x42000000;

#define	FEX_CMD_fes_trans						0x0201
#define	FEX_CMD_fes_run 						0x0202
#define FEX_CMD_fes_down						0x0206
#define FEX_CMD_fes_up	    					0x0207
#define FEX_CMD_fes_verify    					0x0208
#define FEX_CMD_fes_query_storage				0x0209
#define FEX_CMD_fes_probe_hardware  			0x020A
#define FEX_CMD_fes_flash_set_on				0x020A
#define FEX_CMD_fes_flash_set_off				0x020B
#define FEX_CMD_fes_verify_value    			0x020C
#define FEX_CMD_fes_verify_status   			0x020D
#define FEX_CMD_fes_flash_size_probe			0x020E
#define FEX_CMD_fes_tool_mode					0x020F
#define FEX_CMD_fes_memset                      0x0210
#define FEX_CMD_fes_pmu                         0x0211
#define FEX_CMD_fes_unseqmem_read   			0x0212
#define FEX_CMD_fes_unseqmem_write  			0x0213
#define FEX_CMD_fes_force_erase                 0x0220
#define FEX_CMD_fes_force_erase_key             0x0221
#define FEX_CMD_fes_reset_cpu					0x0214
#define FEX_CMD_fes_low_power_manger 			0x0215
#define FEX_CMD_fes_query_secure                0x0230
#define FEX_CMD_fes_query_info               0x0231

/*
 * Default spi nand page size: 2048(11), 4096(12)
 */
#define SPINAND_PAGE_BITS	(11)
#define SPINAND_PAGE_MASK	((1 << SPINAND_PAGE_BITS) - 1)
#define SPINAND_PAGE_SIZE	(1 << SPINAND_PAGE_BITS)